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Total-ionizing-dose (TID) effects are investigated in a highly-scaled gate-all-around (GAA) FET technology using Si nanowire channels with a diameter of 8 nm. n- and p-FETs are irradiated up to 300 Mrad(SiO2) and annealed at room temperature. TID effects are negligible up to 10 Mrad(SiO2). At ultrahigh doses, the TID degradation depends on the irradiation bias condition, with more severe effects observed in longer channel devices. The worst case irradiation condition is when positive bias is applied to the gate. Threshold-voltage shifts are caused by H+-driven generation of interface traps at the oxide/channel interface. In contrast, FETs irradiated under negative gate bias are dominated by transconductance loss and increases of low-frequency noise, suggesting the activation of border traps. Enhanced off-leakage current is observed in n-FETs due to charge trapping in shallow-trench isolation, and in p-FETs due to trap-assisted recombination at STI sidewalls and/or spacer dielectrics at drain/bulk junctions. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose (TID) responses are investigated for 3-D-sequentially integrated fully depleted silicon-on-insulator (FD-SOI) MOSFETs. Strong layer-to-layer coupling of TID response is observed. The simultaneous application of positive bias to the gate of the bottom-layer device and negative bias to the top-layer device leads to the maximum enhancement of positive charge trapping in the top-layer device and the intermediate dielectric layer. This enhancement is due to the upward-directed electric field in the intermediate dielectric layer under these bias conditions. In contrast, electrostatic shielding prevents the gate bias of the top-layer device from affecting the response of the bottom-layer device, as confirmed by experiments and technology computer-aided design (TCAD) simulations. Effects of layer-to-layer coupling are less significant for postirradiation-biased annealing. [ABSTRACT FROM AUTHOR]

An overview is presented of displacement damage (DD) effects, total-ionizing-dose (TID) effects, and single-event effects in AlGaN/GaN high electron mobility transistors (HEMTs). High-fluence proton-induced DD creates point defects and impurity complexes at fluences that are comparable to or higher than those encountered in space applications. Defect and impurity dehydrogenation also contributes significantly to the DD/TID response at fluences typical of realistic space environments. The bias applied during irradiation can affect the DD/TID response strongly. Bias stress before irradiation can lead to enhanced proton-induced degradation of AlGaN/GaN HEMTs. Low-frequency noise measurements and density functional calculations provide insight into defect microstructures and energy levels. GaN-based HEMTs can be quite vulnerable to single-event effects in space. Of particular concern is single-event burnout (SEB). The vulnerabilities of GaN-based devices to SEB at voltages below rated limits and significant device-to-device variations in SEB response lead to significant voltage derating for GaN-based power devices in space systems. Developing an improved understanding of the effects of defects and hydrogen on the radiation response of AlGaN/GaN HEMTs can improve the DD/TID response by reducing threshold-voltage shifts and transconductance degradation. Reducing defect densities may also reduce the variation in SEB response, enabling reliable device operation at higher voltages in future space systems. [ABSTRACT FROM AUTHOR]

The effects of gate length and drain bias on the off-state drain leakage current of irradiated fully-depleted SOI n-channel MOSFETs are reported. The experimental results are interpreted using a model based on the combined effects of band-to-band tunneling (BBT) and the trapped charge in the buried oxide. For negative gate-source voltages, the drain leakage current increases with the drain voltage because the electric field in the gate-to-drain overlap region is increasing. The off-state current in these devices increases with total ionizing dose due to oxide trapped charge build up in the buried oxide, enhanced by the BBT mechanism. The experimental data show that these effects are more significant for devices with shorter gate-lengths. Simulation results suggest that the BBT-generated holes are more likely to drift all the way from the drain to the source in shorter devices, enhancing the drain leakage current, while they tend to tunnel across the gate oxide in longer devices. Index Terms--Band-to-band tunneling (BBT), fully depleted silicon-on-insulator (FDSOI), gate induced drain leakage current (GIDL), leakage current and total ionizing dose (TID), metal-oxide-semiconductor-field-effect transistor (MOSFET).

Transistors and ICs built in several different captive and commercial facilities were exposed to moisture, irradiated, and annealed. The moisture exposures were performed using highly accelerated stress test (HAST) at 130[degrees]C and 85% relative humidity. Irradiation of n-channel transistors exposed to HAST followed by a long-term anneal resulted in some increase in interface-trap and oxide-trapped charge buildup. However, exposing p-channel transistors to HAST preirradiation resulted in extremely large and unexpected voltage shifts immediately following irradiation. They were observed for devices with either doped oxide or nitride final chip passivation. Because of this, nitride passivation may not be sufficient to prevent [H.sub.2]O from causing enhanced radiation-induced degradation over long time periods in some devices (e.g., commercial devices with nitride final chip passivation packaged in plastic packages). The smaller voltage shifts for the n-channel transistors may be related to the formation of phosphosilicate glass (PSG) overlying the sources and drains of the n-channel transistors impeding the diffusion of moisture to the gate oxides. It is shown that, the large radiation-induced voltage shifts for the p-channel transistors can lead to enhanced IC parametric degradation and functional failure at lower radiation levels. Large increases in radiation-induced field oxide leakage current were also observed for transistors exposed to HAST preirradiation. Transistors were also annealed (prior to irradiation) and irradiated in [H.sub.2]. Approximately the same level of radiation-induced degradation was observed for n- and p-channel transistors suggesting that the diffusion kinetics for [H.sub.2] diffusion are considerably different than for [H.sub.2]O diffusion. These results raise the concern that exposure of devices to moisture or hydrogen can lead to long-term radiation-induced aging effects. Index Terms--Aging effects, hydrogen exposure, ionizing radiation, moisture exposure, MOS radiation effects.

Low-frequency (1/f) noise measurements were performed at room temperature as a function of gate bias on Field-Oxide Field Effect Transistors (FOXFETs) that were irradiated with 10-keV X-rays and then annealed at room temperature. The resulting oxide-trap and interface-trap charge densities were estimated by the midgap charge separation technique. Some devices also were exposed to 85% relative humidity at 130[degrees]C for three days after irradiation and annealing. Effective border trap densities were estimated from noise measurements in each case. The noise magnitude increases after irradiation and decreases first during annealing and then even more significantly after moisture exposure. The post-humidity-exposure noise for the irradiated devices is well below the pre-irradiation noise for these devices and experimental conditions. The increased noise due to irradiation is attributed to O vacancies and hydrogen bridge (Si-H-Si) defects in the near-interfacial field oxide. The reduction in noise with room-temperature annealing and humidity exposure is due to a combination of thermal and tunnel annealing processes and defect passivation reactions involving water. Index Terms--1/f noise, charge trapping, interface traps, isolation oxides, oxide-trap charge, radiation hardness assurance.

Device-level current transients are induced by injecting carriers using two-photon absorption from a subbandgap pulsed laser and recorded using wideband transmission and measurement equipment. These transients exhibit three distinct temporal trends that depend on laser pulse energy as well as the transverse and vertical charge generation location. The nature of the current transient is controlled by both the behavior of the subcollector-substrate junction and isolation biasing. However, substrate potential modulation, due to deformation of the subcollector-substrate depletion region, is the dominant mechanism affecting transient characteristics. Index Terms--Current transient, electrostatic potential modulation, SiGe HBT, two-photon absorption.

Mixed mode simulations and heavy-ion experiments indicate the presence of multi-node charge collection in advanced technologies. For logic circuits, such charge collection may result in concatenation of transients, extending the width of SETs. Mixed-mode simulations of a 4-bit adder circuit indicate that the increase in SET pulse width due to two-node charge collection can be as high as 75%. An analytical model for the increase in the SET width is developed showing the increase in SET width is proportional to the width of the individual transients, the relative delay between charge collection nodes, and the circuit topology. Index Terms--Charge sharing, multi-node charge collection, pulse width, single event, single-event transient (SET).

Bipolar test structures were irradiated and annealed with various combinations of molecular hydrogen gas ambients, bias, and thermal conditions. The results show that the buildup and annealing behavior of defects in bipolar base oxides depend strongly on hydrogen concentration. Differences observed in trapped oxide charge annealing rates suggest that the charged defects created in hydrogen-rich environments may be attributed to different types of positive charge in addition to trapped holes. Index Terms--Bipolar oxide, gated bipolar devices, interface traps, hydrogen, oxide trapped charge, radiation-induced.

Swift heavy ion (SHI) damage, including single-event gate rupture (SEGR), radiation-induced soft breakdown (RISB), and long-term reliability degradation (LTRD), plays an important role in limiting device lifetime and reliability. However, the atomic-scale physical origins of these phenomena have not been elucidated. In this work, we explain the underlying physical processes responsible for SHI-induced effects in oxides, providing a direct link between atomic motion and macroscopic electrical effects. SRIM 2008 calculations show that SHIs produce low-energy atomic recoils in Si[O.sub.2]. Using parameter-free quantum mechanical calculations, we probe the atomic-scale dynamics of the resulting low-energy atomic displacements. We show that low-energy displacements in Si[O.sub.2] produce pockets containing high densities of network defects, and that these defects generate electronic states throughout the Si[O.sub.2] band gap. These spatially correlated defect states represent a low-resistivity 'conducting pipe' through Si[O.sub.2] layers, and provide an atomistic mechanism for the formation of electrically-active damage that does not rely on thermal spike effects. In the case of SEGR, the conducting pipe allows energy stored on the gate capacitance to be discharged into the oxide, resulting in the permanent damage observed experimentally. The persistence of defects resulting from SHI-induced atomic displacements provides a physical explanation for percolation models of LTRD and RISB. Index Terms--Density functional theory, displacement damage, local melting, single-event gate rupture.

We present evidence that enhanced low-dose-rate sensitivity (ELDRS) in lateral and substrate pnp bipolar devices can occur because of the much lower probability for electron capture by protons in Si[O.sub.2], as compared to mobile or trapped holes. New experimental results and a critical evaluation of previous work demonstrate that, at high dose rates and/or in oxides with low concentrations of hydrogen, electrons can more easily neutralize slowly diffusing or metastably trapped holes via annihilation (recombination) or compensation (offsetting trapping) before the holes can release [H.sup.+]. In contrast, at low dose rates and/or in oxides with higher concentrations of hydrogen, which can react with and modify the structure of O-vacancy-related defects, it is more likely that holes can release [H.sup.+] during transport. This is because the cross section for electron capture by [H.sup.+] is several orders of magnitude smaller than the electron capture cross section for a slowly moving or metastably trapped hole. This enhanced proton release at low dose rates or in oxides with high hydrogen concentrations can lead to increased interface trap formation, which is the most common source of enhanced gain degradation in lateral and substrate pnp bipolar transistors. Index Terms--Enhanced low-dose-rate sensitivity (ELDRS), hydrogen, interface trap charge, linear bipolar devices, oxide trap charge, vacancies.

Radiation-induced charge trapping and mobility degradation are measured on uniaxially stressed Hf[O.sub.2]-based nMOSFETs. Controlled external mechanical stress is applied via a four-point bending jig while the samples are irradiated using 10-keV X-rays. Positive charge trapping is observed for unstressed devices, and for devices irradiated under both compressive and tensile stress. Reduced trapped charge is measured as the uniaxial stress level increases. These results suggest that the increased stress leads to a reconfiguration of defect microstructure, as compared to the unstressed devices. The reconfiguration consists of changes in bond lengths and angles and a corresponding change in trap energy levels, which can (1) reduce the probability that a defect can capture holes, (2) increase the probability for electron and trapped-hole recombination, and/or (3) increase the mobility of the transporting holes in the oxides of the devices that are irradiated under stress. These results show that increased mechanical stress in high-k dielectrics does not degrade their radiation hardness. We also observe that the post-irradiation channel mobility degrades less in uniaxially stressed devices than unstressed devices. Index Terms--Hafnium oxide (Hf[O.sub.2]), high-k, metal-oxide-semiconductor-field-effect-transistors (MOSFETs), radiation damage, strained-silicon, uniaxial, X-ray.

The effects of device orientation on heavy ion-induced multiple-bit upset (MBU) in 65 nm SRAMs are examined. The MBU response is shown to depend on the orientation of the device during irradiation. The response depends on the direction of the incident ion to the n- and p-wells of the SRAM. The MBU response is simulated using Monte Carlo methods for a space environment. The probability is calculated for event size. Single-bit upsets in the space environment account for 90% of all events with exponentially decreasing probabilities of larger MBU events. Index Terms--Multiple-bit upset, MBU, MCU, SEU, heavy ion, SRAM, MRED, GEANT4, soft error.

Monte-Carlo radiation transport code is coupled with SPICE circuit level simulation to identify regions of single event upset vulnerability in an SEU hardened flip-flop, as well as predict single event upset cross sections and on-orbit soft error rates under static and dynamic operating conditions. Index Terms--Geant4, MRED, rate prediction, SEU, SPICE.

We report results of first-principles calculations that explain why radiation-induced interface-trap density increases at a slower rate in wet versus dry oxides in the initial stages of interface-trap buildup. Similar effects are observed in MOS devices after exposure to elevated humidity and temperature or after nonhermetic aging. We explore the possible reactions responsible for passivation of dangling bonds near the Si/Si[O.sub.2] interface by water and elucidate a new energetically favorable path of the reaction. Prior to irradiation, the passivation of the dangling bonds happens either with formation of Si-H bonds and release of OH complexes, or with formation of Si-OH bonds and the release of H atoms. Both reactions have activation energies of ~ 0.9 eV and occur rarely at room temperatures. The OH complex is quite mobile, and can migrate along the interface and passivate dangling bonds via the formation of Si-OH bonds. After irradiation and release of protons, the Si-OH and Sill bonds may be formed with lower activation energy through passivation of a positively charged dangling bond by a water molecule. The presence of a hole at the dangling bond causes the resulting passivated SiOH bond and proton to have a lower energy than the initial water and dangling bond, and favors passivation of the dangling bonds. We discuss the relevance of the reactions for modeling the radiation response of wet and dry oxides, aging of MOS devices, and pre-irradiation elevated temperature stress. Index Terms--Dry oxides, first principle calculation, interface traps, passivation, radiation response, water absorption, wet.

As integrated circuits become smaller and more complex, it has become increasingly difficult to simulate their responses to radiation. The distance and time scales of relevance extend over orders of magnitude, requiring a multi-scale, hierarchical simulation approach. This paper demonstrates the use of multi-scale simulations to examine two radiation-related problems: enhanced low-dose-rate sensitivity (ELDRS) in bipolar transistors and single-event effects (SEE) in CMOS integrated circuits. Examples are included that demonstrate how information can be passed from simulation tools operating at one level of abstraction to those operating at higher levels, while maintaining accuracy and gaining insight. Index Terms--Integrated circuits, multi-scale simulation, radiation, single-event effects, total ionizing dose.

Mixed mode TCAD simulations are used to show the effects of guard bands and high density well contacts in maintaining the well potential after a single event strike and thus reduce the width of long transients in a 130-nm CMOS process. Experimental verification of the effectiveness in mitigating long transients was achieved by measuring the distribution of SET pulse widths produced by heavy ions for circuits with isolated contacts and for circuits with guard bands combined with larger contacts in a 130-nm process using an autonomous characterization technique. Heavy-ion test results indicate that controlling the well potential by using guard bands, along with high density well contacts, helps eliminate > 70 % of SETs longer than 1 ns. Index Terms--CMOS, guard band, parasitic bipolar, pulse width, single event transient (SET), single event upset (SEU), soft error, well contact.

Microbeam measurements and TCAD simulations are used to examine the effects of ion angle of incidence on the charge collected from events occurring in a Silicon Germanium (SiGe) Heterojunction Bipolar Transistor (HBT). The results identify the geometrically driven charge-collection mechanisms that dominate the low LET broad beam SEU response. The deep trench isolation that surrounds the transistor significantly modulates the charge transport and, therefore, the charge collected by the collector. A new way of estimating critical charge, [Q.sub.crit], for upset in SiGe HBT circuits is proposed based on TCAD simulation results and measured broadbeam data. Index Terms--Deep trench isolation (DTI), HBT, IBICC, silicon germanium (SiGe), single event upset (SEU), TCAD.

Single event latchup (SEL) in a 65 nm CMOS technology is examined with respect to strike angle of incidence and variations in device temperature. A significant difference in device sensitivity is observed with a change in the orientation of grazing angle strikes. The impact of an extremely high aspect ratio sensitive volume on SEL rate is discussed. It is suggested that SEL experiments should be conducted at various lateral orientations when near-grazing beam angles are tested. Index Terms--Radiation effects, single event latchup, 65 nm.

Heavy ion-induced single events transients (SETs) in advanced digital circuits are becoming a significant reliability issue for space-based systems. In this work, two experiments are performed on devices designed to look specifically at digital single event transients. Small voltage variations, like those that can be found across an integrated circuit, are shown to affect the digital single event transient response significantly. For technologies with supply voltages near 1 V, these potential variations may result in unexpected vulnerability. Index Terms--Heavy ion, ion radiation effects, single event upset (SEU).

The distributions of SET pulse-widths produced by heavy ions in 130-nm and 90-nm CMOS technologies are measured experimentally using an autonomous pulse characterization technique. The event cross section is the highest for SET pulses between 400 ps to 700 ps in the 130-nm process, while it is dominated by SET pulses in the range of 500 ps to 900 ps in the 90-nm process. The increasing probability of longer SET pulses with scaling is a key factor determining combinational logic soft errors in advanced technologies. Mixed mode 3D-TCAD simulations demonstrate that the variation of pulse-width results from the variation in strike location. Index Terms--CMOS, combinational logic, DSET, pulse-width, SET, SEU, single event, single event transient, soft error.

Proton-induced energy deposition in a silicon P-i-N focal plane array is analyzed with Monte Carlo based simulations. These simulations include all physical processes, including events resulting from multiple particles incident on a single pixel, to describe the experimental data accurately. Post-processing of Monte Carlo simulations is done to account for the effects of pile up (multiple hits on a single pixel during one integration time) and non-radiation-induced noise in experiment. The results are compared with experimental data, and demonstrate how direct ionization dominates the cross section, yet fluctuations in dE/dx cause a broad range of energy depositions not addressed by an average LET calculation. An event rate is predicted for a full space proton flux and the dominance of direct ionization is shown and compared to computation using constant LET methods in CREME96. This comparison shows that at lower energies, CREME96 sufficiently predicts the event rate, but at higher energies a high fidelity simulation method is needed to capture the distribution. Index Terms--Energy deposited, event rate, focal plane array, Geant4, Monte Carlo, pile up.

This work draws on experimental and simulation results to derive a generalized SEU response model for bulk SiGe HBTs. The model was validated using published heavy ion and new proton data gathered from high-speed HBT digital logic integrated circuits fabricated in the IBM 5AM SiGe BiCMOS process. Calibrating to heavy ion data was sufficient to reproduce the proton data without further adjustment. The validated model is used to calculate upset event rates for low-earth and geosynchronous orbits under typical conditions. Index Terms--Deep trench isolation, Geant4, geosynchronous orbit, low-earth orbit, rate prediction, silicon-germanium HBT, single-event upset.