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Titanium-based contacts are envisioned for the integration of III–V device contacts on a 300-mm platform, such as photodetectors, semiconductor optical amplifiers (SOAs), and III–V silicon hybrid lasers. For the first time, the impact of the thermal budgets of process integration, back-end of line (BEOL), and long-term thermal stress on the electrical characteristics of the Ti/p-In0.53Ga0.47As and Ti/n-InP contacts has been investigated. Additional physical characterizations have been used to supplement the electrical properties on both systems. Results have indicated that, given a thermal budget between 350 °C and 450 °C during 60 s right after metal deposition, 1) Ti as a contact metal has led to contact resistivity in low $10^{-{5}}\,\,\Omega \cdot \text {cm}^{{2}}$ for p-contacts and in mid $10^{-{5}}\,\,\Omega \cdot \text {cm}^{{2}}$ for n-contacts, which is in accordance with the device requirements; and 2) process integration, BEOL, and long-term thermal stress will not induce any change of the electrical properties. In the scope of III–V silicon hybrid laser contact integration, Ti has hence been evidenced as a suitable candidate for both p- and n-contacts.

International audience; Although silicide oxidation was studied 20years ago, the interest in obtaining a robust process for new applications remains significant today. Indeed, the new architectural development process requires dense and narrow spaces. In this study, attempts were made to bury a silicide layer under a protective silica layer in order to keep the physical and electrical properties of the silicide constant after oxidation. Thus, we first tried to reproduce and study these conditions and, once acquired, aimed to decrease the oxidation temperature in order to meet industrial requirements. Titanium (Ti) and nickel (Ni) were chosen for their metallurgical interest and their integration capability in devices. Four different groups of silicide (TiSi, TiSi2, Ni2Si, NiSi) were targeted by adjusting the temperature. Then, all of the silicides, including one pure Si wafer, were oxidized using dry, wet and plasma techniques. In situ scanning electron microscopy, spectroscopic ellipsometry and X-ray reflectivity measurements were carried out simultaneously before and after oxidation of the silicide to characterize the SiO2 and silicide morphology, thickness and density. We found that after 800 degrees C dry oxidation, Ti silicide was totally oxidized, which was an unexpected result. But, Ni silicide showed an agglomeration phenomenon after 500 degrees C and 800 degrees C dry oxidation. Although, after wet oxidation, it was confirmed that the highest SiO2 thickness formed, the NiSi surface roughness was higher. In the case of plasma oxidation, we obtained a thin layer (approximate to 1nm) of SiO2 on NiSi with an extremely smooth surface.

Thin films of superconducting V$_3$Si were prepared by means of RF sputtering from a compound V$_3$Si target at room temperature onto sapphire and oxide-coated silicon wafers, followed by rapid thermal processing under secondary vacuum. The superconducting properties of the films thus produced are found to improve with annealing temperature, which is ascribed to a reduction of defects in the polycrystalline layer. Critical temperatures ($T_\text{c}$) up to $15.3\,$K were demonstrated after thermal processing, compared to less than $1\,$K after deposition. The $T_\text{c}$ was found to always be lower on the silicon wafers, by on average $1.9(3)\,$K for the annealed samples. This difference, as well as a broadening of the superconducting transitions, is nearly independent of the annealing conditions. In-situ XRD measurements reveal that the silicide layer becomes strained upon heating due to a mismatch between the thermal expansion of the substrate and that of V$_3$Si. Taking into account the volume reduction due to crystallization, this mismatch is initially larger on sapphire, though stress relaxation allows the silicide layer to be in a relatively unstrained state after cooling. On oxidized silicon however, no clear evidence of relaxation upon cooling is observed, and the V$_3$Si ends up with an out-of-plane strain of 0.3\% at room temperature. This strain increases as the sample is cooled down to cryogenic temperatures, though the deformation of the polycrystalline layer is expected to be highly inhomogeneous. Taking into account also the reported occurrence of a Martensitic transition just above the critical temperature, this extrapolated strain distribution is found to closely match an existing model of the strain dependence of A-15 superconducting compounds., 7 pages, 5 figures

The development of Complementary Metal Oxide Semiconductor (CMOS)-compatible contact technology on III–V materials based on Ti for electronics or photonics applications was studied. In this framework, solid-state reactions between Ti thin films (20 nm) and In0.53Ga0.47As layers grown on InP substrates were studied from the as-deposited state up to 550 °C using a combination of advanced X-ray diffraction (in-plane reciprocal space mapping), Auger electron spectroscopy and transmission electron microscopy analyses. The phase formation sequence was solved. At low temperature, an amorphous Ti–Ga–As intermixing layer coexists with the Ti film. As of 250 °C, the first crystalline phase to form is Ti 2 Ga 3 . At 300 °C, a new crystalline phase appears, namely TiAs 2 . On the other hand, TiAs and metallic In form at 350 °C and Ti is completely consumed between 450 and 500 °C. The diffusion of the various species lead to the formation of a non-nominal Ga-rich In x Ga 1−x As layer and at 550 °C to the formation of polycrystalline GaAs. Ti was found to be the main diffusing species at low temperature whereas III and V elements are the dominant diffusing species at higher temperatures. The nature of the phases formed above and below the original Ti/InGaAs interface might explain the In accumulation at the interface, the TiAs phase acting as a diffusion barrier.

International audience; Using a metal-organic tungsten based precursor, a fluorine-free tungsten thin film has been obtained. The process deposition recipe includes a plasma-enhanced CVD (PECVD) step and atomic layer deposition (ALD) cycles. A set of physicochemical characterizations including X-ray reflectivity (XRR), in-plane X-ray diffraction (XRD), wavelength dispersive X-ray fluorescence (WDXRF), plasma profiling time of flight mass spectrometry (PPTOFMS) and microscope observations has been realized in order to study the W thin film structure and properties. The film is perfectly conformal whatever the structure size investigated (from tens of nanometers to micrometers wide). It was also highlighted that the F-free W film exhibits the lowest electrical resistivity phase (α-W) but is not pure. Indeed, in addition to a top surface oxidation, a layer located at the W film / substrate interface is present. This interface layer (IL) contains impurities, including carbon and oxygen, due to ligand decomposition. This IL might be deposited during the soak step or during the PECVD step. The W liner with thicknesses ranging from 3 to 4 nm has been implemented on PCRAM structures in order to evaluate its impact on contact plug resistivity. First electrical results are promising and demonstrate the interest of using a F-free low resistance W liner. At the aspect ratio studied, the gain in terms of contact plug resistivity is about 20% compared to the process of reference using a TiN liner. Modeling shows that this benefit is mainly due to the reduction of interface resistances.

In the context of the development of silicon photonics, various Ti- and Ni-based alloyed metallizations have been investigated for the purpose of forming low resistivity and Si CMOS-compatible contacts to n-InP. The innovative Ni2P metallization combined with an in situ Ar+ preclean represents the most suitable available solution for the formation of ohmic contacts with a specific contact resistivity as low as $4.3 \times 10^{-6}~\Omega ^{2}$ on such a semiconductor. The latter additionally presents the advantage of being stable at least up to 350 °C and could therefore withstand additional integration processes conducted at this temperature.

3D sequential integration is a promising alternative to conventional scaling down approach: by stacking transistors level on top of each other, benefits on device density and performance are achieved. However, although the thermal processing of top transistors is currently restricted in order to avoid bottom CMOS degradation, it has been highlighted that Ni0.80Pt0.10 silicide source/drain (S&D) contact remains the most sensitive element to the thermal budget, especially on raised Si0.7Ge0.3:B S&D for pMOS transistors. In this context, a complete and systematic study on self-aligned silicide (SALICIDE) process has been proposed: alternative metallization as well as source and drain surface pre-treatments have been carried out. Indeed, a novel Ni-based silicide, the Ni0.9Co0.1 provides a better stability on unpatterned 300 mm wafers. This stability has been further improved when combined with epitaxial silicon capping layer (Si-Cap) and Si0.7Ge0.3:B S&D pre-amorphization implant (PAI) using Ge beam. For the first time, a successful Ni0.9Co0.1 SALICIDE implementation has been demonstrated on pMOS planar FDSOI transistor with both PAI and Si-Cap. Moreover, the presence of Si-Cap contributes to reduce silicide roughness and limits Ge partition that damage Si0.7Ge0.3:B S&D. (© 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

In this progress review, an overview of the CMOS-compatible contact technology developed at the CEA-Leti for Si photonics applications is proposed. The elaboration of III–V/Si hybrid lasers implies the development of ohmic contacts on n-InP and p-InGaAs III–V materials. In this way, a contact technology fully compatible with a Si-Fab line was developed. The results presented in this manuscript cover a wide scope: from surface preparation and solid-state reaction to electrical results and integration guidelines. The metallurgy of several systems including Ni/InGaAs, Ni/InP, Ti/InGaAs and Ti/InP was studied. The direct metallization of III–V materials using Ni2P was also introduced. Most of the studied metallizations provided efficient solutions for achieving ohmic contacts on n-InP and p-InGaAs. Finally, the contact technology developed in the framework of this study was successfully integrated on 200 mm CMOS-compatible III–V/Si hybrid lasers.

This study focuses on silicide formation on phosphorus in-situ doped samples, the phosphorus diffusion and its distribution during the solid-state reaction. The silicidation is achieved with a 16 nm thin film of Ni0.9Pt0.1 followed by a two steps annealing process using rapid thermal annealing, selective etching and dynamic surface annealing. Silicide formation is investigated thanks to in-situ X-ray diffraction and X-ray reflectivity, while the phosphorus concentration profiles after silicidation are obtained by Time-of-Flight Secondary Ion Mass Spectroscopy. Based on these profiles, simulation of the phosphorus redistribution is achieved. The latter is linked to a fast diffusion in the silicide and at its grain boundaries. This feature is put forward to explain how doping may influence the phase sequence of silicide formation.

In this work, the solid-state reaction between a 7 nm thick Ni0.9Co0.1 film and a silicon substrate has been studied. By combining various characterization methods (e.g. sheet resistance measurement, X-ray reflectivity, X-ray diffraction), a comprehensive phase sequence of the NiCo silicide formation has been proposed. At low temperature, we observed the formation of metal-rich Ni2Si-like phases: δ-(NiCo)2Si and θ-(NiCo)2Si. Contrary to Ni0.9Pt0.1 based silicides, the δ-Ni2Si phase appears before the θ-Ni2Si one. Beyond 320 °C, the (NiCo)Si monosilicide formation is initiated and this latter is complete at 400 °C. The presence of Co strongly decreases the NiSi2 formation temperature. This early formation of disilicide allows avoiding film agglomeration and enhances the thermal stability of NiSi silicide. Complementary studies using wavelength dispersive X-ray fluorescence allowed studying the cobalt behavior and highlighted the formation of a Co composition gradient into the metal-rich silicide phases at relatively low temperature (220–260 °C).

From surface preparation and solid-state reaction to laser integration, a short overview of the CMOS-compatible contacts developed in our group on n-InP and p-InGaAs for Si photonic applications is proposed.

In this paper, we present a short overview of the CMOS-compatible contact technology developed in our group on n-InP and p-InGaAs for Si photonic applications. Obtained results cover a wide spectrum: from surface preparation and solid-state reaction to electrical results and laser integration. The metallurgy of several systems including Ni / InGaAs, Ni / InP, Ti / InGaAs and Ti / InP has been studied. Most of the metallizations studied provide efficient solutions for contacting n-InP and p-InGaAs. Finally, guidelines for integrating low resistivity contacts are proposed.

Phosphorus diffusion and its distribution during the solid-state reactions between Ni0.9Pt0.1 and implanted Si substrates are studied. Silicidation is achieved through a first rapid thermal annealing followed by a selective etching and a direct surface annealing. The redistribution of phosphorus in silicide layers is investigated after the first annealing for different temperatures and after the second annealing. Phosphorus concentration profiles obtained thanks to time of flight secondary ion mass spectrometry and atom probe tomography characterizations for partial and total reactions of the deposited 7 nm thick Ni0.9Pt0.1 film are presented. Phosphorus segregation is observed at the Ni0.9Pt0.1 surface and at Ni2Si interfaces during Ni2Si formation and at the NiSi surface and the NiSi/Si interface after NiSi formation. The phosphorus is evidenced in low concentrations in the Ni2Si and NiSi layers. Once NiSi is formed, a bump in the phosphorus concentration is highlighted in the NiSi layer before the NiSi/Si interface. Based on these profiles, a model for the phosphorus redistribution is proposed to match this bump to the former Ni2Si/Si interface. It also aims to bind the phosphorus segregation and its low concentration in different silicides to a low solubility of phosphorus in Ni2Si and in NiSi and a fast diffusion of phosphorus at their grain boundaries. This model is also substantiated by a simulation using a finite difference method in one dimension.

International audience; The metallurgical properties of the Ti/InP system meet a great interest for its use as a contact in the scope of various applications such as the Si Photonics. The investigations conducted on this system highlight the initiation of a reaction between the Ti and the InP substrate during the deposition process conducted at 100 °C. The simultaneous formation of two binary phases, namely, Ti$_2$In$_5$ and TiP, is attributed to the compositional gradient induced in the InP by the wet surface preparation and enhanced by the subsequent $in situ$ Ar$^+$ preclean. Once formed, the TiP layer acts as a diffusion barrier inhibiting further reaction up to 450 °C in spite of the presence of an important Ti reservoir. At higher temperature, however, i.e., from 550 °C, the reaction is enabled either by the enhancement of the species diffusion through the TiP layer or by its agglomeration. This reaction gives rise to the total consumption of the Ti$_2$In$_5$ and Ti while the TiP and In phases are promoted.

International audience; In this paper, in order to provide a comprehensive overview of the opportunities and limitations of the metal/insulator/semiconductor contacts approach, expected performance based on ideal contact simulations as well as key practical aspects are presented. While the former give us a glimpse of the theoretical potential of this paradigm, mainly to contact nFETs, the latter highlights concerns about the electrical characterization of such contacts along with issues occurring during their physical implementation. (c) 2017 The Japan Society of Applied Physics

International audience; Solid-state reactions between Ni1-uPtu (0< u < 0.15 at.%) and Si0.7Ge0.3 after rapid thermal annealing at 280 to 700 degrees C were studied. Numerous physical and chemical characterizations such as sheet resistance analysis, scanning electron microscopy, transmission electron microscopy, Xray diffraction measurement, and atom probe tomography were used to determine the formation and morphological degradation mechanisms of the pure Ni-based germanosilicide. In particular, atom probe tomography was used to quantitatively determine the element distribution in 3D and at the atomic scale. Similar mechanisms for the degradation were found for the Ni mono germanosilicide with and without Pt and led to Ge rich Si1-xGex regions that are etched away by the selective etch. These mechanisms, Ge out-diffusion and agglomeration, have a combined effect on the germanosilicide degradation and occurs through Ge and Ni diffusion, respectively. Adding Pt increases the thermal stability of the layer owing to changes in the phase sequence and texture and strong binding with Ge atoms. Several models are developed to explain the different steps of the film morphological degradation. The thermodynamics description of the equilibrium in the quaternary Ni-Pt-Si-Ge system allows us to rule out a pure thermodynamics explanation for the morphological stabilization due to Pt addition. Published by AIP Publishing.

The integration of III-V/Si hybrid lasers on a 300 mm platform for photonic applications requires the development of dedicated CMOS-compatible contacts, for which nickel-based ones are very good candidates. In this scope, this work presents and compares the impact of in situ preclean based on argon (Ar) or helium (He) plasma on the surface integrity of InP prior to the nickel (Ni) contact deposition. The resulting surface morphology, element distribution, phase formation sequence of the Ni/InP system, and electrical behavior of Ni/n-InP contacts are detailed using morphological, structural, and electrical characterizations. The results show that Ar preclean significantly damages the InP surface by generating high roughness and creating indium (In) dots on the top surface, while He preclean seems to induce lighter damages and no In dots. Although the phase sequence of the Ni/InP system is overall the same for each preclean, the electrical behavior differs depending on the nature of the preclean. On one hand, Ni/n-InP Ar-precleaned contacts exhibit nonohmic behavior for each investigated thermal budget. On the other hand, He-precleaned contacts features ohmic behavior for the as-deposited state and thermal anneals up to 350 ° C for 60 s. They, however, become nonohmic after anneals of 400 and 450 ° C for 60 s. These results, hence, suggest that the difference of electrical behavior obtained between Ar and He-precleaned Ni/n-InP contacts is due to differences in the state surface and morphology.The integration of III-V/Si hybrid lasers on a 300 mm platform for photonic applications requires the development of dedicated CMOS-compatible contacts, for which nickel-based ones are very good candidates. In this scope, this work presents and compares the impact of in situ preclean based on argon (Ar) or helium (He) plasma on the surface integrity of InP prior to the nickel (Ni) contact deposition. The resulting surface morphology, element distribution, phase formation sequence of the Ni/InP system, and electrical behavior of Ni/n-InP contacts are detailed using morphological, structural, and electrical characterizations. The results show that Ar preclean significantly damages the InP surface by generating high roughness and creating indium (In) dots on the top surface, while He preclean seems to induce lighter damages and no In dots. Although the phase sequence of the Ni/InP system is overall the same for each preclean, the electrical behavior differs depending on the nature of the preclean. On one han...

International audience; The solid-state reaction between Ni and In In$_{0.53}$Ga$_{0.47}$As on an InP substrate was studied by X-ray diffraction (XRD) and scanning transmission electron microscopy-energy-dispersive X-ray spec-troscopy techniques. Due to the monocrystalline structural aspect of the so-formed intermetallic, it was necessary to measure by XRD a full 3D reciprocal space mapping in order to have a complete overlook over the crystalline structure and texture of the intermetallic. The formation of the inter-metallic was studied upon several different Rapid Thermal Annealings on the as-deposited samples. Pole figures analysis shows that the intermetallic features a hexagonal structure (P6$_3$$/mmc$) with an NiAs-type (B8) structure. Although only one hexagonal structure is highlighted, the intermetallic exhibits two different domains characterized by different azimuthal orientations, axiotaxial relationship, and lattice parameters. The intermetallic phases seem to present a rather wide range of stoichiometry according to annealing temperature. The texture, structure, and stoichiometry of the intermetallic are discussed along with the evolution of lattice parameters of the Ni-InGaAs phase.

In this paper, the recent advances in low temperature process in view of 3D VLSI integration are reviewed. Thanks to the optimization of each low temperature process modules (dopant activation, gate stack, epitaxy, spacer deposition) and silicide stability improvement, the top layer thermal budget fabrication has been decreased in order to satisfy the requirements for 3D VLSI integration.

International audience; The composition and morphology of the product phase after the reaction of Ni thin film with In0.53Ga0.47As substrate at 350 degrees C were investigated by atom probe tomography, X-ray diffraction, and scanning electron microscopy. Results show the formation of a unique Ni-3(In0.53Ga0.47) As phase with a low concentration in-depth gradient of Ni and the decoration of the grain boundaries by In atoms. These analyses indicate that Ni is the main diffusing specie during the growth of Ni-3(In0.53Ga0.47) As phase. The volume of the product phase is higher than the volume of the consumed Ni film as expected for the formation of Ni-3(In0.53Ga0.47) As phase. Published by AIP Publishing.

International audience; Opening the way to large bandwidths and high data rates Silicon Photonics is of great interest. In the scope of co-integrating III-V devices with CMOS very large scale integration (VLSI), innovative contacts to III-V materials have to be developed. In this paper we study the metallurgical and electrical properties of Ni-based metallizations to n-InP and p-InGaAs. It appears that the integration of both metallizations must be realized at temperatures lower than or equal to 340 °C starting with that on n-InP.

Auteur correspondant: "philippe.rodriguez@cea.fr"; International audience; In this work, we studied the solid-state reaction between a Ni$_{0.9}$Co$_{0.1}$ film and a silicon substrate. NiCo silicide is considered to substitute Ni-and NiPt-based silicides in 3D integration in order to extend the bottom transistor thermal stability. Thanks to the combined analysis of sheet resistance data, X-ray reflectivity spectra modelling, X-ray diffraction and wavelength dispersive X-ray fluorescence analyses on Ni$_{0.9}$Co$_{0.1}$ /Si samples annealed at various temperatures, we were able to describe the phase sequence of the NiCo silicide formation.

International audience; In this paper, some key fundamental aspects of Metal / Insulator / Semiconductor contacts as well as practical issues occurring with their implementation are reviewed in order to fully comprehend the opportunities and limitations of this approach.

In 3D sequential integration, the top transistor thermal budget must be reduced to preserve bottom MOSFET performance. In order to relax this thermal budget limitation, the thermal stability of the bottom level must be increased, especially for the silicide. In that purpose, Ni0.9Co0.1 alloy is proposed to replace the current Ni0.85Pt0.15 silicide. For the first time, this Ni0.9Co0.1 salicide has been integrated on pMOS FDSOI transistors with state of the art process leading to performance improvements compared to the standard Ni0.85Pt0.15 salicide. In this study, the cobalt incorporation into the salicide has been investigated to enhance its thermal stability.

International audience; Silicon photonics is of great interest as it opens the way to large bandwidth and high data rates. A pioneer Silicon photonics scheme consists in integrating III-V lasers on the SOI substrates containing the passive components. However, key developments are necessary to co-integrate III-V devices with CMOS very large scale integration (VLSI). In this paper we propose a CMOS-compatible integration scheme of contacts (i.e. semiconductor metallization and plug) on III-V surfaces taking into account the limitations fixed by the operating laser device. Based on metallurgical, morphological, optical and electrical studies, processes are submitted and reviewed for the purpose of forming stable and reproducible contacts with low resistivity in a 200 millimeters fab line.

International audience; In this work, we studied the pretreatment of InGaAs layers by employing Ar-and He-based direct plasmas and NH$_3$ , H$_2$ , NF$_3$ /NH$_3$ remote plasmas. All the remote plasmas involved in this study were inadequate to remove the InGaAs native oxides. Moreover, for NF$_3$ /NH$_3$ exposed samples, we noticed the addition of undesirable In–F and Ga–F bonds. Concerning Ar and He direct plasmas, investigations exhibited that both seem to be efficient for removing arsenic oxides whereas the elimination of indium oxides is more effective with Ar plasma. We also studied the addition of hydrogen into He direct plasma and we demonstrated that increasing the H2 content leads to decreasing the removal of arsenic oxides. The impact on indium oxides is also notable as we observed a reducing effect of hydrogen on indium and the emergence of In–In type bonds. Finally, whatever the plasma pretreatment, no degradation of surface morphology and roughness was observed by AFM. The RMS values obtained after surface treatments are similar with the ones acquired for reference samples.

The metallurgical properties of the Ni/n-InP system meet a great interest for its use as a contact in the scope of Photonics laser application. We report the formation of a compositionally non-uniform Ni-In-P amorphous layer during the early stages of the contacts elaboration, which include HCl and Ar+ plasma cleanings prior to the metal DC sputtering. During various heat treatments, the coexistence of the Ni2P and Ni3P binary phases and the Ni2(InP) ternary phase were observed while In release was featured. For temperatures equal to or greater than 350?C we highlighted the formation of In phase. Thanks to RTP and long-time annealing processes, we pointed out the predominance of the diffusion and/or interfacial reactions on the formation of the Ni2P, Ni3P and Ni2(InP) phases and that of nucleation or melting/solidification on the formation of In agglomerates. Display Omitted Modification of the InP surface by the Ar+ pre-cleanGrowth of Ni2P, Ni3P and Ni2(InP) phases associated to Indium release during rapid annealing treatmentsFormation of the Ni2P, Ni3P and Ni2(InP) phases controlled by the diffusion and/or interfacial reactionsFormation of In clusters controlled by precipitation or melting/solidification for temperatures equal to or greater than 350?C

Ni-GeSn based materials are promising in order to obtain contacts in complementary metal oxide semiconductor and Si photonic devices. In this work, a systematic and comprehensive study of the solid-state reaction between NiPt thin films and Ge0.9Sn0.1 layers is carried out. A particular focus is given on the impact of the addition of 10 at. % of Pt in Ni thin films. In situ X-ray diffraction and in-plane reciprocal space map measurements reveal a sequential growth in which the first phase appearing corresponds to a Ni-rich phase: (Ni0.9Pt0.1)5(Ge0.9Sn0.1)3. Then, at 245 °C, the Ni-rich phase vanishes to the benefit of the mono-stanogermanide phase (Ni0.9Pt0.1)(Ge0.9Sn0.1), which is unstable. At 360 °C, a more stable (Ni1– yPty)(Ge1– xSnx) phase is obtained concomitantly to the formation of PtSnx compounds. Finally, Sn segregation occurs at even higher temperatures. Even if Pt addition in Ni thin films complicates the phase formation sequence, it positively impacts the surface morphology and roughness, delays film agglomeration and Sn segregation, and stabilizes the electrical properties of the stanogermanide in a wide range of temperatures.

session 5: 3D Systems and Packaging; International audience; 3D VLSI with a CoolCube™ integration allows vertically stacking several layers of devices with a unique connecting via density above a million/mm 2 . This results in increased density with no extra cost associated to transistor scaling, while benefiting from gains in power and performance thanks to wire-length reduction. CoolCube™ technology leads to high performance top transistors with Thermal Budgets (TB) compatible with bottom MOSFET integrity. Key enablers are the dopant activation by Solid Phase Epitaxy (SPE) or nanosecond laser anneal, low temperature epitaxy, low k spacers and direct bonding. New data on the maximal TB bottom MOSFET can withstand (with high temperatures but short durations) offer new opportunities for top MOSFET process optimization.

We have investigated the impact of various plasma treatments on InGaAs layers. Argon- and helium-based direct plasmas are more efficient than remote plasmas for the removal of InGaAs native oxides. We have demonstrated that the nature of direct plasma influences the InGaAs oxides removal efficiency. Indeed, both types of plasma seem to be efficient for removing arsenic oxides whereas the elimination of In oxides is more effective with Ar plasma. Hydrogen addition in He plasma impacts the removal of InGaAs oxides and appears to have a reducing effect on indium atoms. Whatever the nature of the pretreatment, the surface morphology and roughness of InGaAs layers were not significantly impacted.

International audience; In this work we introduce the use of physical plasmas (e.g. Ar-and He-based plasmas) in order to study the in situ cleaning (prior to metal deposition) of InGaAs layers dedicated to the realisation of self-aligned contacts. For the characterisation of cleaning efficiency, we performed surface analyses like X-ray photoelectron spectroscopy and Fourier transform infrared spectroscopy in attenuated total reflection mode. The first results described in this work are encouraging. We have found efficient processes for removing totally or partially III-V native oxides.

We studied the solid-state reaction of Ni thin films with InGaAs layers grown on InP or Si substrates. The inter-metallics obtained carried an hexagonal structure, but yielded a difference in orientation regarding either the substrates or the annealing temperature.

We report for the first time the fabrication and the electrical operation of a Ge and Si based CMOS planar scheme with GeOI pFETs and SOI nFETs, taking advantage of the best mobility configuration for holes (Ge) and electrons (Si). The hybrid Ge/Si wafers have been obtained by the local Ge enrichment technique on SOI wafers. A sub 600 C CMOS transistor process featuring High-K/Metal Gate and silico-germanidation was used to obtain functional high mobility CMOS transistors (down to L = 160 nm). Excellent low-field mobility values for electrons in Si nFETs and holes in Ge pFETs were achieved (275 and 142 cm 2 /V/s resp.).

In this paper, we report on the solid state reactions of Ni thin films (6nm to 12nm) deposited on Ge (001). Especially, the influence of the substrate dopants (As and BF2) is investigated. TEM and SIMS analyses point out the presence of an additional phase at the NiGe/Ge interface. EELS and SIMS measurements reveal that this phase contains Ni and Ge. On the another hand, ex-situ XRD spectra allows to determine a change in NiGe texture with Ge(001) doped or undoped. In situ XRD confirms that the kinetics shifts from simultaneous to sequential growth of nickel germanides, as predicted previously. Moreover, a recrystallization of NiGe is observed only on the undoped substrate. This recrystallization can be attributed to a contribution of a stress term in addition of the surface energy. This stress term becomes minor when temperature increases and Ni-rich phase is completely consumed. The presence of dopants, probably at the NiGe/Ge interface co uld reduce this stress and thus the recrystallization.

3D Sequential Integration (3DSI) with ultra-small 3D contact pitch (

The impact of dual Ge/C pre-amorphization implantation (PAI) processes on the Ni0.9Pt0.1(7 nm)/Si system phase sequence has been investigated by advanced X-ray diffraction techniques and transmission electron microscopy (TEM). Using a high carbon implantation dose, it is found that the expected development of Ni-rich phases is not observed: a thick amorphous Ni1−xPtxSi layer developed until Ni0.9Pt0.1 full consumption, followed by the development of a thin crystalline Ni1−xPtxSi layer along the TiN interface. By increasing the temperature further, this last one abruptly thicken, creating the final silicide layer. An alternative model to grain boundary diffusion is discussed, accounting for the final distribution of the foreign species within the silicide layer. The use of Ge in dual Ge/C PAI processes is proposed to impact the growing mechanisms by alloying to fine-tune the carbon distribution in the substrate sub-surface.