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Carrier mobilities and concentrations were measured for different p- and n-type silicon materials in the temperature range 0.3–300 K. Simulations show that experimentally determined carrier mobilities are best described in this temperature range by Klaassen’s model. Freeze-out reduces the carrier concentration with decreasing temperature. Freeze-out, however, depends on the dopant type and initial concentration. Semi-classical calculations are useful only for temperatures above 100 K. Otherwise quantum mechanical calculations are required.

We present and discuss the infrared properties of molybdenum silicide thin films, molybdenum silicide photonic crystals and the electromigration of molybdenum silicide. Magnetronsputtered and annealed molybdenum silicide layers were investigated via infrared spectral ellipsometry. Simulations of optical properties of molybdenum silicide photonic crystals [metal-insulator-metal structures] show that properties influenced by the size of the structures differ to those of widely used photonic crystals made of Ag. The infrared absorption of MIM-structures comprising of a solid molybdenum silicide layer and one molybdenum silicide layer in form of disks were simulated for different disk diameters and layer thicknesses. A first maximum of absorption (at about 2740 nm) is almost independent of the diameter of the molybdenum silicide disk. A second maximum of absorption (7120 nm -7750 nm) shows an increase of its resonance wavelength with increasing disk diameter. A third maximum of absorption (at about 11000nm) instead shows a respective decrease. In the simulations the thicknesses of the metal layers and the dielectric layer were varied. Changes in the thickness of the dielectric layer caused greater changes in the absorption spectra than changes in the thicknesses of the metal layers. For the application in thermal emitters, the knowledge of electromigration properties of molybdenum silicide layers is crucial. Investigations via accelerated tests with different acceleration factors are demonstrated for test structures. We investigated structures based on molybdenum silicide and for comparison with a well known system analogous structures made of aluminum. We find that molybdenum silicide shows considerably lower electromigration than aluminium.

For mono-crystalline Ge the indirect luminescence intensity declines upon growing temperature from 80 to 300 K, whereas for dislocated Ge structures the opposite behavior occurs. These findings are comparable to earlier observations on Si. The drop of the luminescence in dislocated material upon lowering temperature was attributed to the increase of the competing non-radiative recombination due to shallow dislocation states. In opposition to the indirect luminescence, the character of the direct Ge luminescence, i.e. incline of intensity upon growing temperature, is not converted by dislocations. The measured behavior of the direct peak position of Ge, in the temperature range between 80 and 300 K, is in accordance with calculated dependence and reflects the direct bandgap energy. The observed red shifts in dislocated Ge structures are shown to be produced by tensile strain, bandgap narrowing and by the Sn-content of GeSn quantum wells, respectively. A direct influence of dislocations could not be observed. Satisfying understanding of the existing temperature behavior of the indirect Ge peak position is on embryonic stage.

A significant increase of the drain current is verified if defined numbers and types of dislocations are present in the channel of MOSFETs. For pMOSFETs, analysed here, an enhancement by a factor of eight exists if mixed dislocations are placed in the channel. The drain current increase is caused by higher concentration and higher mobility of holes on dislocations. It is shown that cores of mixed dislocations possess uniaxial compressive strain components in the order of e ≅ –0.1 which are significantly higher than in the strain field surrounding a dislocation. The exceptional high uniaxial strain results in dramatic alterations of the silicon band structure. Upward shifts of the upper valence bands appear forming a quantum wire. The generation of the quantum wire forces hole confinement along dislocations and generates a one-dimensional hole gas (1DHG). Confinement and energy quantization are assumed to be most important for the increased carrier transport along dislocations. (© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

In conjunction with the two-level model the temperature behaviour of the dislocation-related D1-peak follows the T-behaviour of the band gap. Based on luminescence observations in our laboratory and on literature data we propose a ∼30 meV wide domain of the D1 peak. Altogether, the D1-peak position ranges between about 0.76 eV at 300 K and nearly 0.84 eV at a few K. It was shown that the energetic shift for a certain temperature is caused by external electric fields, by excitation level, that affects the intrinsic dislocation field, and by elastic stress. The luminescence of oxygen-related defects / precipitates might be described by a line at ∼ 0.77 eV (P-line) that does not depend on temperature. (© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Dislocations are elementary crystal defects. Their dimensions of about 1 nm2 (cross-section area) and lengths of a few micrometers characterize the defects itself as (native) nanostructures embedded in a perfect crystalline matrix. The structure and properties of dislocations in silicon have been studied for more than five decades by numerous analytical technics. Introducing dislocations into electronic devices result in significant effects on device parameters. A detrimental effect was proved if dislocations are generated in an uncontrolled manner by high-temperature treatments during processing. Therefore they are avoided. A beneficial effect, however, is obtained if dislocations are generated far from device active areas. This effect is used, for example, as internal gettering of impurities. Furthermore, measurements on individual dislocations exhibit several extraordinary optical and electronic properties. For instance, an increase of the electrical conductivity of about four orders of magnitude compared to that of bulk silicon was measured along dislocations. If these distinguished properties are usable, MOSFETs with dimensions below 10 nm and high ION currents are feasible. Their realization, however, requires the defined and reproducible generation of dislocation arrays. The present paper describes a technique to generate defined dislocation arrays, summarizes new results about the properties of individual dislocations, and demonstrates the effect of dislocations on the performance of devices. A smart technique to realize two-dimensional arrays of dislocations is semiconductor wafer direct bonding. The technique allows one not only to control the type of the dislocations in the array, but also to adjust the distance between defects making it possible to analyze individual dislocations. In addition, the realization of dislocation arrays in thin SOI layers eliminates the interaction with bulk defects. Measurements on a few or individual dislocations proved their extraordinary properties caused by the nanowire behavior. Fig. 1 shows the electroluminescence spectrum of a pn-LED with dislocations at room temperature. The D1 to D3 lines in the spectrum represent the strong radiative recombination by dislocations, while band-to-band (BB) excitation is suppressed by using thin SOI layers. Previous investigations showed that the appearance of the D-lines depends on the dislocation type making it possible to configure mono- or polychromatic light emitters. Moreover, the wavelengths of the D-lines between 1300 nm and 1550 nm, their reasonable efficiency, and CMOS-compatible fabrication qualify dislocation networks as promising candidates for silicon-based, on chip light emitters for optical data communication. The incorporation of dislocations in the channel of SOI MOSFETs, Tunnel-FETs, and pn-diodes enables a detailed characterization of electronic properties of the defects. Because dislocations are parallel to - directions, they are parallel to the channel orientation and source and drain form direct contacts. An increase of the drain current (ID) by a factor of 50 is obtained if dislocations are present in the channel of nMOSFETs (Fig. 2). This suggests a preferred electron transport along dislocations. Decreasing the number of dislocations result in an exceptional increase of ID. A current density of J = 3.8∙1012 A/cm2 is measured for a single dislocation, which is consistent with a resistivity of r = 1∙10-8 Wcm. This corresponds to supermetallic properties of dislocations. Reasons of the exceptional behavior are discussed in combination with 2- and 3-dimensional device simulations using classical and quantum mechanical simulation paths. Further details about the electronic properties of dislocations are obtained by low-temperature measurements. The existence of a 1-dimensional electron gas on dislocations is proved. This, for instance, is the reason for Coulomb blockades characterizing single electron transitions. Concepts of the use of the exceptional electronic properties of dislocations in nanometer-scaled devices are figured.

Dislocations are basic crystal defects and represent one-dimensional native nanostructures embedded in a perfect crystalline matrix. Their structure is predefined by crystal symmetry. Two- dimensional, self-organized arrays of such nanostructures are realized reproducibly using specific preparation conditions (semiconductor wafer direct bonding). This technique allows separating dislocations up to a few hundred nanometers which enables electrical measurements of only a few, or, in the ideal case, of an individual dislocation. Electrical properties of dislocations in silicon were measured using MOSFETs as test structures. It is shown that an increase of the drain current results for nMOSFETs which is caused by a high concentration of electrons on dislocations in p-type material. The number of electrons on a dislocation is estimated from device simulations. This leads to the conclusion that metallic-like conduction exists along dislocations in this material caused by a one-dimensional carrier confinement. On the other hand, measurements of pMOSFETs prepared in n-type silicon proved the dominant transport of holes along dislocations. The experimentally measured increase of the drain current, however, is here not only caused by an higher hole concentration on these defects but also by an increasing hole mobility along dislocations. All the data proved for the first time the ambipolar behavior of dislocations in silicon. Dislocations in p-type Si form efficient one-dimensional channels for electrons, while dislocations in n-type material cause one- dimensional channels for holes.

A detailed physical investigation of the H-induced microstructural damage in (0001) AlN epitaxial layers at various implantation temperatures is presented. Cross-sectional transmission electron microscopy revealed that in the case of samples implanted at 300 C, extended defects (nanocracks) were formed only within � 50 nm region situated below the H-concentration peak in the damage band of width � 280 nm compared with lower implantation temperatures. This implantation temperature-dependent behavior of the microstructural damage decides the morphology of the top buckled surface. Various favorable conditions for the buckling of H-implanted surface in the form of large area exfoliation are proposed based on the present study.

The influence of GBs contained in the channel of MOS-FETs - fabricated in thin SOI layers - is demonstrated. The drain current measured at room temperature increases about 50 times for nFETs and about 10 times for pFETs, respectively, as compared to reference devices. The observations might be interpreted as a strong increase of the mobility of charge carriers. Moreover, the observed stepwise changes of the drain current at 5 K may point to Coulomb blockades.

Polymer Dynamics While free surfaces should allow polymer chains to move faster than in the bulk, the presence of a substrate might slow down the motion if there is an attraction between the two. Tress et al. (p. 1371 ; see the Perspective by Russell ) used dielectric spectroscopy to study “polymer islands” deposited on a substrate from dilute solution, where some islands contained just a few or only one polymer chain. The confinement of the polymer chain to small-surface geometries had virtually no influence on the dynamics of the polymers, aside from the segments in direct contact with the substrate.

The electrical behaviour of only a few dislocations was analysed. Such small numbers of defined dislocations were produced by hydrophobic semiconductor wafer direct bonding. The dislocation networks were placed in the channel of SOI MOSFETs where the source and drain regions of these devices act as contacts. Varying the channel width allows one to control the number of dislocations measured. Analyses of nMOSFETs proved an increase of the drain current caused by dislocations by more than one order of magnitude, while a decrease of the current is obtained for pMOSFETs. This indicates that electrons are present on the dislocation core in p-type material. The concentration of electrons on dislocations was estimated to be about 200 electrons per micrometer dislocation length, corresponding to a distance of about 5 nm between free electrons. This distance agrees with the space between Coulomb islands proved by low-temperature measurements. The investigations refer to a metallic-like conductance along dislocations caused by a two-dimensional carrier confinement. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

GaN epitaxial layers were implanted by 100 keV H+ ions at different implantation temperatures (LN2, RT and 300 °C) with a fluence of 2.5×1017 cm−2. The implanted samples were characterized using Nomarski optical microscopy, AFM, XRD, and TEM. Topographical investigations of the implanted surface revealed the formation of surface blistering in the as-implanted samples at 300 °C and after annealing at higher temperature for the implantation at LN2 and RT. The physical dimensions of the surface blisters/craters were dependent on the implantation temperature. XRD showed the dependence of damage-induced stress on the implantation temperature with higher stress for the implantation at 300 °C. TEM investigations revealed the formation of a damage band in all the cases. The damage band was filled with large area microcracks for the implantation at 300 °C, which were responsible for the as-implanted surface blistering.

Dislocations exhibit a number of exceptional electronic properties resulting in a significant increase of the drain current of metal-oxide-semiconductor field-effect transistors (MOSFETs) if defined numbers of these defects are placed in the channel. Measurements on individual dislocations in Si refer to a supermetallic conductivity. A model of the electronic structure of dislocations is proposed based on experimental measurements and tight binding simulations. It is shown that the high strain level on the dislocation core—exceeding 10% or more—causes locally dramatic changes of the band structure and results in the formation of a quantum well along the dislocation line. This explains experimental findings (two-dimensional electron gas and single-electron transitions). The energy quantization within the quantum well is most important for supermetallic conductivity.

Ultrathin strained silicon-on-insulator (SSOI) has been in the limelight of device scientists and engineers as one of the materials that can possibly extend the lifetime of the current silicon technology. In this paper, we show that, beyond this technological interest, SSOI also provides a rich platform to explore and explain a number of fundamental phenomena. In particular, ultrathin SSOI substrates are exploited to elucidate basic nanomechanical properties of silicon. Particularly, the bending associated with free surface-induced relaxation upon nanoscale patterning are investigated using micro-Raman scattering, high resolution transmission electron microscopy, and nano-beam electron diffraction. The observed morphological changes in SSOI nanostructures cannot be explained by the classical Stoney's formula or related formulations developed for nanoscale thin films. Instead, a continuum mechanical approach is employed to describe these observations through three-dimensional numerical calculations of relaxation-induced lattice displacements. The use of SSOI to implement novel nanoscale devices is also discussed.

A major challenge for the application of strain engineering to enhance the performance of electronic devices is the quantification of strain on the nanoscale. Besides other techniques (Raman spectroscopy, X-ray diffraction) electron beam techniques allow strain analyses with a spatial resolution of a few nanometers and a reasonable strain sensitivity of 1x10 -3 (relative to the lattice constant of silicon). In the present work, we address practical issues in the application of nano-beam electron diffraction (NBED) to probe the strain in strained silicon layers and sub-100 nm structures. The investigated specimens were prepared on biaxially tensile strained silicon-on- insulator substrates with an initial strain of = 0.6% or 0.8%. Results of the NBED experiments were compared to data obtained by other strain measurement techniques; amongst them the strain mapping by peak-pairs analysis of high-angle annular dark field (HAADF) images was especially considered. NBED can be easily performed by use of STEM with a small aperture of the 2 nd condenser lens in the micro- or nanoprobe mode. The NBED principle consists in illuminating a nanometer-sized area of the specimen (being in zone axis orientation) with a nearly parallel electron beam and acquiring series of diffraction patterns at points along previously defined lines. The strain components of interest are generally calculated using a dedicated software package which is based on procedures for the analysis of electron diffraction patterns. The spatial resolution of NBED is determined by the beam diameter to a few nanometers. The

Schottky diodes prepared on silicon bonded wafers with dislocation network (DN) lying parallel to the sample surface at the depth of ∼2 μm were investigated by means of capacitance-voltage (CV), current-voltage (IV) measurements at 80 K under optical illumination. A model of the interpretation of CV and IV data is presented and discussed. It is shown that electron-beam induced current (EBIC) mapping under the proper chosen forward bias voltages allows one to trace the inhomogeneities of the potential barrier at DN. The observed non-uniformity of the DN barrier heights was ascribed to inhomogeneous distribution of small oxide precipitates lying at the dislocation network plane (© 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

We report on electro-luminescence from metal-insulator-semiconductor diodes (MISLED). MISLEDs prepared on silicon with HfO2 layers of different thicknesses were investigated and their properties compared with such prepared by using SiO2 insulator layer. The role of the insulator layer was studied in view of the efficiency of the band-to-band radiation from silicon. We show that the luminescence efficiency depends on the dielectric constant of the insulator as well as on its ability to conduct carriers by tunnelling. Efficiency enhancement of 3.3 times was detected when the SiO2 insulator was substituted by HfO2 in the MIS emitter. Optimal injection current exists, which leads to a maximal efficiency of the luminescence. The optimal current depends strongly on the thickness of the oxide. We relate the existence of an optimal current with the depth at which the injected minority carriers recombine radiatively. Thus the electric field in the semiconductor and the surface recombination are the factors determining the optimal injection (© 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Nowadays, strain engineering plays a key role in boosting the performance of Si-based nanoelectronics. So far a tremendous progress has been made in establishing methods for strain manipulation in Si nanodevices. This has brought up further challenges in terms of development of reliable probes to characterize the strain on the nanoscale. In this paper, we discuss strain imaging using multi-wavelength micro-Raman spectroscopy. As a model system, we investigate the strain behavior upon nanoscale patterning of ultrathin strained silicon-on-insulator (SSOI). We show that valuable details on the strain depth distribution can be obtained by combining deep UV and visible Raman microprobes. Additionally, we also demonstrate that strain mapping with high lateral resolution can be achieved using UV-Raman with glycerin-immersed high numerical aperture objective lens. Results from nano-beam electron diffraction and peak-pairs analysis of high-angle annular dark field images are also presented. Detailed 3D finite element simulations of edge-induced strain relaxation in SSOI nanostructures augment our experimental studies.

Silicon nanowires (NWs) and vertical nanowire-based Si/Ge heterostructures are expected to be building blocks for future devices, e.g. field-effect transistors or thermoelectric elements. In principle two approaches can be applied to synthesise these NWs: the ‘bottom-up’ and the ‘top-down’ approach. The most common method for the former is the vapour–liquid–solid (VLS) mechanism which can also be applied to grow NWs by molecular beam epitaxy (MBE). Although MBE allows a precise growth control under highly reproducible conditions, the general nature of the growth process via a eutectic droplet prevents the synthesis of heterostructures with sharp interfaces and high Ge concentrations. We compare the VLS NW growth with two different top-down methods: The first is a combination of colloidal lithography and metal-assisted wet chemical etching, which is an inexpensive and fast method and results in large arrays of homogenous Si NWs with adjustable diameters down to 50 nm. The second top-down method combines the growth of Si/Ge superlattices by MBE with electron beam lithography and reactive ion etching. Again, large and homogeneous arrays of NWs were created, this time with a diameter of 40 nm and the Si/Ge superlattice inside.

Strained silicon channels are one of the most important Technology Boosters for further Si CMOS developments. The mobility enhancement obtained by applying appropriate strain provides higher carrier velocity in MOS channels, resulting in higher current drive under a fixed supply voltage and gate oxide thickness. The physical mechanism of mobility enhancement, methods of strain generation and their application for advanced VLSI devices is reviewed.

The investigation of regular dislocation networks (DN) formed by direct wafer bonding suggests that the D1 and D2 peaks of dislocation-related luminescence (DRL) in silicon is linked to screw dislocations, whereas edge dislocations are responsible for D3 and D4 DRL peaks. Non-radiative recombination activity in DN could be attributed to edge dislocations and could be related to enhanced ability of these dislocations to getter impurity atoms. Obtained relation of DRL intensity with the density of screw dislocations suggests existence of the optimum twist angle for the wafer-bonding geometry for which the DRL intensity has a maximum. The dependence of DRL intensity on the spacing between screw dislocations has the maximum at about 7 nm. Reported radiative and non-radiative recombination properties of DN present substantial interest not only for possible LED applications in all-Si photonics but also for photovoltaics, since DNs represent a model system for grain boundaries controlling carrier lifetime in microcrystalline-Si material.

Incorporation of optical components into microelectronic devices will significantly improve their performance. Absence of effective Si-based light emitter hampers such integration. In the present work light emitting Si diodes, fabricated by dopant (boron or phosphorous) implantation and annealing are investigated. Different implantation doses and annealing temperatures were employed. The efficiency of the electroluminescence (EL), obtained from such structures was measured and correlated with the fabrication process parameters. As previously reported, the EL of band-to-band radiative transition in Si is strongly influenced, by the dopant implantation dose, i.e. higher doses usually enhance EL. Our results suggest that the effect is mainly related to the increase of minority carrier lifetime in the substrate. Distinct measurements showed that the higher implantation doses lead longer carrier lifetimes in the samples. The correlation between lifetime and the EL efficiency could be satisfactory explained in the frame of a classical model, considering the carrier-injection dependence of the rates of the three main recombination mechanisms in silicon, i.e. multi-phonon, radiative and Auger recombination. We suppose that the increase in the implantation dose improves minority carrier lifetime due to the gettering of impurity atoms from the substrate material to the highly doped emitter region.

Using strained SOI as a strategy to enhance the performance of Si-based electronic devices raises fundamental questions about the stability of the strain during different processing steps. In this work, we elucidate the influence of nanoscale pattering, a crucial step in device fabrication, on the strain states. UV micro-Raman and high resolution transmission electron microscopy were employed to quantify the strain in the strained layers. Post-patterning strain in different nanostructures was evaluated by UV micro-Raman. Our data demonstrate that the formation of free surfaces upon pattering leads to a partial relaxation of the strain. The extent of the relaxation was found to depend on the lateral dimension and the geometry. A detailed mechanistic picture is presented based on 3D finite element simulations

The direct bonding of Si wafers reproducibly forms dislocation networks (DN) with a microscopic structure defined by the mutual crystallographic orientation between the pair of wafers used for the bonding procedure. This allows studying the electrical and optical properties of specific dislocations. In the present work three different DN structures were investigated using transmission electron microscopy (TEM), photoluminescence (PL) and deep level transient spectroscopy (DLTS). The results show close correlation between the structural, electrical and optical properties of dislocations and opens a possibility to identify structural peculiarities of the dislocations responsible for the high intensity of photoluminescence. Namely, the obtained results suggest that PL at ∼0.8 eV is related to screw dislocations in DN. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

The electrical and optical properties of dislocations in Si are reviewed, namely dislocation-related recombination and luminescence, transport of minority and majority carriers along dislocations or the electric field around dislocations. It is shown that Si wafer direct bonding allows well-controlled formation of dislocation networks, giving rise to adjustable dislocation properties. Ideas for novel Si devices utilizing dislocations as active components are presented. In particular, dislocation-based light emitters at about 1.5 μm wavelength are demonstrated. Concepts for dislocation-based conductive channels and fast FETs, manipulators of biomolecules or thermo-electric generators are sketched.

Dislocation networks (DNs) formed by silicon wafer bonding were studied by means of Electron Beam Induced Current (EBIC) and Photoluminescence (PL). The measurements were performed on p–n junction diode structures prepared by ion implantation. EBIC signal was observed not only inside the diode structure, but also far outside the diode area. This finding demonstrates the ability of the bonding interface to efficiently collect minority carriers and indicates a high electrical conductivity of the dislocation network. In addition, circular inhomogeneities of charge collection were observed. The contrast of those regions was bright at high beam energies and turned dark or vanished at lower energies. The contrast behavior of the circular areas can be explained by local variations of collection efficiency and recombination at the DN, which might be a result of different density of oxide precipitates. PL mappings at 0.794 and 1.081 eV revealed similar circular areas.

A new concept for Si-based light emitting diodes (LED) capable of emitting at 1.5 μm is proposed. It utilizes D-band radiation from dislocations in Si. Whether a dislocation network created in a reproducible manner by Si wafer direct bonding or dislocation loops produced by Si ion implantation are employed. It is also stated that dislocation loops do not lead to the strong band-to-band electroluminescence at 1.1 μm of p-n diodes, as it was predicted in the literature. A MOS-LED (Fig. A) and p-n LEDs emitting at 1.5 μm are demonstrated by the authors. The maximum efficiency that could be achieved at room temperature is close to 1%. Levels in the bandgap which are probably involved in the formation of the D1-line at 1.5 μm are revealed. Moreover, the observation of the Stark effect for the D1-line is reported. Namely, a red/blue-shift of peak position was observed in electro- and photo-luminescence when the electric field in the p-n LED was increased/lowered. This effect may allow realization of a novel Si-based light emitter with electric field modulated emission wavelength. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Semiconductor wafer bonding offers a new degree of freedom in the design of material combinations without the common restrictions of the structure of the materials bonded. It is already an established method for the industrial production of advanced substrates (SOI) applied as basic material in high-performance device fabrication. SOI, i.e. a thin device layer on an insulator, is a promising concept for further device developments. The advantages of SOI can be combined with mobility enhancing materials such as strained silicon (SSOI) or germanium on insulator (GOI). The bonding process is not limited to a certain wafer diameter and is applicable to different material combinations which are important to integrate different functions on a chip (system on a chip, SoC). (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Dislocation rich regions can be controllably formed at a certain location inside a silicon wafer. We studied the light emission properties of such regions located in an electric field of a p–n junction under different excitation conditions. It was found that the luminescence spectra of the dislocations are significantly influenced by the presence of the junction. The dislocation-related luminescence peak position appears red-shifted due to the built-in electric field. A suppression of that field by photogeneration of carriers or by applying a forward bias voltage at the junction leads to a gradual decrease in the energy position of the peaks. The dependence of the peak position on the electric field was found to be a quadratic function, similar to that observed for semiconductor nanostructures. We show that the shift of the peak position is due to the Stark effect on dislocation-related excitonic states. The characteristic constant of the shift, obtained by fitting the data with the quadratic Stark effect equation, was 0.0186 meV/(kV/cm)2. The observed effect opens new possibilities for integration of a silicon based light emitter, combining the radiation from dislocations with a Stark effect based modulator.

Different methods to introduce strain in thin silicon device layers are presented. Uniaxial strain is introduced in CMOS devices by process-induced stressors allowing the local generation of tensile or compressive strain in the channel region of MOSFETs. Biaxial strain is introduced by growing of thin silicon layers on SiGe buffers and their transfer to oxidized silicon substrates. The latter forms strained silicon on insulator (SSOI) wafers characterized by tensile strain only. Future CMOS device technologies require the combination of the global strain of SSOI substrates with local stressors to increase the device performance.

The paper reviews methods of hydrophobic wafer bonding. Hydrophobic surfaces are obtained by removing the oxide layer from the surfaces of crystalline silicon substrates. Bonding such surfaces causes the formation of a dislocation network in the interface. The structure of the dislocation network depends only on the misalignment (twist and tilt components). The different dislocation structures are discussed. Because wafer bonding offers a method to the reproducible formation of such networks, different applications are possible

Spectroscopic Ellipsometry was employed to study the etching process of uniaxially strained Si (sSi) layers obtained by direct wafer bonding of Si wafers in a mechanically benstate followed by thinning one of the Si wafers, the donor wafer, by the smart-cut process, keeping the other, the handle wafer intact The smart-cut process requires a high dose hydrogen implantation into the donor wafer prior to bonding. As a result of the implantation conditions a ∼600 nm uniaxially sSi layer could be transferred onto the handle wafer. In order to thin down and smooth the surface damage of the transferred layer induced by the implantation and splitting process, the samples were dipped in a solution of tetra-methyl ammonium hydroxide (TMAH). The thicknesses of the transferred sSi layers determined from ellipsometry were in good agreement with those obtained from Transmission Electron Microscopy (TEM), while the roughness values were matching those obtained from Atomic Force Microscopy (AFM). The etching rate has also been determined.