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Wafer bonding in silicon electronics
- Source :
- physica status solidi c. 6:633-644
- Publication Year :
- 2009
- Publisher :
- Wiley, 2009.
-
Abstract
- Semiconductor wafer bonding offers a new degree of freedom in the design of material combinations without the common restrictions of the structure of the materials bonded. It is already an established method for the industrial production of advanced substrates (SOI) applied as basic material in high-performance device fabrication. SOI, i.e. a thin device layer on an insulator, is a promising concept for further device developments. The advantages of SOI can be combined with mobility enhancing materials such as strained silicon (SSOI) or germanium on insulator (GOI). The bonding process is not limited to a certain wafer diameter and is applicable to different material combinations which are important to integrate different functions on a chip (system on a chip, SoC). (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)
Details
- ISSN :
- 16101642 and 18626351
- Volume :
- 6
- Database :
- OpenAIRE
- Journal :
- physica status solidi c
- Accession number :
- edsair.doi...........fbe2a65c6ba9fa6cd05d821142d5b5ac