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Boron arsenide (BAs) is a covalent semiconductor with a theoretical intrinsic thermal conductivity approaching 1300 W/m K. The existence of defects not only limits the thermal conductivity of BAs significantly but also changes its pressure-dependent thermal transport behavior. Using both picosecond transient thermoreflectance and femtosecond time-domain thermoreflectance techniques, we observed a non-monotonic dependence of thermal conductivity on pressure. This trend is not caused by the pressure-modulated phonon–phonon scattering, which was predicted to only change the thermal conductivity by 10%–20%, but a result of several competing effects, including defect–phonon scattering and modification of structural defects under high pressure. Our findings reveal the complexity of the defect-modulated thermal behavior under pressure.

A significant improvement in electron mobility has been achieved by several authors on AlInGaN/GaN heterostructures by adding a small amount of Ga to the AlInN alloy. In this study, we propose that thermodynamic stability plays an important role in controlling the electron transport properties of these heterostructures. A quantitative investigation of the thermodynamic stability of the AlInGaN barrier has been carried out analytically, for a wide range of compositions (0.5 ≤ Al ≤ 0.8; In = 0.2, 0.15, 0.1). A slow change in the thermodynamic stability is observed when the Ga atoms replace only the Al atoms. In contrast, a significant improvement in thermodynamic stability is observed when the indium atoms are replaced by the Ga atoms in the same Al0.83In0.17N layer. It is found that the Al content in the range of 65%–70% with 10% In exhibits the highest thermodynamic stability within the calculated composition range owing to the significant reduction in total elastic strain in the barrier. Thereby, it leads to the highest electron mobility, as evidenced by the experimental observations in this work, i.e., electron mobility of 2090 cm2/V s with a sheet carrier density of 1.09 × 1013 cm−2. Therefore, the thermodynamic stability apart from commonly observed scattering mechanisms may at least be partially held to be responsible for the consistent improvement in electron mobility in AlInGaN/GaN heterostructures.

The all-solid-state electrochromic device (ECD) integrated with near-IR (NIR) blocking layer fabricated by reactive DC magnetron sputtering technique has been developed for image sensor and energy-saving glass applications. The all-solid-state ECD with the single-substrate structure of glass/NIR-blocking transparent conductive oxide (TCO)/NiO/Ta2O5/WO3/ITO could potentially modulate the optical transmittance between 81.9% and 17.5% at 550 nm in the visible region and between 38.0% and 9.5% at the NIR wavelength larger than 1100 nm. The better energy-saving and light blocking performance, including the larger optical density difference (ΔOD) and lower solar heat-gain coefficient (SHGC) could be achieved in the NIR-blocking ECD structure, even with the general criteria SHGC(bleach)/SHGC(colored) < 3. With the application of ECDs, it is possible to directly apply the device onto an image sensor and energy-saving glass with the NIR rejection function even in the bleached state. Furthermore, the NIR-blocking T...

Enhanced dopant activation and elimination of end-of-range (EOR) defects in BF2+-implanted silicon-on-insulator (SOI) have been achieved by high-density current stressing. With the high-density current stressing, the implantation amorphous silicon underwent recrystallization, enhanced dopant activation and elimination of the (EOR) defects. The current stressing method allows the complete removal of EOR defects that has not been possible with conventional thermal annealing in the processing of high-performance SOI devices.

We report a promising oxadiazole-containing phenylene vinylene ether-linkage copolymer, which can emit nearly white light from a single-layer light-emitting diode. The emission spectrum is composed of a red component originating from the new excited dimer in addition to the blue-green component from an individual lumophore and excimer. This excited dimer is formed under a strong electric field inside the diode and cannot be produced by photoexcitation, which is different from the excimer or exciplex that is often found both in photoluminescence and electroluminescence, and it is termed the “electromer.”

In multilevel interconnects, current crowding occurs whenever the current changes direction, such as when passing through a via. We propose that in current crowding, the current-density gradient can exert a driving force strong enough to cause excess vacancies (point defects) to migrate from high to low current-density regions. This leads to void formation in the latter. This is a key feature of electromigration-induced damage in very large scale integrated interconnects.

Room-temperature electromigration occurs in a thin stripe of eutectic SnPb solder stressed by a current density of 105 amp/cm2. Hillocks and voids grow at the anode and the cathode, respectively. While the dominant diffusion species is Sn in this two-phase alloy, the growth of the hillocks, surprisingly, originates from the Pb grains.

We report the operation of new photo-pumped blue-green ZnCdSe/ZnCdMgSe graded-index separate confinement heterostructure single quantum well lasers grown lattice matched on InP substrates. Laser emission at 512 nm was observed. The T0 value is 150 K at room temperature. These materials are proposed as alternative materials for the fabrication of visible semiconductor lasers.

Cu3Sn intermetallic compounds (IMCs) are more resistant to fracture than solders. In addition, the Cu3Sn IMCs are more conductive than the solders. In this study, we manufactured Cu3Sn IMCs to serve as a joint using electroplated nanotwinned Cu as a metallization layer to react with pure Sn at 260 °C and 340 °C. The results show that there were almost no Kirkendall voids generated inside the Cu3Sn layer. In addition, the kinetics of the Cu3Sn growth was analyzed to predict the time needed to form the Cu3Sn joint.

Nd3+ doped CaF2 films have been grown epitaxially on Si(111) and Al(111)/Si(111) using CaF2 and NdF3 evaporation. Photoluminescence spectra from these samples show high intensity and narrow emission linewidth even when the thickness of the CaF2:Nd films is reduced to 0.2 μm. The 10 457 A emission line is not quenched until the Nd concentration exceeds 3.8 wt.%. Moreover, while similar spectra are observed, the photoluminescence intensity from the CaF2:Nd films grown on Al/Si(111) is significantly higher than from the CaF2:Nd on Si(111).

While epitaxial CaF2 films grown on Si(111) at temperatures above 550 °C exhibited flat capacitance‐voltage (C‐V) curves, suggesting a pinned CaF2/Si(111) interface, we have observed unpinned C‐V curves from as‐deposited epitaxial CaF2 grown at 300 °C. Our results demonstrate that C‐V characteristics of CaF2/Si(111) are determined by the thermal history, rather than the crystalline quality, of the CaF2 film. Correlations among CaF2/Si interface state density, thermal stress, and atomic bonding at the interface are discussed.

This letter investigates the degradation behavior under hot-carrier stress in InGaZnO thin film transistors with I- and U-shaped asymmetric electrodes. After hot-carrier stress, a serious Vt shift, as well as on-current and subthreshold swing degradations are observed in Id-Vg transfer curve under reverse mode. Moreover, it is found that the Vt instability is caused by hot-electron injection near the drain side, and this phenomenon which is verified by C-V measurement. Furthermore, the location of trapped hot-electron is estimated from the two-stage rise in the gate-to-drain/gate-to-source capacitance curves and then verified by the simulation tool.

This letter investigates the effect of temperature on hot-carrier stress-induced degradation behavior in InGaZnO thin film transistors. After hot-carrier stress at 25 °C, serious on-current and subthreshold swing degradations are observed due to trap state generation near the drain side. For identical stress performed at elevated temperatures, current degradation in the I-V transfer curve under reverse mode is gradually suppressed and the anomalous hump in the gate-to-drain capacitance-voltage curve becomes more severe. These suppressed degradations and the more severe hump can be both attributed to hole-trapping near the drain side due to high drain bias at high temperature.

We propose a bihydrogel mechanical microsensor made from two hydrogels with different sensitivity to the environment. The idea was used to create pH microsensors consisting of two parallel phases of crosslinked hydrogel in which only one phase is pH-sensitive. Working similarly to a bimetallic strip, the bihydrogel particle bends depending on the environmental pH. These freestanding bihydrogel particles are low-cost and easy to manufacture. They are particularly suitable for use in confined environment where most microsensors are unable to fit in. The same principle can also be used to create sensors for temperature, ionic strength, and other environmental parameters.

This study investigates the suppressed negative gate bias illumination stress (NBIS) -induced instability of via-type amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) with fringe field (FF) structures. The less negative threshold voltage shifts of devices after NBIS are showed when device has larger FF structures. This finding is attributed to more dispersive distribution of photo-generated holes in the width direction of a-IGZO during NBIS, which reduce the hole trapping phenomenon in the front channel interface. The a-IGZO TFT with FF structure is expected to be an effective method to increase the electrical reliability of devices after NBIS.

In-cell touch sensor that can be integrated with display pixel circuit using dual gate InGaZnO thin-film transistor is proposed. Under bottom gate operation, device characteristics are not sensitive to light illumination. On the contrary, light can lead to evident subthreshold leakage when operated with top gate. This behavior allows touch sensor to be realized by sensing the ambient light using top gate operation, without affecting normal bottom gate operated devices in display pixel. Further, the proposed operation method of touch sensor needs no additional fabrication and cost, and even black matrix is not required either.

This paper investigates the degradation mechanism under self-heating stress for InGaZnO thin film transistor. The apparent positive threshold voltage (Vt) shift and on-current degradation indicate that the combination of trap states generation and electron trapping effect occur during stress. Furthermore, the asymmetric degradation behavior in the Id-Vg saturation measurement demonstrates that the trap states location is near the source side since the relative vertical electrical field is higher than drain side. Moreover, the Joule heating generated by self-heating operation can enhance electron trapping effect and cause larger Vt shift in comparison with the gate-bias stress.

This letter investigates asymmetrical degradation behavior induced by the self-heating effect in InGaZnO thin-film transistors. Both the surrounding oxide and other thermal insulating material, as well as the low thermal conductivity of the InGaZnO layer itself, cause the self-heating effect in InGaZnO thin-film transistors. The heated channel layer enhances threshold voltage shift, and the evolution of threshold voltage shift is found to be dominated by charge-trapping effect. Moreover, a non-uniform distribution of channel carrier concentration leads to an uneven temperature distribution through the InGaZnO active layer and results in the asymmetrical degradation behavior after self-heating operation.

A wide hysteresis width characteristic (memory window) was observed in the organic thin film transistors (OTFTs) using poly(2-hydroxyethyl methacrylate) (PHEMA)-based polymer multilayers. In this study, a strong memory effect was also found in the pentacene-based OTFTs and the electric characteristics were improved by introducing PHEMA/poly(methyl methacrylate) (PMMA)/PHEMA trilayer to replace the conventional PHEMA monolayer or PMMA/PHEMA and PHEMA/PMMA bilayer as the dielectric layers of OTFTs. The memory effect was originated from the electron trapping and slow polarization of the dielectrics. The hydroxyl (-OH) groups inside the polymer dielectric were the main charge storage sites of the electrons. This charge-storage phenomenon could lead to a wide flat-band voltage shift (memory window, △VFB = 22 V) which is essential for the OTFTs’ memory-related applications. Moreover, the fabricated transistors also exhibited significant switchable channel current due to the charge-storage and slow charge relaxa...

This letter investigates the degradation mechanism of amorphous indium-gallium-zinc oxide thin-film transistors under gate-bias stress. The larger Vt shift under positive AC gate-bias stress when compared to DC operation indicates that an extra electron trapping mechanism occurs during rising/falling time during the AC pulse period. In contrast, the degradation behavior under illuminated negative gate-bias stress exhibits the opposite degradation tendency. Since electron and hole trapping are the dominant degradation mechanisms under positive and illuminated negative gate-bias stress, respectively, the different degradation tendencies under AC/DC operation can be attributed to the different trapping efficiency of electrons and holes.

This work investigates an improvement in anomalous on-current and subthreshold swing (SS) in Low-temperature polycrystalline-silicon thin-film transistors after positive gate bias stress. The experimental results reveal that the improved electric properties are due to the hole trapping at SiO2 above the lightly doped drain regions, which causes a strong electric field at the gate corners. The effect of the hole trapping is to reduce the effective channel length and the SS. Besides, the stress-related electric field was also simulated by TCAD software to verify the mechanism above.

This paper investigates the illuminated behaviors of InGaZnO thin film transistors with and without a SiOx passivation. For the passivated device, more interface states were generated during SiOx passivation layer deposition by plasma-enhanced-chemical-vapor-deposition. The enhanced trap-assisted photoexcited hole generation induces source side barrier lowering and causes an apparent subthreshold stretch-out phenomenon. However, for the unpassivated device, the fact that the threshold voltage shift in ambient oxygen is lower than in vacuum under light illumination suggests oxygen desorption and readsorption occurs simultaneously, which is consistent with the accelerated recovery rate in oxygen ambiance.

In this letter, we investigate the impact of the light illumination on the stability of indium–gallium– zinc oxide thin film transistors under positive gate-bias stress. The noticeable decrease in threshold voltage Vt shift more than 5.5 V under illuminated positive gate-bias stress indicates a superior reliability in contrast with the dark stress. The accelerated Vt recovery characteristic compared with dark recovery demonstrates that the charge detrapping effect was enhanced under illumination. Furthermore, the average effective energy barrier of charge trapping and detrapping was derived to verify that illumination can excite the trapped charges and accelerate the charge detrapping process. © 2010 American Institute of Physics. doi:10.1063/1.3481676

By using cross-sectional scanning tunneling microscopy, a correlation between the surface morphology and the corresponding electronic states of the dislocations terminated at the GaN(11¯00) cleavage surfaces grown by molecular-beam epitaxy has been demonstrated. Both scanning tunneling spectroscopy and analysis of the dislocations on electronic structures suggest that regions surrounding dislocations register gap states in the fundamental band gap of GaN. Closely examining the recognition of the electronic structure reveals that the defect levels could provide the possibility of yellow luminescence, involving a transition from the conduction-band edge to a level at 1.2 eV above the valence band edge.

In this work, a metrology was proposed to realize the distribution of fixed oxide trapped charges and grain boundary trapped states. The (continuous-wave green laser crystallization) n-channel thin-film transistors (TFTs) were forced by dc voltage stress, VG=VD. The gate-to-drain capacitance, CGD−VG, with varying frequency of applied small signal was developed. To probe the distribution of these defects, the difference (initial capacitance values minus stressed capacitance values) of CGD−VG with different frequencies was precisely studied.

Lead-free solders have been adopted by the microelectronics industry. However, their thermomigration behaviors are unclear. Thermomigration in eutectic SnAg3.5 solder joints was investigated using an alternating current (ac) of 0.57 A at 100 °C. The ac eliminates the electromigration effect and creates a thermal gradient of 2829 °C/cm, facilitating the study of thermomigration. Arrays of tiny markers fabricated by a focused ion beam are employed to measure the thermomigration rate. It is found that Sn atoms migrated toward the hot end. The thermomigration flux and molar heat of transport are measured to be 5.0×1012 atoms/cm2 and 1.36 kJ/mole, respectively.

Failure induced by thermomigration in Pb-free SnAg flip chip solder joints has been investigated by electromigration tests under 9.7×103 A/cm2 at 150 °C. The fast interstitial diffusion of Cu atoms from underbump metallization into Sn matrix caused void formation at the passivation opening on the chip side. The Cu diffusion was driven by a large thermal gradient and led to void formation even in the neighboring unpowered bumps. When the thermal gradient is above 400 °C/cm, theoretical calculation indicates that the thermomigration force is greater than the electromigration force at 9.7×103 A/cm2 stressing.

Antireflective gate structures of polycrystalline silicon (poly-Si) and silicon dioxide films enable postimplantation green continuous-wave laser annealing of all Si regions of green laser-crystallized panel Si transistors. About 40% of the incident laser-energy penetrates to the channels, owing to antireflective gate structures with the absorptive gate poly-Si, while 65% of the incident laser-energy enters the source/drain regions because of Fresnel reflections at the air/source (drain) interfaces. Such inverted laser-energy profiles and ascendant defect distributions along the channels/junctions/contact regions, yielded continuous, improved epilike Si microstructures over the entire active layer. The electron mobility of the transistors, 620cm2∕Vs, approaches that of integrated-circuits transistors.

Three-dimensional modeling is employed to simulate various Kelvin structures for detecting the change in bump resistance due to void formation and propagation during electromigration in flip-chip solder joints. It is found that the Kelvin structures can sense the highest voltage drop when its voltage probes are placed at the current entrance into the bump on the chip side, and it is thus the most sensitive design to monitor void formation and propagation. When the bump resistance increases 20% of its initial value, the depletion percentage of contact opening ranges from 21.0% to 65.0%, depending on the position of the probes.

Thermomigration in flip-chip solder joints is investigated using alternating currents and infrared microscopy to decouple it from electromigration effect. It is found that the thermal gradient in solder bump can be as high as 2143°C∕cm when 9.2×104A∕cm2 was applied at 100°C. Markers fabricated by focus ion beam are employed to measure the thermomigration rate. The thermomigration flux is measured to be 3.3×1013at.∕cm2. With the known thermal gradient, the molar heat of 26.8kJ∕mole has been obtained for the transport of Pb.

This study investigates the mechanism for the abrupt increase in temperature at later stages of electromigration in flip-chip solder joints. It is found that electromigration also occurs in Al traces when stressed by 0.6A at 100°C. Three-dimensional thermoelectrical simulation by finite element analysis was carried out to simulate the temperature distribution in solder joints with and without degradation of the Al trace. It is found that the degradation of the Al trace has substantial effect on the Joule heating of solder joints. This model can explain the serious Joule heating effect in the later stages of electromigration.

Stability of high-hole-mobility thin-film transistors (TFTs) on single-grainlike silicon channels formed by continuous-wave laser crystallization during hot-carrier stressing (HCS) was studied. As channel layers become thicker, laser-mediated channel crystallinity increases, increasing channel roughness. On such epilike polycrystalline silicon substrates, the poorer interface quality for thicker channels, even those with lower tail-state densities of grain traps, is responsible for the extensive charge trapping and creation of deep-state densities in the fabricated TFTs due to HCS. Hence, on a thin channel with a thickness of 50nm and ultrasmooth surfaces, HCS hardly degrades the electrical parameters of the devices.

Low-temperature growth of self-organized ZnO nanorods on Si substrate is achieved using anodic aluminum oxide and atomic layer deposition at 250°C without catalyst or seed layer. Photoluminescence spectrum indicates that the ZnO nanorod arrays exhibit a blue∕green luminescence at 480nm. In addition, the nanorod arrays demonstrate excellent field-emission properties with a turn-on electric field of 6.5Vμm−1 and a threshold electric field of 9.8Vμm−1, which are attributed to the perfectly perpendicular alignment of ZnO nanorods to the Si substrate.

X-ray microscopy was employed to investigate void nucleation and propagation during electromigration in solder joints. The shape of the voids at various stages can be clearly observed. The voids became irregular when they propagated to deplete the contact opening. Growth velocity at the early stage was found to be 1.3μm∕h under 6.5×103A∕cm2 at 150°C, and it decreased to 0.3μm∕h at later stages. Formation of intermetallic compound (IMC) and compositional changes at the interface of solder/IMC on the chip side were attributed to the retarded growth rate at later stages.

The authors have fabricated a series of Co∕AlOx(d0)∕Co∕IrMn magnetic tunnel junctions (MTJs), with d0=12–30A. They can be used as ultrasensitive strain gauges. From the resistance (R) versus strain (Δe) curve, the authors find that the maximum value of the gauge factor (γmax) is as large as 5000–20000 in the low-strain (∣Δe∣⩽25×10−6) range. Furthermore, the response is linear. Two mechanisms are proposed to explain the piezoresistance behavior of these MTJs: one is due to the tunneling magnetoresistance effect (the magnetic origin) and the other due to the ordinary tunneling effect (the nonmagnetic origin).

X-ray photoelectron spectroscopy, grazing incident x-ray diffraction, transmission electron microscopy, and scanning electron microscopy were conducted to evaluate the effect of titanium hydride on the formation of nanoporous TiO2 on Ti during anodization. Nano-titanium-hydride was formed cathodically before anodizing and served as a sacrificial nanoprecipitate during anodization. Surface oxidation occurred and a multinanoporous structure formed after cathodic pretreatments followed by anodization treatment. The sacrificial nanoprecipitate is directly dissolved and the Ti transformed to nanoporous TiO2 by anodization. The formation of sacrificial nanoprecipitates by cathodic pretreatment and of the multinanostructure by anodization is believed to improve biocompatibility, thereby promoting osseointegration.

Kelvin bump probes were fabricated in flip-chip solder joints, and they were employed to monitor the void formation during electromigration. We found that voids started to form at approximately 5% of the failure time under 0.8A at 150°C, and the bump resistance increased only 0.02mΩ in the initial stage of void formation. Three-dimensional simulation was performed to examine the increase in bump resistance at different stages of void formation, and it fitted the experimental results quite well. This technique provides a systematic way for investigating the void formation during electromigration.

Effect of three-dimensional current distribution on void formation in flip-chip solder joints during electromigration was investigated using thermoelectrical coupled modeling, in which the current and temperature redistributions were coupled and simulated at different stages of void growth. Simulation results show that a thin underbump metallization of low resistance in the periphery of the solder joint can serve as a conducting path, leading to void propagation in the periphery of the low current density region. In addition, the temperature of the solder did not rise significantly until 95% of the contact opening was eclipsed by the propagating void.

This investigation characterizes electrical characteristics of continuous-wave green laser-annealed single-grainlike silicon thin-film transistors in relation to trap-state densities. As laser power increases, highly crystalline channels form, reducing tail-state densities to as low as 3×1019eV−1cm−3. This occurrence is responsible for high field-effect electron mobility of 284cm2∕Vs. In contrast, increasing laser power initially reduces the deep-state density and then increases it to 3×1016eV−1cm−3. This reversal in deep-state density and thus in the subthreshold slope as well as a saturating reduction in threshold voltage are associated with the formation of extra interface defects caused by laser-crystallization-enhanced surface roughness.

The critical length of eutectic SnPb solder was investigated using solder stripes. By employing focus ion beam, solder stripes of various lengths, including 5, 10, 15, 20, 30, 100, and 200μm, can be fabricated. Length-dependent electromigration behavior was observed, which implies that there may be back stress under stressing. The critical length was determined to be between 10 and 15μm under stressing by 2×104A∕cm2 at 100°C, and the corresponding critical product was between 20 and 30A∕cm. Both values show good agreement with their theoretical values.

Three-dimensional thermoelectrical simulation was conducted to investigate the influence of Al-trace dimension on Joule heating and current crowding in flip-chip solder joints. It is found that the dimension of the Al-trace effects significantly on the Joule heating, and thus directly determines the mean time to failure (MTTF). Simulated at a stressing current of 0.6A at 70°C, we estimate that the MTTF of the joints with Al traces in 100μm width was 6.1 times longer than that of joints with Al traces in 34μm width. Lower current crowding effect and reduced hot-spot temperature are responsible for the improved MTTF.

The band gap shift in the 80×80μm2 crack-free GaN∕AlN multilayers on the mesh-patterned Si(111) has been characterized by cathodoluminescence (CL) and Raman techniques. The GaN band gap derived from CL spectra depends on the spatial point inside a mesh, which changes from 3.413eV (at center) to 3.418eV (at edge) and to 3.426eV (at corner). The band gap shift is attributed to the variation of tensile stress inside the mesh, confirmed by Raman mapping. The shift of GaN band gap per unit stress is determined to be 0.03eV∕GPa.

Joule heating effect in solder joints was investigated using thermal infrared microscopy and modeling in this study. With the increase of applied current, the temperature increased rapidly due to Joule heating. Furthermore, modeling results indicated that a hot spot existed in the solder near the entrance point of the Al trace, and it became more pronounced as the applied current increased. The temperature difference between the hot spot and the solder was as large as 9.4°C when the solder joint was powered by 0.8A. This hot spot may play an important role in the initial void formation during electromigration.

Electromigration has emerged as an important reliability issue in the microelectronics packaging industry since the dimension of solder joints has continued to shrink. In this letter, we report a technique that enables the precise measurement of the important parameters of solder electromigration, such as activation energy, critical length, threshold current density, effective charge numbers, and electromigration rate. Patterned Cu∕Ti films in a Si trench were employed for eutectic SnPb solder to be reflowed on, and thus solder Blech specimens were fabricated. Atomic force microscope was used to measure the depletion volume caused by electromigration on the cathode end. The threshold current density is estimated to be 8.5×103A∕cm2 at 100 °C, which relates directly to the maximum allowable current that a solder joint can carry without electromigration damage. This technique facilitates the scientifically systematic investigation of electromigration in solders.