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An oxide-charged and interface-trap lateral profiling charge pumping technique (iLPCP) is proposed, and erase-induced oxide charge and interface traps are investigated in Flash EPROM devices. It is shown that the new method permits extraction of profiles in circumstances where the previous method does not yield satisfactory results.

The fabrication of high performance p-type modulation-doped field-effect transistors and metal-oxide semiconductor MODFET on high hole mobility SiGe/Si heterojunction, is described.

A new study uses a jet vapor deposition O/N/O stack gate dielectric to produce SiC MIS capacitors that are problem-free, even when operating at high temperatures.

The electrical properties of ultrathin nitride/oxide (N/O) stack dielectrics (2-4 nm), fabricated by in-situ jet vapor deposition, are investigated. Experimental results and theoretical calculation reveal that the leakage current in the N/O stack is significantly lower than that in the single oxide layer with similar oxide thickness. In the 3-nm thickness range, the N/O stack produces a lower leakage current as compared to the single nitride layer. In the 2-nm thickness range, the leakage currents in the N/O stack and the single nitride layer have no significant differences.

The lateral profiles of interface traps and oxide charge or localized hot-carrier damage in scaled thin-gate MOS field effect transistors are measured using a proposed, simple charge pumping method. Experimentation indicates that the method can be used to study the lateral distributions of erase-induced damage in Flash electrically erasable programmable read only memory devices including oxide charge and interface traps. Results are evaluated.

Theoretical and experimental studies reveal that scaling down of device dimensions leads to a significant increase in the random telegraph signal (RTS) amplitude and 1/f noise in metal oxide semiconductor field effect transistors. The rate of increase is much higher than the scaling factor. Generation of RTSs and 1/f noise due to fast interface states is higher than that by oxide traps. Nonuniform distribution of threshold voltages along the channel exerts a strong influence on the noise power density of the device. The increase in current fluctuations is higher for devices operating in weak inversion.

Laterally nonuniform distributions of radiation-induced oxide charge and interface traps near MOSFET junctions have been found in a variety of samples, and such nonuniformities could significantly affect the transistor's transconductance, channel resistance, and effective channel length. The degree of nonuniformity depends strongly on the process technology, as revealed by three independent measurement techniques. Device simulation results have confirmed the impact of such edge effects on transistor parameters.

A charge-pumping-based approach for characterizing the embedded oxide charges andthe spatial distribution of the interface traps bordering the source/drain junctions is reported. Simple to execute, the method facilitates independent measurement of the interface trap and oxide charge constituents. A few examplesare given to demonstrate its utility along with the experimental results and a comparison with other comparable techniques.

We present a comprehensive first principles study of doped hafnia in order to understand the formation of ferroelectric orthorhombic[001] grains. Assuming that tetragonal grains are present during the early stages of growth, matching plane analysis shows that tetragonal[100] grains can transform into orthorhombic[001] during thermal annealing when they are laterally confined by other grains. We show that among 0%, 2% and 4% Si doping, 4% doping provides the best conditions for the tetragonal[100] → orthorhombic[001] transformation. This also holds for Al doping. We also show that for HfxZr1−xO2, where x = 1.00, 0.75, 0.50, 0.25, and 0.00, the value x = 0.50 provides the most favorable conditions for the desired transformation. In order for this transformation to be preferred over the tetragonal[100] → monoclinic[100] transformation, out-of-plane confinement also needs to be present, as supplied by a top electrode. Our findings illuminate the mechanism that causes ferroelectricity in hafnia-based films and provide an explanation for common experimental observations for the optimal ranges of doping in Si:HfO2, Al:HfO2 and HfxZr1−xO2. We also present model thin film heterostructure computations of Ir/HfO2/Ir stacks in order to isolate the interface effects, which we show to be significant. [ABSTRACT FROM AUTHOR]

Presents a study that investigated silicon-rich silicon nitride films prepared by plasma-enhanced chemical vapor deposition technique. Experimental procedure; Results; Discussion.

Presents a study that investigated the properties of plasma-deposited silicon-rich silicon nitride films in current enhancement injectors. Experimental procedure; Results; Discussion.

Trapping characteristics of MOS structures with $\beta $ -Ga2O3 substrates and Al2O3 gate dielectrics are evaluated via constant-voltage stress and X-ray irradiation. Traps that affect bias-induced charging are located primarily in the Al2O3 dielectric layer, and are distributed broadly in time and/or energy. Stress-induced flatband voltage shifts are reduced by N2 annealing. Trap-assisted tunneling is shown to be responsible for the observed gate leakage. Hole trapping in the Al2O3 dielectric layer dominates device radiation response. The relatively modest radiation-induced charge trapping observed in these devices is promising for the potential future use of Al2O3/ $\beta $ -Ga2O3 devices in a space environment. [ABSTRACT FROM AUTHOR]

The limited retention time for single-transistor memory cell based on ferroelectric-gated field-effect-transistor (FeFET) has prevented the commercialization of its nonvolatile memory (NVM) option using the commercially available ferroelectric materials, such as strontium bismuth tantalite (SBT) or lead zirconium titanate (PZT), as the gate dielectric. However, the recent advent of the HfO2-based ferroelectric has demonstrated the strong possibility of meeting the NVM requirement of 10-year retention on aggressively scaled FeFETs. This letter will analyze why the retention for HfO2-based ferroelectric (FE–HfO2) is much longer than its PZT or SBT counterparts, based on the two major retention loss mechanisms: depolarization field and charge trapping. [ABSTRACT FROM PUBLISHER]