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1. On the Understanding of Cathode Related Trapping Effects in GaN-on-Si Schottky Diodes

Author

Thomas Lorin, William Vandendaele, Romain Gwoziecki, Yannick Baines, Jerome Biscarrat, Marie-Anne Jaud, Charlotte Gillot, Matthew Charles, Marc Plissonnier, G. Ghibaudo, and F. Gaillard

Subjects
Power semiconductor devices, gallium nitride, AlGaN/GaN, Schottky diodes, dynamic ron, field plates, Electrical engineering. Electronics. Nuclear engineering, TK1-9971
Abstract

Cathode related current collapse effect in GaN on Si Schottky barrier diodes is investigated in this paper. Capacitance and current relaxation measurements on diodes and gated-Van Der Pauw are associated with temperature dependent dynamic RON transients analysis to identify the parasitic trapping locations in the devices. We show here that the main part of the current collapse at the cathode comes from a combination of electron trapping in the passivation layer and in a carbon related trap in the GaN buffer layers (EA = ET - EV ≃ 0.9 eV) that can be studied independently by using the appropriate stress configurations. These two parasitic effects can lead to long recovery time (>1 ks) after reverse bias stress.

Published
2018
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2. Ethylene epoxidation on Ag/YSZ electrochemical catalysts: Understanding of oxygen electrode reactions

Author

T. Cavoué, A. Caravaca, I. Kalaitzidou, F. Gaillard, M. Rieu, J.P. Viricelle, and P. Vernoux

Subjects
Industrial electrochemistry, TP250-261, Chemistry, QD1-999
Abstract

In this study, we have investigated, for the very first time, the oxygen electrode reactions on Ag/YSZ electrochemical catalysts both in oxygen and under reaction conditions compatible with the ethylene epoxidation reaction. Electrochemical Impedance Spectroscopy (EIS) in combination with in-situ Raman spectroscopy and catalytic activity measurements were used to identify and understand the main oxygen reaction pathways. The results obtained suggested that the rate limiting step under an O2 reaction atmosphere (at 300 °C) is the O2 adsorption/dissociation process on the Ag catalyst-electrode. In addition, the polarization resistance increased with time under the presence of O2. This was attributed to the formation of Ag2O on the catalyst surface or near surface, which limits the oxygen electrode reactions. Finally, we observed that the addition of ethylene in the feed stream hinders the electrode reaction, due to its competitive chemisorption with oxygen on Ag. These results give new insights into the design of selective Ag/YSZ catalyst for ethylene epoxidation. Keywords: Electrochemical Impedance Spectroscopy (EIS), Oxygen electrode reaction, Ag/YSZ, Ethylene epoxidation

Published
2019
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3. Consistency of the current global ocean observing systems from an Argo perspective

Author

K. von Schuckmann, J.-B. Sallée, D. Chambers, P.-Y. Le Traon, C. Cabanes, F. Gaillard, S. Speich, and M. Hamon

Subjects
Geography. Anthropology. Recreation, Environmental sciences, GE1-350
Abstract

Variations in the world's ocean heat storage and its associated volume changes are a key factor to gauge global warming and to assess the earth's energy and sea level budget. Estimating global ocean heat content (GOHC) and global steric sea level (GSSL) with temperature/salinity data from the Argo network reveals a positive change of 0.5 ± 0.1 W m−2 (applied to the surface area of the ocean) and 0.5 ± 0.1 mm year−1 during the years 2005 to 2012, averaged between 60° S and 60° N and the 10–1500 m depth layer. In this study, we present an intercomparison of three global ocean observing systems: the Argo network, satellite gravimetry from GRACE and satellite altimetry. Their consistency is investigated from an Argo perspective at global and regional scales during the period 2005–2010. Although we can close the recent global ocean sea level budget within uncertainties, sampling inconsistencies need to be corrected for an accurate global budget due to systematic biases in GOHC and GSSL in the Tropical Ocean. Our findings show that the area around the Tropical Asian Archipelago (TAA) is important to closing the global sea level budget on interannual to decadal timescales, pointing out that the steric estimate from Argo is biased low, as the current mapping methods are insufficient to recover the steric signal in the TAA region. Both the large regional variability and the uncertainties in the current observing system prevent us from extracting indirect information regarding deep-ocean changes. This emphasizes the importance of continuing sustained effort in measuring the deep ocean from ship platforms and by beginning a much needed automated deep-Argo network.

Published
2014
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4. Sea surface freshening inferred from SMOS and ARGO salinity: impact of rain

Author

J. Boutin, N. Martin, G. Reverdin, X. Yin, and F. Gaillard

Subjects
Geography. Anthropology. Recreation, Environmental sciences, GE1-350
Abstract

The sea surface salinity (SSS) measured from space by the Soil Moisture and Ocean Salinity (SMOS) mission has recently been revisited by the European Space Agency first campaign reprocessing. We show that, with respect to the previous version, biases close to land and ice greatly decrease. The accuracy of SMOS SSS averaged over 10 days, 100 × 100 km2 in the open ocean and estimated by comparison to ARGO (Array for Real-Time Geostrophic Oceanography) SSS is on the order of 0.3–0.4 in tropical and subtropical regions and 0.5 in a cold region. The averaged negative SSS bias (−0.1) observed in the tropical Pacific Ocean between 5° N and 15° N, relatively to other regions, is suppressed when SMOS observations concomitant with rain events, as detected from SSM/Is (Special Sensor Microwave Imager) rain rates, are removed from the SMOS–ARGO comparisons. The SMOS freshening is linearly correlated to SSM/Is rain rate with a slope estimated to −0.14 mm−1 h, after correction for rain atmospheric contribution. This tendency is the signature of the temporal SSS variability between the time of SMOS and ARGO measurements linked to rain variability and of the vertical salinity stratification between the first centimeter of the sea surface layer sampled by SMOS and the 5 m depth sampled by ARGO. However, given that the whole set of collocations includes situations with ARGO measurements concomitant with rain events collocated with SMOS measurements under no rain, the mean −0.1 bias and the negative skewness of the statistical distribution of SMOS minus ARGO SSS difference are very likely the mean signature of the vertical salinity stratification. In the future, the analysis of ongoing in situ salinity measurements in the top 50 cm of the sea surface and of Aquarius satellite SSS are expected to provide complementary information about the sea surface salinity stratification.

Published
2013
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5. Study of Oxygen Desorption from SnO: New Possibilities through Fast Intermittent Temperature-Programmed Desorption

Author

F. Gaillard, J.-P. Joly, and A. Perrard

Subjects
Physical and theoretical chemistry, QD450-801
Abstract

A differential desorption technique called intermittent temperature-programmed desorption (ITPD) was used to gain new information on the superficial oxygen species of SnO 2 , a solid used extensively for the preparation of sensors and redox catalysts. The use of an original device involving an induction heating system enabled the time necessary for ITPD determination to be decreased by a factor of 20 or so, compared to that with a classical apparatus. TPD and ITPD studies carried out in vacuum showed the existence of at least two distinct states desorbing at temperatures higher than 700 K. The corresponding amount of adsorbed oxygen was less than 10% of that necessary for the formation of a compact monolayer of oxide ions. These two states exhibited apparent activation energies of desorption, E app , equal to 285 ± 10 kJ/mol and 334 ± 8 kJ/mol, respectively. The corresponding frequency factors, v, were far higher than 10 13 s −1 , indicating that re-adsorption was unlikely and that E app was equal to the activation energy for desorption, E d . Calculations using a classical desorption rate expression showed that the ITPD profiles could be simulated and compared to the experimental data successfully.

Published
2007
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6. Étude d'outils simplifiés pour la caractérisation physique des fumiers et composts

Author

J.F. DEVAUX and F. GAILLARD

Subjects
Environmental technology. Sanitary engineering, TD1-1066, Environmental sciences, GE1-350
Abstract

Dès qu'il désire réaliser des essais ou des tests d'épandage avec des fumiers et composts, un opérateur est confronté à la difficulté d'évaluer les caractéristiques physiques des produits. Il existe aujourd'hui des outils ou des méthodes, parfois normalisées, pour appréhender le taux de matière sèche, la densité, la résistance au cisaillement, la présence ou non de brins végétaux longs... Mais aucune de ces mesures individuelles ne permet de qualifier globalement le produit et leur mise en oeuvre est longue et compliquée. C'est l'association de plusieurs de ces données qui peut fournir une appréciation des propriétés physiques du produit utilisé. Un outil synthétique, qui fournirait lors de son emploi une information globale regroupant plusieurs des paramètres simples de caractérisation serait très utile. C'est ce que nous avons recherché dans cette étude, à partir de la mesure de l'effort nécessaire à l'arrachement du produit à épandre

Published
2006

7. Traitement des tiges de maïs à l'urée et utilisation pour la production laitière en région productrice de café et de banane en Tanzanie

Author

M. Chenost, V. Royer, J.M. Centrès, F. Gaillard, and J. Davis

Subjects
Bovin, Vache laitière, Alimentation des animaux, Maïs, Tige, Urée, Animal culture, SF1-1100
Abstract

Les auteurs ont testé de 1988 à 1990 le traitement à l'ammoniac par hydrolyse de l'urée soit à l'échelle individuelle en fosse, soit à l'échelle de la coopérative en tas, des tiges du maïs cultivé sur le plateau Masaï en Tanzanie, ces dernières constituant une ressource indispensable en saison sèche dans le système fourrager des petits producteurs laitiers installés sur les pentes montagneuses de ces régions. Les modalités de traitements en fosse et en tas sont décrites en détail. Les résultats obtenus montrent une amélioration appréciable de la production laitière mais cependant inférieure à celle qu'on aurait pu attendre. L'intérêt du traitement à grande échelle reste à approfondir et à conforter sur les plans socio-économique et zootechnique. Il réside surtout, pour le moment, dans la simplification des opérations de collecte et de transport des tiges de maïs depuis leur lieu de production dans la plaine jusquà leur lieu d'utilisation en montagne.

Published
1993
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8. Les cannes de maïs dans l’alimentation des ruminants. Conservation à l’ammoniac et à l’urée et valeur alimentaire

Author

M. CHENOST, F. GAILLARD, J.M. BESLE, D. BOFFETY, J.M. BOISSAU, J.P. CHAISE, J. HETAULT, and L. L’HOTELIER

Subjects
Animal culture, SF1-1100, Aquaculture. Fisheries. Angling, SH1-691
Abstract

On peut conserver sous atmosphère ammoniacale des cannes de maïs pressées en balles le jour même (teneur en matière sèche de 35 à 40 %) ou le lendemain (teneur en MS de 50 %) de la récolte du grain à la moissonneuse-batteuse équipée d’un bec andaineur. Il convient pour cela d’injecter 3 kg d’ammoniac anhydre (dose minimum surtout si les cannes sont humides) soit d’incorporer 6 kg d’urée en granulé (qui s’hydrolyse pour produire 3 kg d’NH3) par 100 kg de MS de cannes. Les balles, traitées quelques heures après leur fabrication et mises sous gaine de plastique pendant 1 mois 1/2 à 2 mois, peuvent alors être ouvertes sans reprise des fermentations. Ces techniques constituent avant tout des traitements conservateurs de produits humides plutôt que des traitements améliorateurs de la valeur alimentaire. La digestibilité et la valeur PDIE des cannes ainsi conservées sont en effet peu modifiées ; la valeur PDIN passe toutefois de 30 à 70 g/kg MS grâce à la fixation de l’ammoniac. Le dispositif d’incorporation directe de l’urée dans la balle reste à perfectionner pour garantir une conservation homogène des cannes à l’intérieur des balles.

Published
1991
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12. TCAD simulations of FDSOI devices down to deep cryogenic temperature

Author

E. Catapano, M. Cassé, F. Gaillard, S. de Franceschi, T. Meunier, M. Vinet, G. Ghibaudo, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Transport Electronique Quantique et Supraconductivité (LaTEQS), PHotonique, ELectronique et Ingénierie QuantiqueS (PHELIQS), Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), Circuits électroniques quantiques Alpes (NEEL - QuantECA), Institut Néel (NEEL), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )

Subjects
[PHYS]Physics [physics], [SPI]Engineering Sciences [physics], Materials Chemistry, Electrical and Electronic Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials
Abstract

International audience

Published
2022

13. Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures

Author

E. Catapano, A. Aprà, M. Cassé, F. Gaillard, S. de Franceschi, T. Meunier, M. Vinet, G. Ghibaudo, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), PHotonique, ELectronique et Ingénierie QuantiqueS (PHELIQS), Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), Laboratoire de Transport Electronique Quantique et Supraconductivité (LaTEQS), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Circuits électroniques quantiques Alpes (NEEL - QuantECA), Institut Néel (NEEL), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )

Subjects
[PHYS]Physics [physics], [SPI]Engineering Sciences [physics], Materials Chemistry, Electrical and Electronic Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials
Abstract

International audience

Published
2022

14. Specificities of linear Si QD arrays integration and characterization

Author

H. Niebojewski, B. Bertrand, E. Nowak, T. Bedecarrats, B. Cardoso Paz, L. Contamin, P.A. Mortemousque, V. Labracherie, L. Brevard, H. Sahin, J. Charbonnier, C. Thomas, M. Assous, M. Casse, M. Urdampilleta, Y.-M. Niquet, F. Perruchot, F. Gaillard, S. De Franceschi, T. Meunier, and M. Vinet

Published
2022

15. Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration

Author

T. Mota Frutuoso, X. Garros, P. Batude, L. Brunet, J. Lacord, B. Sklenard, V. Lapras, C. Fenouillet-Beranger, M. Ribotta, A. Magalhaes-Lucas, J. Kanyandekwe, R. Kies, G. Romano, E. Catapano, M. Casse, J. Lugo-Alvarez, P. Ferrari, F. Gaillard, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and IEEE

Subjects
resistance, silicon-on-insulator, three-dimensional displays, VLSI (Very Large Scale Integration), PACS 85.42, capacitance, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, predictive models, performance evaluation
Abstract

International audience; We present, for the first time, a new CV based technique to extract the Active Dopant Profile under the spacer in thin film FDSOI devices (CV-AJP). The methodology is successfully applied to FDSOI devices fabricated at 500°C for 3D sequential integration. It shows that the ION/ IOFF trade-off relies mainly on the chemical dopant introduction below the offset spacer, as the activation level obtained with thermal activation is found to be high enough. The LT device demonstrated in this work, already outperforms the literature. The active profile extraction also allows to draw guidelines for further device performance improvement: using a scaled SiCO spacer (5,5nm) allows to circumvent the negligible dopant diffusion at 500°C without dynamic performance penalty due to its low-k dielectric value.

Published
2022

16. Influence of Carbon on pBTI Degradation in GaN-on-Si E-Mode MOSc-HEMT

Author

A. Krakovinsky, Louis Gerrer, R. Modica, Gerard Ghibaudo, Jérôme Biscarrat, J. Cluzel, William Vandendaele, Marie-Anne Jaud, Gaudenzio Meneghesso, F. Gaillard, Steve W. Martin, Xavier Garros, A. G. Viey, R. Gwoziecki, Marc Plissonnier, Ferdinando Iucolano, and Matteo Meneghini

Subjects
010302 applied physics, Range (particle radiation), Bias temperature instability (BTI), capture emission time (CET) map, GaN-on-Si E-mode MOS-c high-electron-mobility transistor (HEMT), power device reliability, business.industry, Gallium nitride, High-electron-mobility transistor, Activation energy, 01 natural sciences, Temperature measurement, Electronic, Optical and Magnetic Materials, Stress (mechanics), chemistry.chemical_compound, chemistry, Gate oxide, Logic gate, 0103 physical sciences, Optoelectronics, Electrical and Electronic Engineering, business
Abstract

In this article, threshold-voltage VTH instabilities under positive gate voltage stress VGStress in GaN-on-Si devices are thoroughly investigated. Measurement-stress-measurement pBTI technique using ultrafast VG ramp was applied in this study. PBTI transients performed at different VGStress and several temperatures highlight the influence of two trap populations, one being related to Al2O3 gate oxide defects and the other one to CN acceptors in GaN lattice. Both trap populations are located close to the Al2O3/GaN interface and lead to VTH instabilities via two different underlying mechanisms simulated by TCAD. PBTI transients obtained under several dc and ac stress conditions have also been modeled using capture emission time (CET) maps and allowed the identification of the two trap populations. Analysis of the temperature-dependent CET maps gives an activation energy of 0.8–0.9 eV related to CN traps and an energy range between 0.7 and 1.5 eV ascribed to Al2O3 defects above the GaN conduction band energy. This study provides a better understanding of the underlying physical mechanisms, leading to BTI degradation in GaN-HEMT technologies.

Published
2021

20. High-resistivity silicon-based substrate using buried PN junctions towards RFSOI applications

Author

M. Moulin, M. Rack, T. Fache, Z. Chalupa, C. Plantier, Y. Morand, J. Lacord, F. Allibert, F. Gaillard, J. Lugo, L. Hutin, J.P. Raskin, and UCL - SST/ICTM/ELEN - Pôle en ingénierie électrique

Subjects
Materials Chemistry, Electronic, Optical and Magnetic Materials, Electrical and Electronic Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials
Published
2022

22. 3D sequential integration: applications and associated key enabling modules (design & technology)

Author

P. Batude, O. Billoint, S. Thuries, P. Malinge, C. Fenouillet-Beranger, A. Peizerat, G. Sicard, P. Vivet, S. Reboh, C. Cavalcante, L. Brunet, M. Ribotta, L. Brevard, X. Garros, T. Mota Frutuoso, B. Sklenard, J. Lacord, J. Kanyandekwe, S. Kerdiles, P. Sideris, C. Theodorou, V. Lapras, M. Mouhdach, G. Gaudin, G. Besnard, I. Radu, F. Ponthenier, A. Farcy, E. Jesse, F. Guyader, T. Matheret, P. Brunet, F. Milesi, L. Le Van-Jodin, A. Sarrazin, B. Perrin, C. Moulin, S. Maitrejean, M. Alepidis, I. Ionica, S. Cristoloveanu, F. Gaillard, M. Vinet, F. Andrieu, J. Arcamone, and E. Ollier

Published
2021

25. Opercular Perivascular Cyst: Old Entity, New Location

Author

D.J.T. McArdle, F. Gaillard, and I. Page

Subjects
business.industry, medicine, Radiology, Nuclear Medicine and imaging, Cyst, Anatomy, medicine.disease, business
Abstract

Dilated perivascular spaces in the brain have typical neuroimaging appearances. The classification of dilated perivascular spaces is based on their relationship to blood vessels and is divided into 3 subtypes. A fourth type has been described and termed “opercular perivascular space.” We report on an incidental finding of an opercular perivascular space on MR imaging. Dilated perivascular spaces are benign; it is important to be familiar with their characteristic appearance to prevent reporting them as a neoplasm.

Published
2021

26. Accurate statistical extraction of AlGaN/GaN HEMT device parameters using the Y-function

Author

Matthew Charles, J. Cluzel, A. Krakovinsky, Gerard Ghibaudo, R. Kom Kammeugne, Edwige Bano, Jérôme Biscarrat, Laura Vauche, C. Le Royer, Charles Leroux, F. Gaillard, R. Gwoziecki, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and ANR-10-AIRT-0005,NANOELEC,NANOELEC(2010)

Subjects
Electron mobility, Materials science, 02 engineering and technology, High-electron-mobility transistor, 01 natural sciences, [SPI]Engineering Sciences [physics], Y-functionNormally-off, 0103 physical sciences, Materials Chemistry, Hardware_INTEGRATEDCIRCUITS, Wafer, DEG, Electrical and Electronic Engineering, Device parameters, 010302 applied physics, [PHYS]Physics [physics], business.industry, Extraction (chemistry), High-electron-mobility-transistor (HEMT), Function (mathematics), 021001 nanoscience & nanotechnology, Condensed Matter Physics, Electronic, Optical and Magnetic Materials, Threshold voltage, Gallium nitride (GaN), Electron mobility2, Optoelectronics, 0210 nano-technology, business, Statistical electrical characterization, Communication channel
Abstract

International audience; A new protocol based on Y-function is used for accurate statistical extraction of electrical parameters of High Electron Mobility Transistor (HEMT) devices for GaN technology. This protocol presented here is used for extraction of relevant electrical parameters such as oxide capacitance, threshold voltage, effective mobilities and access resistance. This study has been verified over a large range of channel lengths for two normally-off HEMT GaN wafers having different levels of access resistances.

Published
2021

29. Characterization and Lambert – W Function based modeling of FDSOI five-gate qubit MOS devices down to cryogenic temperatures

Author

S. De Franceschi, Mikael Casse, E. Catapano, Maud Vinet, F. Gaillard, A. Apra, Tristan Meunier, and Gerard Ghibaudo

Subjects
Materials science, Scattering, Subthreshold conduction, business.industry, Attenuation, Transistor, Cryogenics, law.invention, symbols.namesake, law, Lambert W function, Qubit, Logic gate, symbols, Optoelectronics, business
Abstract

FD-SOI five-gate (5G) qubit MOS devices are electrically characterized in linear regime down to deep cryogenic temperatures. The Lambert-W function is successfully used for the modelling of such 5G MOS devices from subthreshold regime to strong inversion. Its applicability is demonstrated down to 20 K. The 5G device is modeled as a series of five independent transistors: the "active" one, that directly controls the current, and the "external" ones, that act as access resistances. The Lambert-W function enables to accurately determine the inversion charge and the active channel resistance from weak to strong inversion. This approach allows reconstructing the drain current characteristic avoiding the evaluation of the mobility attenuation factors. The main device parameters are extracted versus temperature. Finally, the role of different scattering mechanisms has been investigated, underlying the impact of neutral defects for the gates in proximity of source and drain.

Published
2021

33. RF Performance of Devices Processed in Low-Temperature Sequential Integration

Author

Xavier Garros, Jose Lugo-Alvarez, Laurent Brunet, Perrine Batude, Christoforos G. Theodorou, P. Sideris, Philippe Ferrari, C. Fenouille-Beranger, T. Mota Frutuoso, F. Gaillard, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
010302 applied physics, Coupling, Materials science, Transistor, 01 natural sciences, 7. Clean energy, Electronic, Optical and Magnetic Materials, law.invention, Threshold voltage, PMOS logic, [SPI.TRON]Engineering Sciences [physics]/Electronics, CMOS, law, Logic gate, 0103 physical sciences, Figure of merit, Radio frequency, Electrical and Electronic Engineering, Atomic physics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS, [PHYS.PHYS.PHYS-DATA-AN]Physics [physics]/Physics [physics]/Data Analysis, Statistics and Probability [physics.data-an]
Abstract

RF performance and intertier coupling of CMOS processed in 3-D sequential integration are investigated. pMOS transistor fabricated with a 500 °C thermal budget features good RF figures of merit with ${f}_{t} =105$ GHz and ${f}_{\text {max}} =175$ GHz for a gate length of 45 nm and ${V}_{\text {DD}} = -1$ V. Moreover, we demonstrate that the low- ${k}$ SiCO oxide spacer and low polysilicon gate resistance obtained with the low temperature process contribute to ${f}_{\text {max}}$ results that are better than high temperature process (above 1000°). Finally, we illustrate the crosstalk effects and the influence of the low-tier transistor gate voltage ${V}_{\text {G}}$ on the top-tier threshold voltage ${V}_{T}$ . We also show that a polysilicon ground shield integrated under the top-tier transistor substantially attenuates the intertier RF field coupling effects.

Published
2021

34. Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration

Author

F. Gaillard, C. Fenouillet-Beranger, X. Garros, Joris Lacord, Jose Lugo-Alvarez, Louis Gerrer, M. Casse, Philippe Ferrari, Laurent Brunet, E. Catapano, Francois Andrieu, and T. Mota Frutuoso

Subjects
Materials science, Silicon, business.industry, Interface (computing), Transistor, Oxide, chemistry.chemical_element, Silicon on insulator, Temperature measurement, law.invention, chemistry.chemical_compound, Reliability (semiconductor), chemistry, law, Optoelectronics, Degradation (geology), business
Abstract

The impact of interface charges under the gate spacer on FDSOI devices integrated in low temperature process are explored. A great number of traps (~1013/cm2) are identified on the interface between the spacer oxide and the silicon film using Terman's method for interface states characterization. Thanks to electrical characterization and TCAD simulations, it is shown that the trapped charges induce the formation of a depleted region in the vicinities of the spacer. Moreover, a strong degradation of performances on underlap channels is observed. The spacer charges influence on reliability measurements is finally explored.

Published
2021

35. BTI Arbitrary Stress Patterns Characterization & Machine-Learning optimized CET Maps Simulations

Author

F. Gaillard, Xavier Federspiel, X. Garros, Florian Cacho, J. Cluzel, Louis Gerrer, Emmanuel Vincent, and David Roy

Subjects
Stress (mechanics), Work (thermodynamics), Reliability (semiconductor), business.industry, Computer science, Limit (music), Microelectronics, business, Temperature measurement, Simulation, Degradation (telecommunications), Time–frequency analysis
Abstract

Device aging induced variability remains a major hurdle to microelectronics. To limit its impact circuit designers need effective & accurate degradation models to be implemented in the industry-grade reliability simulators. Despite remarkable efforts in characterizing and modelling Bias Temperature Instabilities, the devices are scarcely tested under realistic stresses actually endured by the device inside a functioning circuit, as done in this work. Besides, we propose an original approach to calibrate the Capture/Emission Times map given as an entry to the RC model of BTI degradation. Simulated degradations are in good agreement with measurement not only for AC and DC stresses but also for arbitrary patterns.

Published
2021

36. 16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors

Author

F. Mazen, C. Pellissier, C. Jahan, A. Roman, Laurent Grenouillet, N.-P. Tran, M. Bedjaoui, A. Seignard, S. Ricavy, Elisa Vianello, P. Besombes, V. Meli, O. Billoint, Christelle Boixaderas, M. Tessaire, S. Landis, Gabriel Molas, A. Persico, A. Magalhaes-Lucas, P. Dezest, Christelle Charpin-Nicolle, F. Gaillard, S. Bernasconi, R. Segaud, J. Arcamone, Steve W. Martin, C. Carabasse, T. Magis, N. Castellani, and Etienne Nowak

Subjects
Materials science, business.industry, Transistor, Spice, Monte Carlo method, Silicon on insulator, law.invention, Power (physics), Non-volatile memory, CMOS, law, Logic gate, Optoelectronics, business
Abstract

We present for the first time Si-doped HfO 2 -based OxRAM 16kbit arrays integrated in the BEOL of 28nm FDSOI CMOS, targeting low cost and low power embedded applications. Excellent LRS/HRS raw distributions are reported on 1T-1R 16kbit arrays with zero bit-fail up to 105 cycles, using core logic (GO1) selector transistors. The OxRAM compatibility with GO1 transistors paves the way to arrays with minimum bitcell area of $0.066\ \mu \mathrm{m}^{2}$ at $125\mu \mathrm{A}$ programming current. We also demonstrate direct correlation between transistor compliance current variability within the 1T-1R array and the LRS distribution. This result indicates that the intrinsic LRS variability is smaller than the measured one. SPICE Monte-Carlo simulations confirm the large compliance current dispersion measured on transistors designed at minimum gate length and show path to improve even further the LRS distribution and hence the OxRAM memory window.

Published
2021
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37. Study on the difference between ID(VG) and C(VG) pBTI shifts in GaN-on-Si E-mode MOSc-HEMT

Author

Marie-Anne Jaud, A. Krakovinsky, Steve W. Martin, A. G. Viey, Ferdinando Iucolano, R. Modica, Matteo Meneghini, Jérôme Biscarrat, Gerard Ghibaudo, R. Gwoziecki, V. Sousa, J. Coignus, William Vandendaele, F. Gaillard, J. Cluzel, and Gaudenzio Meneghesso

Subjects
010302 applied physics, Physics, Analytical chemistry, Charge (physics), 02 engineering and technology, High-electron-mobility transistor, 021001 nanoscience & nanotechnology, Gate voltage, 01 natural sciences, BTI reliability, DC pBTI, GaN-on-Si E-mode MOSc-HEMT, Gate oxide, 0103 physical sciences, 0210 nano-technology
Abstract

In this study, we investigate the difference between I D (V G ) and C(V G ) pBTI shifts on GaN-on-Si E-mode MOS-channel HEMTs, under various gate voltage stresses (V GStress ) and temperatures (T). A new experimental setup using ultra-fast and simultaneous I D (V G ) and C(V G ) measurements enables to monitor the threshold voltage V TH drift through two metrics, $\mathrm{\Delta}\mathrm{V}_{\text{THI}}$ and $\mathrm{\Delta}\mathrm{V}_{\text{THC}}$ . Experimental pBTI results depict a difference between $\mathrm{\Delta}\mathrm{V}_{\text{THI}}$ and $\mathrm{\Delta}\mathrm{V}_{\text{THC}}$ , such as $\mathrm{\Delta}\mathrm{V}_{\text{THI}} . TCAD simulations support that ID(V G ) shift ( $\mathrm{\Delta}\mathrm{V}_{\text{THI}}$ ) is related to charge trapping in Al 2 O 3 gate oxide defects at the gate corners regions while C(V G ) shift ( $\mathrm{\Delta}\mathrm{V}_{\text{THC}}$ ) is mainly ascribed to the gate bottom, due to the presence of a back-barrier layer in the epitaxy. These previous results enable to deduce that the Al 2 O 3 defects density is more important at the gate corners than at the gate bottom.

Published
2021

38. Impact of area scaling on the ferroelectric properties of back-end of line compatible Hf 0.5 Zr 0.5 O 2 and Si:HfO 2 -based MFM capacitors

Author

P. Chiquet, T. Francois, Jean Coignus, Uwe Schroeder, F. Gaillard, Nicolas Vaxelaire, Etienne Nowak, S. Chevalliez, Stefan Slesazeck, Marc Bocquet, Laurent Grenouillet, Thomas Mikolajick, F. Aussenac, C. Carabasse, Claudia Richter, Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), and NaMLab gGmbH

Subjects
010302 applied physics, Materials science, Physics and Astronomy (miscellaneous), business.industry, Orders of magnitude (temperature), chemistry.chemical_element, 02 engineering and technology, Dielectric, 021001 nanoscience & nanotechnology, 01 natural sciences, Ferroelectricity, law.invention, Back end of line, Capacitor, chemistry, law, 0103 physical sciences, Optoelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 0210 nano-technology, Tin, business, Polarization (electrochemistry), Scaling
Abstract

International audience; Scaling of planar HfO2-based ferroelectric capacitors is investigated experimentally by varying the capacitor area within 5 orders of magnitude, under the scope of limited thermal budget for crystallization. Both Hf0.5Zr0.5O2 (HZO) and Si-doped HfO2 (HSO) based metal/ferroelectric/metal (MFM) capacitors with 10 nm dielectric film thickness and TiN electrodes are demonstrated to be ferroelectric when integrated in a back-end of line (BEOL) of 130 nm CMOS technology, with a maximum thermal budget below 500°C. When the area of the ferroelectric capacitors is scaled down from 7850 µm² to 0.28 µm², no degradation of the remanent polarization (2•PR > 10 µC/cm² for HSO, > 30 µC/cm² for HZO) or of the switching kinetics (down to 100 ns at 3V) is observed. Significant improvement of the field cycling endurance is demonstrated upon area scaling, consistent with the reduction of the total number of defects when devices are shrunk. The results pave the way to future BEOL demonstrations in 130 nm and more advanced nodes with record endurance similar to perovskite ferroelectrics.

Published
2021
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40. Carbon-related pBTI degradation mechanisms in GaN-on-Si E-mode MOSc-HEMT

Author

A. Krakovinsky, Jérôme Biscarrat, R. Gwoziecki, Ferdinando Iucolano, Matteo Meneghini, Xavier Garros, F. Gaillard, Steve W. Martin, R. Modica, Marie-Anne Jaud, William Vandendaele, A. G. Viey, Marc Plissonnier, Gaudenzio Meneghesso, Louis Gerrer, J. Cluzel, and G. Ghibaudo

Subjects
010302 applied physics, Arrhenius equation, High-electron-mobility transistor, Substrate (electronics), 01 natural sciences, Molecular physics, Threshold voltage, Stress (mechanics), symbols.namesake, Gate oxide, Ionization, 0103 physical sciences, symbols, Degradation (geology)
Abstract

In this paper, threshold voltage V TH instabilities under positive gate voltage stress (V GStress ) are thoroughly investigated on GaN-on-Si Enhancement-mode MOS-channel HEMTs. An analysis of pBTI transients performed at several V GStress and temperatures (T) reveals two trap populations close to the Al 2 O 3 /GaN interface namely (1) C N acceptors in the GaN substrate, and (2) defects in the Al 2 O 3 gate oxide. Both trap populations lead to V TH instabilities via different underlying mechanisms as evidenced by TCAD simulations. At V GStress TH drifts are ascribed to C N traps ionization localized at 0.8-0.9eV above the valence band (E v ). At higher VGstress, electron trapping also occurs in Al 2 O 3 defects leading to stronger V TH degradation. DC & AC pBTI transients have been modeled using Capture Emission Time (CET) map approach, which allowed the identification of both trap populations. Temperature-dependent CET maps extraction reveals a strong activation of C N traps with temperature, and confirms Arrhenius analysis consistency. This study provides a deep understanding of BTI reliability in GaN-HEMT technologies.

Published
2020

41. A Novel Insight on Interface Traps Density (Dit) Extraction in GaN-on-Si MOS-c HEMTs

Author

R. Gwoziecki, William Vandendaele, A. Krakovinsky, Steve W. Martin, A. G. Viey, Marie-Anne Jaud, Marc Plissonnier, Laura Vauche, R. Modica, Ferdinando Iucolano, F. Gaillard, Jérôme Biscarrat, and C. Le Royer

Subjects
Materials science, Equivalent series resistance, business.industry, Extraction (chemistry), Doping, Gate stack, Temperature measurement, law.invention, Capacitor, High resistivity, law, Logic gate, Optoelectronics, business
Abstract

This paper aims to investigate the interface traps density (Dit) extraction on MOS gate stacks processed on GaN-on-Si substrates. CGV (Capacitance-Conductance) measurements under different frequencies (f = 1kHz-1MHz) and temperatures (T = 20K-500K) on various Al 2 O 3 /UID-GaN MOS capacitors were carried out. Thorough analysis under dark and UV light compared to TCAD/analytical modeling reveal a strong distributed series resistance under the gate related to the high resistivity of UID-GaN layer. This effect leads to an overestimation of the actual Dit value extracted at high frequencies (> 10kHz). Choosing an adequate doping under the gate (n-type) cancels the series resistance effect and unlocks a reliable extraction through {T/f} dependent CGV measurements.

Published
2020

42. Cryogenic Operation of Thin-Film FDSOI nMOS Transistors: The Effect of Back Bias on Drain Current and Transconductance

Author

Maud Vinet, Mikael Casse, B. Cardoso Paz, S. De Franceschi, Thierry Poiroux, Sylvain Barraud, Tristan Meunier, F. Gaillard, Gerard Ghibaudo, Laboratoire d'électronique et des technologies de l'Information [Sfax] (LETI), École Nationale d'Ingénieurs de Sfax | National School of Engineers of Sfax (ENIS), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Commissariat à l'Énergie Atomique (CEA) DRMFC (CEA GRENOBLE), Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Circuits électroniques quantiques Alpes (NEEL - QuantECA), Institut Néel (NEEL), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Circuits électroniques quantiques Alpes (QuantECA), Centre National de la Recherche Scientifique (CNRS)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA)

Subjects
010302 applied physics, Materials science, Silicon, business.industry, Transconductance, Transistor, Silicon on insulator, chemistry.chemical_element, 01 natural sciences, Electronic, Optical and Magnetic Materials, law.invention, chemistry, law, Logic gate, 0103 physical sciences, Optoelectronics, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, NMOS logic, AND gate, ComputingMilieux_MISCELLANEOUS, Voltage
Abstract

In this article, we have studied the drain current and transconductance of nMOS fully depleted silicon-on-insulator (FDSOI) transistors operating at low temperature (typically < 20 K) when back gate is forward biased. Humps appear in the current, leading to oscillations of the transconductance with gate voltage, owing to mobility discontinuity due to intersubband scattering, in relation with the 2-D subband structure. The conditions for which these specific features appear in thin-film silicon-on-insulator (SOI) devices have been analyzed, by varying the temperature, drain voltage, silicon channel thickness, and gate length.

Published
2020

44. Variability Evaluation of 28nm FD-SOI Technology at Cryogenic Temperatures down to 100mK for Quantum Computing

Author

M. Casse, Andre Juge, Ph. Galy, A. G. M. Jansen, Emmanuel Vincent, Gerard Ghibaudo, L. Le Guevel, M. Vinet, Gerard Billiot, F. Gaillard, B. Cardoso Paz, S. De Franceschi, T. Meunier, Romain Maurand, Sebastien Haendler, Gael Pillonnet, Laboratoire de Transport Electronique Quantique et Supraconductivité (LaTEQS), PHotonique, ELectronique et Ingénierie QuantiqueS (PHELIQS), Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), and Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)

Subjects
010302 applied physics, Physics, Condensed matter physics, Silicon on insulator, 02 engineering and technology, 021001 nanoscience & nanotechnology, 01 natural sciences, 7. Clean energy, [SPI]Engineering Sciences [physics], Gain factor, [PHYS.QPHY]Physics [physics]/Quantum Physics [quant-ph], 0103 physical sciences, 0210 nano-technology, ComputingMilieux_MISCELLANEOUS, Quantum computer
Abstract

Variability of28nm FD-SOI transistors is evaluated for the first time down to ultra low temperatures (UL T), at T= 1 00mK. High performance is achieved at UL T for short channel transistors, with $\mathrm{I}_{\mathrm{ON}} > 1\mathrm{mA}\mu \mathrm{m}$ and $\mathrm{I}_{\mathrm{OFF}}$ below the equipment accuracy $(\mathrm{V}_{\mathrm{TH}})$ and current gain factor $(\beta)$ variabilities. Besides that, we demonstrated that the increase of $\mathrm{V}_{\mathrm{TH}}$ and $\beta$ variabilities at low temperature remains reasonably low in comparison to RT values and other CMOS technologies, so that it should not be detrimental to circuit operation in this range of temperatures.

Published
2020

45. Nanosecond Laser Anneal (NLA) for Si-Implanted HfO2 Ferroelectric Memories Integrated in Back-End of Line (BEOL)

Author

C. Pellissier, Etienne Nowak, S. Chevalliez, Furqan Mehmood, F. Mazen, T. Francois, Uwe Schroeder, F. Triozon, Sebastien Kerdiles, Thomas Mikolajick, F. Gaillard, Guillaume Rodriguez, T. Magis, Laurent Grenouillet, Viktor Havel, Jean Coignus, C. Carabasse, Nicolas Vaxelaire, and Stefan Slesazeck

Subjects
010302 applied physics, Materials science, Silicon, business.industry, chemistry.chemical_element, Coercivity, Laser, 01 natural sciences, Ferroelectricity, law.invention, Back end of line, Capacitor, chemistry, CMOS, law, 0103 physical sciences, Optoelectronics, Wafer, business
Abstract

10nm Si-implanted HfO 2 is demonstrated to be ferroelectric for the first time when integrated in a Back- End-Of - Line (BEOL) 130nm CMOS. Scaled $.28\mu \mathrm{m}^{2}$ . capacitors demonstrate excellent endurance (109 cycles measured at 4 V, extrapolated to be 1012 at 3V), with tight coercive field distributions at wafer scale and excellent data retention at 85°C. To extend the ferroelectric BEOL compatibility of 10nm or thinner HfO 2 - based films, but also to understand their crystallization dynamics, nanosecond laser anneal is demonstrated to be very appealing, even for undoped HfO 2 .

Published
2020

46. Zinc Coated Steel/Epoxy Adhesive Systems

Author

D. Verchère, F. Gaillard, M. Romand, and H. Hocquaux

Subjects
Epoxy adhesive, Materials science, chemistry, chemistry.chemical_element, Zinc, Composite material
Published
2020

47. Analysis of MIS-HEMT Device Edge Behavior for GaN Technology Using New Differential Method

Author

Jérôme Biscarrat, J. Cluzel, R. Kom Kammeugne, R. Gwoziecki, Matthew Charles, C. Le Royer, Charles Leroux, Gerard Ghibaudo, Edwige Bano, Laura Vauche, F. Gaillard, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
010302 applied physics, Resistive touchscreen, Materials science, business.industry, Transistor, Gallium nitride, High-electron-mobility transistor, 01 natural sciences, Capacitance, Electronic, Optical and Magnetic Materials, law.invention, chemistry.chemical_compound, [SPI]Engineering Sciences [physics], Semiconductor, chemistry, law, Logic gate, 0103 physical sciences, Optoelectronics, Wafer, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, ComputingMilieux_MISCELLANEOUS
Abstract

A new differential method for accurate extraction of electrical parameters of high-electron mobility transistor (HEMT) devices for gallium nitride (GaN) technology is proposed. This method, presented here for the first time, is used to study the mobility degradation with gate length, allowing an analysis of the contribution of the gate edge region to the total metal–insulator semiconductor (MIS)-HEMT device conductance. First, an analytical model is proposed to account for the relative conduction of the edges and the main flat part of the channel HEMTs. Second, the differential method allows the split- CV mobility extraction of each part, allowing a precise analysis of the resistive contribution of each region of the HEMT devices. This study has been performed over a large range of channel lengths for two normally OFF HEMT GaN wafers having different recess depths.

Published
2020

48. Influence of substrate resistivity on porous silicon small-signal RF properties

Author

Emmanuel Rolland, Helene Jacquinot, Thomas Lorne, F. Gaillard, Florence Servant, Geoffroy Godet, Jose Lugo-Alvarez, T. Taris, Emmanuel Augendre, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Département Composants Silicium (DCOS), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Laboratoire de l'intégration, du matériau au système (IMS), and Université Sciences et Technologies - Bordeaux 1 (UB)-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS)

Subjects
010302 applied physics, Materials science, Silicon, business.industry, Attenuation, chemistry.chemical_element, Conductivity, Porous silicon, 01 natural sciences, Omega, Electronic, Optical and Magnetic Materials, [INFO.INFO-NI]Computer Science [cs]/Networking and Internet Architecture [cs.NI], chemistry, 0103 physical sciences, Optoelectronics, Insertion loss, linear attenuation coefficient, Wafer, porous silicon (PS), Radio frequency, Electrical and Electronic Engineering, S-parameters, business, substrate resistivity, Crosstalk
Abstract

International audience; This article provides guidelines to design porous silicon (PS) layers regarding optimization of small signal properties in passive structures for radio frequency (RF): insertion loss and crosstalk. Results are based on high-frequency measurements on 200-mm wafers and electromagnetic simulations up to 40 GHz. Using substrate resistivity below 1 Ohm.cm allows the best tradeoff with minimized PS thickness.

Published
2020

49. Study of forward AC stress degradation of GaN-on-Si Schottky diodes

Author

T. Lorin, R. Gwoziecki, F. Gaillard, William Vandendaele, Gerard Ghibaudo, Jérôme Biscarrat, Charlotte Gillot, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and TOURS 2015

Subjects
Materials science, Schottky barrier, Schottky diodes, 02 engineering and technology, Dielectric, 01 natural sciences, Stress (mechanics), AC stress, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, Diode, 010302 applied physics, Power devices GaN, business.industry, 020208 electrical & electronic engineering, Schottky diode, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Anode, Threshold voltage, Optoelectronics, Relaxation (physics), business
Abstract

International audience; Forward AC stress and relaxation have been performed on GaN-on-Si Schottky diodes to study the shift of diode characteristics such as threshold voltage. Influence of frequency and length of first anode field plate are studied. PBTI measurement performed on HEMTs with gate similar to the first anode field plate rules out the degradation of the dielectric under the anode field plate and tends to prove that Schottky contact itself could be the cause of forward stress degradation.

Published
2018

50. Demonstration of BEOL-compatible ferroelectric Hf 0.5 Zr 0.5 O 2 scaled FeRAM co-integrated with 130nm CMOS for embedded NVM applications

Author

Laurent Grenouillet, P. Chiquet, C. Carabasse, Evelyn T. Breyer, Uwe Schroeder, F. Aussenac, T. Francois, P. Blaise, Marc Bocquet, Claudia Richter, Stefan Slesazeck, Nicolas Vaxelaire, Virginie Loup, A. Makosiej, Monica Materano, Bastien Giraud, F. Gaillard, J. Coignus, Viktor Havel, Etienne Nowak, T. Magis, C. Pellissier, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS), NaMLab gGmbH, and Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS)-Aix Marseille Université (AMU)

Subjects
010302 applied physics, Materials science, business.industry, chemistry.chemical_element, 02 engineering and technology, 021001 nanoscience & nanotechnology, 7. Clean energy, 01 natural sciences, Ferroelectricity, law.invention, Capacitor, CMOS, chemistry, law, 0103 physical sciences, Ferroelectric RAM, Scalability, Optoelectronics, Data retention, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 0210 nano-technology, Tin, business, Voltage
Abstract

International audience; We demonstrate successful scalability of conventional 100µm diameter TiN/HZO/TiN capacitors down to 300nm by successfully co-integrating them for the first time in the Back-End-Of-Line of 130nm CMOS technology. Excellent performance are reported on those scaled bitcells, such as remnant polarization 2.PR > 40µC/cm², endurance > 10 11 cycles, switching speeds < 100ns, operating voltages < 4V, and data retention at 125°C. Presented results pave the way to < 10fJ/bit ultra-low power FeRAM for IoT applications.

Published
2019

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