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In this paper, we have shown that the sputter etch before cobalt deposition during the silicide processing of a deep submicron CMOS device fabrication needs to be optimized in order to eliminate a detrimental origin of gate (G) to source (S)/drain (D) bridging. It is known that Co cannot reduce even a thin layer of native oxide. Therefore, it is necessary to ensure that Co is deposited on a very clean Si surface. To ensure this, an in-situ sputter etch is commonly conducted before Co deposition. It is observed that this sputter etch process can sputter Si from the S/D area and deposit them on the sidewall spacer (SWS). This sputtered Si in turn will react with deposited Co and form silicide. The worst case leakage currents from poly-Si to composite for long (10 m) and narrow (0.18 micron) poly lines are shown to be on the order of milliampere. Transmission electron microscope (TEM) micrographs included show the existence of cobalt silicide layers (~ 8 nm thick) over sidewall spacer. The silicide thickness on the sidewall spacer is correlated with resistance value calculated from current and voltage (I-V) measurements. The need for optimizing the sputter etch recipe has been validated by TEM and I-V measurements. Index Terms--CMOS processing, cobalt silicide, G to S/D bridging, sidewall spacer, sputter etch.

This paper describes improvements in the self-aligned contact process for 0.150 [micro]m and 0.175 [micro]m technology generations. Using a dynamic random access memory cell layout, we show that self-aligned contacts can be formed at 0.175 [micro]m ground rules and beyond by using a [C.sub.4.][F.sub.8]-C[H.sub.2][F.sub.2] chemistry. With the improved etch selectivity, gate cap nitride thickness can be reduced, resulting in a smaller aspect ratio for the gate etch, borophosphosilicate glass fill, and contact etch. With a rectangular contact, the area can be increased and the process windows for lithography and etch are improved. The process window for lithography increases by up to 40%, the aspect ratio for the etch and the contact fill is less, and the sensitivity to misalignment is reduced. The combination of rectangular contacts and [C.sub.4][F.sub.8]-C[H.sub.2][F.sub.2] chemistry greatly enhances the product yield. Index Terms--0.15-[micro]m technology, borderless contact, contact shape, DRAM, etch stop, reactive ion etching (RIE), selective etching, self-aligned contact (SAC).

We present a new fabrication sequence for integrated-silicon microstructures designed and manufactured in a conventional complentary metal-oxide-semiconductor (CMOS) process. The sequence employs a post-CMOS deep silicon backside etch, which allows fabrication of high aspect ratio (25:1) and fiat (greater than 10 mm radius of curvature) MEMS devices with integrated circuitry. A comb-drive resonator, a cantilever beam array and a z-axis accelerometer were fabricated using this process sequence. Electrical isolation of single-crystal silicon was realized by using the undercut of the reactive ion etch (RIE) process. Measured out-of-plane curling across a 120-[micro]m-wide 25-[micro]m-thick silicon released plate was 0.15 [micro]m, which is about ten times smaller than curl of the identical design as a thin-film CMOS microstructure. The z-axis DRIE accelerometer structure is 0.4 mm by 0.5 mm in size and has a 25-[micro]m-thick single-crystal silicon proof mass. The measured noise floor is 1 mG/[square root of Hz], limited by electronic noise. A vertical electrostatic spring 'hardening' effect was theoretically predicted and experimentally verified. [687] Index Terms--Complentary metal--oxide-semiconductor (CMOS) MEMS, deep reactive ion etch (DRIE), electrostatic spring, inertial sensors.

An in situ, real-time process control tool was developed for MEMS deep reactive-ion etch (DRIE) fabrication. DRIE processes are used to manufacture high-aspect-ratio silicon structures up to several hundred microns thick, which would be difficult or impossible to produce by other methods. DRIE MEMS technologies promise to deliver new devices with increased performance and functionality at lower cost. A major difficulty with DRIE is the control of etch depth. Our research shows that it is possible to monitor the etch depth of various MEMS structures (holes, pillars, trenches, etc.) through measurement and analysis of the infrared reflectance spectrum. Depths as large as 150 [micro]m have been measured. Excellent correlation is found between the etch depths determined by analysis of these measurements and those measured with an SEM. In addition to etch depth, other parameters such as the photoresist thickness (e.g., mask erosion) can be simultaneously extracted. Based on these results, an infrared-reflectance etch monitor was integrated onto a reactive ion etcher at the Berkeley Sensor and Actuator Center for real-time monitoring and end-point determination. The integrated optical metrology system demonstrated accurate real-time monitoring of the etch depth and photoresist mask erosion. [527] Index Terms--High-aspect-ratio MEMS, HexSil, infrared spectroscopy, in situ etch metrology, silicon DRIE.

An x-ray multilayer monochromator with improved resolution and a low specular background is presented. The monochromator consists of a lamellar multilayer amplitude grating with appropriate parameters used at the zeroth diffraction order. The device is fabricated by means of combining deposition of thin films on a nanometer scale, LTV lithography, and reactive ion etching. The performance of this new monochromator at photon energies near 1500 eV is shown. OCIS codes: 340.0340, 300.6560.

Research describing crack formation on GaN device layers grown on sapphire substrates is presented. A model of the nonuniformity of stress distribution induced by mesa structures is investigated.

Atomic force microscopy was used to examine etching of GaAs (001) during remote H2 plasma etching.

A follow-up study to previous work applies a two-step construction method for analytical orientation-dependent crystal growth and etch rate, using wet chemical etching of silicon in potassium hydroxide as an example application.

Results are presented of an attempt to develop a wet cleaning method aimed at minimizing plasma damage in ferroelectric thin films.

Actinometry has been used as the basis of a successful sensor for controlling fluorine concentration in fluorocarbon plasmas commonly employed in etching. An analogous sensor would be useful for chlorine plasmas as well. One problem with actinometry in [Cl.sub.2] plasmas is that excitation can occur by electron impact dissociation and by dissociative attachment, leading to potential ambiguity between the intensity of observed chlorine emission in a plasma and the actual concentration of chlorine. On the basis of a simple model, this paper analyzes the consequences of the dissociative excitation pathway on the accuracy of the estimation and control of chlorine concentration via actinometry. When the contribution of the dissociative excitation pathway is known, it is shown that asymptotic observer theory can be used to improve the accuracy of the estimation of chlorine concentration.

The characterization of silicon 111 (Si(111)) surface treated with 40% NH4F solution was done using x-ray photoelectron spectroscopy and static secondary ion mass spectrometry. As-treated Si(111) surface was predominately terminated with monohydrides and free of contamination. Two distinct mechanisms were observed. First, dihydride terminated step silicon atoms were dissolved much faster than defect-free monohydride terminated ones. Second, dihydrides in the corner of (110) zigzag enclosed characteristic triangular pits led to fast erosion of silicon atoms.

Research was conducted to examine the effects of carbon tetrachloride concentration and temperature on the morphology of carbon-doped gallium arsenide films grown by metalorganic vapor-phase epitaxy (MOVPE). The GaAs films were characterized by means of scanning tunneling microscopy immediately following MOVPE. Results demonstrate an abrupt transition to etching with increasing carbon tetrachloride concentration which is manifested by the appearance of pits in the film surface.

A study was conducted to analyze the profile and dimension control mechanism in polysilicon gate etching. A two-dimensional etching topography simulator was utilized to carry out the analysis. The reaction times were computed using interactions between incoming ion/radical fluxes. Plasma internal parameters were then modeled as input data of the simulator. In addition, a qualitative guideline was proposed to realize anisotropic etched-profile formation and the dimension difference minimization.

Diffractive optics fabrication is performed by two complementary processing methods that rely on the photoablation of materials by ultrashort UV laser pulses. The spatially selective ablation of materials permits the direct microetching of high-quality surface-relief patterns. In addition, the direct, spatially selective transfer of the ablated material onto planar and nonplanar receiving substrates provides a complementary microprinting operation. The radiation from the ultrashort pulsed excimer laser results in superior quality at relatively low-energy density levels, owing to the short absorption length and minimal thermal-diffusion effects. Computer-generated holographic structures are produced by both modes of operation. Submicrometer features, including Bragg-type structures, are microprinted onto planar and high-curvature optical-fiber surfaces, demonstrating the unique ability of the schemes for complex microstructure and potentially nanostructure development.

Micromachining was performed in polymethylmethacrylate (PMMA) using X-ray lithography for the fabrication of miniaturized devices (microchips) for potential applications in chemical and genetic analyses. The devices were fabricated using two different techniques: transfer mask technology and a Kapton[R] mask. For both processes, the channel topography was transferred (1:1) to the appropriate substrate via the use of an optical mask. In the case of the transfer mask technique, the PMMA substrate was coated with a positive photoresist and a thin Au/Cr plating base. Following UV exposure, the resist was developed and a thick overlayer ([approximately]3 [[micro]meter]) of Au electroplated onto the PMMA substrate only where the resist was removed, which acted as an absorber of the X-rays. In the other technique, a Kapton[R] film was used as the X-ray mask. In this case, the Kapton[R] film was UV exposed using the optical mask to define the channel topography and following development of the resist, a thick Au overlayer (8 [[micro]meter]) was electrodeposited onto the Kapton[R] sheet. The PMMA wafer during X-ray exposure was situated directly underneath the Kapton[R] mask. In both cases, the PMMA wafer was exposed to soft X-rays and developed to remove the exposed PMMA. The resulting channels were found to be 20 [[micro]meter] in width (determined by optical mask) with channel depths of [approximately]50 [[micro]meter] (determined by x-ray exposure time). In order to demonstrate the utility of this micromachining process, several components were fabricated in PMMA including capillary/chip connectors, injectors for fixed-volume sample introduction, separation channels for electrophoresis and integrated fiber optic fluorescence detectors. These components could be integrated into a single device to assemble a system appropriate for the rapid analysis of various targets.

A control system framework is developed to determine optimal etch time and end point detection for a reactive ion etch process using neural network models and goal programming. The developed controller was then tested in actual production data from 89 randomly selected wafers. The results show a 50% improvement over the currently implemented scheme in production. Further analysis of the results show that large variances in optimal etch time for different wafers may be attributed to the varying thicknesses of the film.

A study was conducted to analyze the ageing of aluminum electrical contacts to porous silicon. Electrochemical etching was utilized to form the porous silicon layers under different conditions. The backsides of the wafers were coated with an aluminum layer and were annealed at 400 degrees C. Experimental results indicated that the chemical etching of the surface of the porous silicon correlated with the low diminution of the current.

The lattice damage in reactive ion etched (RIE) silicon is studied using x-ray crystal truncation rod (CTR) scattering. Results show that x-ray CTR scattering can accurately analyze lattice damage. CTR intensity around the 004 Bragg point in the reciprocal space has an asymmetrical distribution due to the lattice distortion caused by RIE. The lattice distortion also ranged from the surface to a depth of about 9-nm.

This paper describes a procedure that allows the rapid generation of elastomeric masters for microcontact printing ([micro]CP) and for a new variant of this technique: controlled sagging microcontact printing (CS[micro]CP). Using a low-power laser (10 mW) operating at 532 nm, the desired pattern is ablated in a thin poly(methyl methacrylate) film doped with a dye (rhodamine B base). Subsequent pattern transfer into poly(dimethylsiloxane) (PDMS) produces an elastomeric stamp for either [micro]CP or CS[micro]CP. Printing on the surface of gold gives patterns (wires or trenches) with feature sizes as small as 5 [[micro]meter] ([micro]CP) and trenches (but not wires) as small as 1 [[micro]meter] (CS[micro]CP). The ability of this technique to generate functional systems was demonstrated with an array of gold minielectrodes printed on a silicon wafer and an array of chemical microreactors molded in PDMS. The performance of the electrode array was characterized using cyclic voltammetry with Ru(III)[(N[H.sub.3]).sub.6][Cl.sub.3], as the substrate. Microreactors were used as vessels to grow crystals of KN[O.sub.3] with a narrow dispersion in sizes and with largest dimensions of [approximately]15 [[micro]meter].

Aluminum (Al) and its alloy films are widely used for fabricating VLSI interconnections. Discharge behaviors of a magnetically enhanced reactive ion etching (MERLE) of Al(Si) has been modeled using neural networks. A [2.sup.6-1] fractional factorial experiment was employed to characterize etch variations with RF power, pressure, magnetic field and gas mixtures of [Cl.sub.2], B[Cl.sub.3], and [N.sub.2]. Responses of Al(Si) film etched in a chlorine-based plasma include etch rate, selectivity to oxide, anisotropy and bias of critical dimension (CD). The generalization accuracy of the models, measured by the root-mean squared error (RMS) on a test set, are 285 [Angstrom]/min for etch rate, 5.58 for oxide selectivity, 0.08 for anisotropy, and 3.82 [Angstrom]/min for CD bias. Al(Si) etch rate was found to be chlorine-dependent with significantly affected by magnetic field variations. For the other etch responses, RF power was dominant. Gas additives such as B[Cl.sub.3] and [N.sub.2] were seen to have conflicting effects on etch outputs. Predicted Al(Si) etch behaviors from neural process models were in qualitative good agreement with reported experimental results.

Research was conducted to examine the selective wet etching of GaAs on AlxGa1-xAs for AlGaAs/InGaAs/AlGaAs pseudomorphic high electron mobility transistor (PHEMT). Methods used were current-voltage, etched step measurement, atomic force microscopy and x-ray photoelectron spectroscopy. Results show that the PHEMT exhibits excellent and reliable performance, proving the applicability of the solution to gate recess process.

Free-carrier concentration changes in n-GaAs after it was processed in He plasma were studied using capacitance-voltage measurements. In addition, the electrical characteristics of the plasma-induced defects were examined. Results showed that a strong carrier reduction of up to 1 micron meter below the GaAs surface occurred following the He-plasma processing. He-plasma processing was also observed to control the fabrication of high barrier Schottky diodes on n-GaAs.

The general concept of etching has undergone minimal modifications over the years. Despite the introduction of semiconductor-based devises, the primary means by which the process is carried out remains virtually the same- and that is exposing the surface of a hardened wax, without piercing it through.

Holographic photolithography and wet chemical etching on a negligibly misaligned GaAs(001) substrate were implemented in preparing a lateral surface grating. Scanning electron microscopy and triple-axis high resolution x-ray diffraction were then used to examine structural properties prior to and after thermal annealing. Both compositional modulation and lateral strain modulation were found within the GaAlAs overlayer.

A study was conducted to determine the influence of plasma treatment on the density of defects found between the insulating layers and the amorphous Si:H. Interface state density was quantified using photothermal deflection spectroscopy and electron spin resonance. The results revealed that the interface state density in SiO(sub 2.0)/Si:H was greater than that of SiN(sub 1.7):H/a-Si:H. The findings were attributed to the plasma surface reaction during the initial phase of deposition.

Chemical etching, chemical dissolution of atoms from solid surfaces, is important in making microelectronic devices. A range of solutions and mechanisms is used in wet chemical methods for etching GaAs for integrated circuit technology. There are many influencing factors and it is difficult in many cases to predict and reproduce etch rates and profiles, or shapes of the etched surface. The characteristics of group III-V elements are an important factor.

Research was conducted to examine the silicon etching that takes place during the chemical vapor deposition (CVD) diamond growth as a function of the methane content in the gas phase using scanning electron microscopy and atomic force microscopy. AFM experiments were performed in the tapping mode on a Nanoscope III microscope. Diamond was grown by the hot filament chemical vapor deposition method. Results indicate that the etching of silicon is generally detrimental as generating low-density silicon surface such as Si(100).

The low-frequency noise characteristics of selectively dry etched InP high electron mobility transistors (HEMT) are examined at different gate and drain biases for the temperature range of 77-340 K. Results show that normalized drain current 1/f noise has been significantly reduced in dry etched HEMT's under all bias conditions. Furthermore, normalized gate current 1/f noise is observed to be similar for both dry and wet transistors.

An argon laser whose power density was increased up to two orders of magnitude was utilized in etching a silicon which was immersed in hydrofluoric acid. The photoluminescence spectra of several etching conditions were analyzed and their surface topography was examined by a scanning electron microscope. Results showed that spectrum had changed with regard to etching time. It was shown that a photoluminescence spectrum within a 30-min etching time exhibited distinct characteristic of two peaks.

An investigation of HCl gas etching of GaAs revealed information about the quality of the interfaces prepared by overgrowth of AlGaAs on molecular beam epitaxy-grown clean GaAs surfaces. The interfaces are relatively clean and free from damage, enabling the formation of two-dimensional electron gas (2DEG) with high mobility. The results indicate that HCl gas etching is a appropriate technique for use in semiconductor device fabrication with one drawback, that high etching temperatures often cause roughness at the interface which leads to a decrease in the mobility of 2DEG.

Research was conducted to examine the surface etching of a Novolak-type polymer on Si wafers employing dielectric barrier discharges in oxygen at high pressures and room temperature. The oxygen demand for mineralization of the film was compared with the particle flux of atomic oxygen to the sample surface. Results indicate that no defects were observed at large gap spacings of 20 mm at the pressure range of 50-700 mbar while at the 7-mm-gap spacing, the polymer surface exhibited some defects, the extent of which increased as pressure increased.

A study was conducted to characterize doping-dependent etching of n+/p junctions in silicon using transmission electron microscopy image contrast. A modification of the etchant solution was necessary to reduce the etch rate and maintain high selectivity to the n+ doped region. Calibration against one-dimensional secondary ion mass spectroscopy data was also conducted to quantify the two-dimensional dopant profiles.

A study was conducted on the consequences of asymmetric gas pumping on reactive fluxes in inductively coupled plasma reactors operating in Cl2. The results indicate that the azimuthal symmetry of ion density and ion fluxes are minimally affected by side pumping under typical conditions due to the dominance of ambipolar electric fields. Moreover, the magnitude of the side-to-side variations is largely dependent on the relative rates of loss of reactant species to surfaces compared to pumping.

A major limitation in the fabrication of microstructures as a postCMOS (complimentary metal oxide semiconductor) process has been overcome by the development of a hybrid processing technique, which combines both an isotropic and anisotropic etch step. Using this hybrid technique, microelectromechanical structures with sizes ranging from 0.05 to [approximately]1 mm in width and up to 6 mm in length were fabricated in CMOS technology. The mechanical robustness of the microstructures determines the limit on their dimensions. Examples of an application of this hybrid technique to produce microwave coplanar transmission lines are presented. The performance of the micromachined microwave coplanar waveguides meets the design specifications of low loss, high phase velocity, and 50[Ohms] characteristic impedance. Various commonly used etchants were investigated for topside maskless postmicromachining of silicon wafers to obtain the microstructures. The isotropic etchant used is gas-phase xenon difluoride (Xe[F.sub.2]), while the wet anisotropic etchants are either ethylenediamine-pyrocatechol (EDP) or tetramethylammonium hydroxide (TMAH). The advantages and disadvantages of these etchants with respect to selectivity, reproducibility, handling, and process compatibility are also described. Index Terms - CMOS microwave elements, isotropic and anisotropic silicon etching, maskless etching, microelectromechanical systems (MEMS), micromachining, suspended transmission lines.

The etching reaction of Si(100) is examined using Cl2 molecular beams with a hyperthermal translational energy up to 3.0 eV. The reaction rate is enhanced by translational energy and the threshold energy is 2.1 eV. The translational-energy-induced reaction rates are measured as a function of substrate temperature. Results indicate that the translational energy contributes to the formation of a new chlorinated Si surface from which silicon chloride desorbs thermally with lower activation energy than from a chlorinated Si surface formed by a pure-thermal reaction.

Detailed analytic expressions are discussed which incorporate channeling and diffusion which are the mechanisms that cause defects deep within dry-etched material. Results suggest that the dominant parameter affecting damage depth is the mean channeling length while enhanced diffusion through illumination increases the observed damage. The effect of damage on depletion depths was also examined and suggestions were given on how the channeling length may be inferred from the etch-depth dependence of conductance or Raman spectroscopy measurements.

A high-resolution monolithic nozzle array was developed for inkjet printing. A bulk anisotropic etching technology was used to fabricate the nozzles in order to undercut a network of highly-boron-doped silicon support ribs. The fabrication was found compatible with the addition of on-chip circuitry for multiplexing the heater control signals. The high thermal conductivity of the silicon ribs in the channel ceiling enhanced the heat transfer efficiency to the ink.

Semiconductor etching and deposition simulation techniques demonstrated that the level set boundary movement method can be robust, stable and accurate. The method was found computationally expensive but, it allows larger time steps than the L-type methods with comparable accuracy. It was also observed practical in view of efficiency and competitive in large-scale computations such as, complex geometry and 3-D.

Focused ion beam assisted chemical etching was employed in the in situ direct-write patterning of substrates for producing arbitrary-shaped mesas independent of crystallographic orientation. Results from the atomic force microscopy characterization of the mesas were consistent with predicted profiles. High quality growth and the lack of extended defects were verified through cross-section transmission electron microscopy.

A new surface reaction model for a dry-etching topography simulator is suggested. Two types of radical adsorptions are introduced: a nondepositive type radical adsorption which is important in ion-assisted etching, and a depositive type radical adsorption which results in polymer deposition as an etching inhibitor. Direct and indirect radical transports inside the enclosure of a geometry are self-consistently considered based on the present radical adsorption model.

A flat, precision aligned charge-coupled device mosaic for many applications in astronomy was fabricated by semiconductor lithography and processing techniques. The fabrication process was simple and economical which used common lithography laboratory equipment. It was found that the inherent precision of the semiconductor lithography technology reduced many constrains of alignment such as expenses encountered during mosaic detector construction.

The characteristics of S[F.sub.6]/He plasmas used to etch TiW have been studied with statistically designed experiments using a Tegal 804 single wafer system. Two processes were developed using both positive and negative photoresist as the mask material for etching TiW. The goal was to consolidate both processes into one. A two-phase experimental approach was taken to generate the processes. In phase I a fractional factorial screening experiment was used to identify key factors, and in phase 2 a mixture experiment was used for process optimization. The fractional factorial experiment was initially used to study the effects of reactor pressure, RF power, S[F.sub.6]/He gas ratio, overetch time, and hard bake. The results of this initial experiment were used to identify the appropriate levels for the main process parameters. Then, at these parameter levels, a mixture experiment was conducted using the partial pressures of S[F.sub.6], He, and the nitrogen ballast as the design variables. Since the total pressure in the system is fixed, these three variables are the components of a mixture, and thus form a constrained design space for the experiment. Quadratic and special cubic response surface models were generated for the following responses: TiW etch rate, photoresist etch rate, selectivity between the TiW and photoresist, uniformity of all etch rates and selectivities, and critical dimension control for the photoresist and TiW. Contour plots for all responses as a function of the partial pressure of S[F.sub.6], He, and nitrogen ballast were generated. The contours from these empirical models were analyzed jointly to optimize the processes.