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Lowering the processing temperature is a crucial factor in the development of flexible electronic devices. Here we report the fabrication of high-performance OFETs based on room temperature deposited Ba0.5Sr0.5TiO3 (BST) as a high-k dielectric layer. The fabricated devices exhibited excellent performance while operating at a low voltage of -3 V along with demonstrating high operational stability when tested for 1 h bias stress and continuous transfer measurement cycles. In addition, inverter circuit performance is also investigated with these devices by connecting them to external loads.

The summer phytoplankton bloom events have been recently investigated using remote sensing observations over several geographical areas of the Red Sea and changed our impression of its oligotrophic characteristic. However, only limited blooms events were recorded due to active dust storms limiting the observations. This work focuses on predicting the potential bloom events in the central region of the Red Sea, indicated by the chlorophyll- $a$ values, through the machine learning models built from the simulated and observed oceanographical parameters. Four subregions showing active eddy activities are selected to generate modeling datasets in the Case-1 waters (water depth > 300 meters) for each region. Automated model selection and tuning are performed among different candidate supervised models including linear regression, trees models, ensemble models and deep neural networks (101 in total). The ensemble models (random decision forest and bootstrap decision forest) outperform others in showing effective performance in estimating chlorophyll-a values with ( $\mathrm{R}^{2} > 0.82$ ) of the training and ( $\mathrm{R}^{2} > 0.73$ ) of the testing processes, respectively. This work shows the potential applications to use a machine learning model to reconstruct missing ocean color observations, as well as revealing the oceanographical mechanism to induce phytoplankton growth in the Red Sea.

Performance of symmetric lateral doping-free bipolar junction transistor (BJT) on silicon on insulator (SOI) in universal gates and ring oscillator were investigated. Charge carriers in SOI at emitter and collector regions are induced with two unique approaches, i.e., the charge plasma (CP) and polarity control (PC). Four types of devices (CP-NPN, CP-PNP, PC-NPN, and PC-PNP) was used for bipolar CMOS type NAND and NOR gates. Excellent transient response with rise and fall time less than 5 ns and propagation delay less than 2.4 ns were obtained.

Flexible devices have been in focus for their applications in wearable electronics, displays, sensors, and memory. $\mathrm{PVP}/\mathrm{HfO}_{\mathrm{x}}$ based hybrid resistive random access memory devices were demonstrated on flexible PET substrates to study their resistive switching characteristics and memory application. These RRAM devices exhibited decent repeatability of more than 100 cycles with excellent $I_{\mathrm{o}\mathrm{n}}/I_{\mathrm{off}}$ of ~106 at 0.2 V as read voltage. With retention time of more than 6000 s and reliable switching operation, the fabricated devices have potential to be embedded in flexible electronic applications. Moreover, conduction mechanism in devices was found to be ohmic at lower voltage levels in high resistance state (HRS) and space charge limited conduction at higher voltage levels, occurring mainly due to traps sites available in PVP and $\mathrm{HfO}_{\mathrm{x}}$ . The AFM image confirms the presence of pinholes at PVP surface which will eventually assist in filament formation.

BiFe 0.99 Cr 0.01 O 3 thin film is deposited on FTO glass using sol-gel technique. The deposited film is used in Ag/ BiFe 0.99 Cr 0.01 O 3 /FTO configuration to understand its potential as RRAM device. The device showed forming free bipolar RRAM characteristics with Ion/Ioff~80. The device showed non-volatile behaviour by maintaining its LRS and HRS states for 104 s. The device exhibits excellent reproducibility up to 100 cycles and reliability of V set and V reset voltage is observed. The endurance characteristics for 200 cycles ensures the stability of the device, further, conduction mechanism is attributed to filament formation and switching mechanism is assigned to migration of silver ion inside the film.

In this work, we have explored the effect of TIPSpentacene: polystyrene (PS) blend on electrical performance and photo-response of solution processed organic field-effect transistors (OFETs). It was observed that though the blend OFETs show better electrical performance, the photo-responsivity (R) of neat TIPS-pentacene OFETs was significantly better. This study was performed for different color lights such as blue, red, and green, as well as for ultraviolet light (UV). R was highest for blue color (~2600 mA/W for neat, ~230 mA/W for blend), and smaller for other cases. Low R value in blend devices is attributed to less trapping of photo-generated charge carriers during photo-illumination compared to their neat counterparts.

We report the UV curing of poly(4-vinylphenol) (PVP), which is a widely used polymer dielectric for flexible organic field-effect transistors. OFETs with UV cured PVP dielectric outperformed the classical long-term high temperature annealed PVP OFETs in electrical performance with lower hysteresis, lower threshold voltage shifts in 100 continuous transfer scans and lower normalized drain current decay when bias stressed for 1 h.

We report on the fabrication of bottom gate top contact organic field effect transistors with hybrid gate dielectric and TIPS-Pentacene:PS blend as active layer on PowerCoat™ HD 230 paper substrate. The hybrid dielectric layer leads the devices operated at relatively low voltage of −10 V with avg. and maximum field effect mobility of $0.52(\pm 0.16)$ and 0.78 cm2 V−1 S−1 respectively, with near zero threshold voltage and on-off current ratio approaching ~104. The devices have shown excellent operational stability when tested with DC bias stress of $\mathrm{V}_{\mathrm{DS}}=\mathrm{V}_{\mathrm{GS}}=-10\ \mathrm{V}$ for 1 h and minuscule changes in electrical characteristics were observed with continuous multiple transfer cycle scans. In addition, we have demonstrated a resistive load inverter circuit with varying the load resistance with these paper OFETs.

Effect of UV irradiation $( \lambda _{Peak} \quad =365$ nm) on the electrical performance of the OFETs with CuPc as active layer is demonstrated. The devices have shown stable electrical performance under dark with avg. and max. field effect mobility of $( 1.0 \pm 0.3 ) \times 10 ^{-2}$ and $1.4 \times 10 ^{-2}$ cm $^{2}\, \mathrm {V}^{-1}\, \mathrm {s}^{-1}$ respectively. Under UV illumination there found a shift in threshold voltage and change in ON current along with fast response and recovery time of 0.4 s and 2 s respectively with periodic UV ON-OFF pulses.

A PMMA based Ag/PMMA/Ti/Glass RRAM devices are reported for their resistive switching behavior. Switching performance was tested on three samples fabricated at different PMMA annealing temperatures. The switching voltages have shown a down trend with increasing annealing temperature. The Current on/off ratio and retention time also degrades with annealing temperature. The devices exhibited significantly low switching voltages (

We report the effect of varying the semiconductor:polymer blend ratio on the electrical performance and bias-stress stability of the organic field effect transistors (OFETs) with TIPS-Pentacene and polystyrene as semiconductor and polymer combination. Device performance was found to improve with increasing polymer content in the solution. Devices with 1:3 TIPS-Pentacene:polystyrene blend outperformed the other counterparts with high performance, and demonstrated least performance variation with regular 100 transfer measurement cycles. In addition, 1:3 blend devices have shown the least normalized drain current decay of $\sim$ 8.5 % with the bias stress condition of V DS = V GS = -30 V for 2 h, as compared to the 1:1, 3:1 and neat devices with the decay of 15 %, 37 % and 71 % respectively. Additionally, a better recovery of electrical characteristics was observed in blend devices with larger polymer fractions from the deteriorating effects of gate bias stress.

In this paper, an attempt is being made to solve the problem of “Back-Ache Problem, Spinal Cord Bends, Muscle Strain etc” arising because of carrying heavy luggage on back. For this using motion sensors, IR sensors, GSM module a luggage which could move automatically just by sensing the owner‘s legs movement, alerting him/her in case of obstacles encountered, sending the exact location in case of luggage is lost (buzzer sound and notification on application developed for luggage). It targets all sections of society from school going students to old age persons, serving and providing the convenience to all.

In this paper, we discuss the relationship between the direct lattice-based F-transform and L-fuzzy pretopology. The importance of fuzzy pretopological spaces follows from the fact that they are dense extensions of fuzzy topological spaces, and the corresponding category contains both Top and the category P-Neigh of probabilistic neighbourhood spaces. We show that every direct F↓-transform uniquely determines an L-fuzzy pretopology and discuss the opposite correspondence. In between, some categorical results have been established. Further, some new F-transform theoretic results are studied.

In this work, a TCAD based approach is presented to model electrical behavior of TIPS-Pentacene: polymer blend organic field-effect transistors (OFETs). Stress induced and temperature induced effects are also captured, thereby accurately modeling the device behavior under different operating conditions. The framework is validated against experimental results and is then used to estimate the effect of temperature on characteristics of inverter circuit using this device.

Effect of thermal annealing on the performance of flexible OFETs was investigated. Annealing at low temperatures up to 50 °C enhanced the molecular ordering and granular arrangement leading to improved device performance, however, a permanent degradation was induced at high temperature annealing due to loss in crystallinity and crack generation. An annealed device exhibited a larger decay in drain current than a pristine device under constant bias stress. Under combined effects of mechanical and thermal stress, effect of thermal stress was found to be dominant at higher annealing temperatures, resulting in monotonic performance degradation.

For the very first time, influence of traps on avalanche breakdown of AlGaN/GaN HEMTs is discussed. Impact of surface and bulk traps on breakdown voltage and device scaling is discussed with associated physics. Surface trap's were found to cause distinct breakdown characteristics with breakdown point varying from gate edge to drain edge, depending on nature, type and concentration. Buffer traps too influence the electric field near gate edge and leakage through the device, thereby affecting breakdown voltage accordingly.

Design of a stable Phase Locked Loop (PLL) working in MHz frequency range is proposed. Focus of this work is to achieve a symmetric design, where rise and fall time are equal for low operating frequencies. All the blocks of PLL i.e Phase Frequency Detector (PFD), Charge Pump and Loop Filter (CPLF), Voltage Controlled Oscillator (VCO) and Frequency Divider (FD) are carefully designed and integrated. PFD is implemented using D flip-flop and is made to detect minimal phase errors. CPLF has differential design for noise immunity and for avoiding floating conditions. The 15 stage VCO gives frequency range of 30 MHz to 200 MHz for input voltage range of 0.5 V to 1.05 V with a resistor for optimizing linearity. The integrated PLL is stable in the output frequency range of 44 MHz to 200 MHz for given input frequency range of 11 MHz to 50 MHz. The designs are implemented in 180 nm technology and for a supply voltage of 1.8 V.

The goal of the present work is to propose residuated lattice based fuzzy variable precision F-transform. We show that the several existing F-transform concepts are the particular cases of the F-transform proposed. Moreover, we investigate the approximation properties of F-transforms.

Flexible resistive switching memory device is an excellent option for future high density memory and flexible electronics applications. Here, bipolar resistive switching behavior in Al/HfO x /Au resistive random access memory (RRAM) devices fabricated on ultra-flexible polyimide substrates is demonstrated. These devices can be programmed at read-write voltages as low as 0.18 V with on-off current ratios (I on /I off ) of 18, resistance ratio of ∼41 in high and low resistance states (HRS & LRS) and stable set and reset voltages over 16 cycles of operation. The mechanism of resistive switching in these devices is explained with help of filament formation and rupture process due to oxygen vacancy and oxygen ions migration. Ohmic conduction prevails in HRS and LRS whereas conduction mechanism is dominated by space charge limited conduction (SCLC). These flexible RRAM devices could be an excellent option for future high density memory applications.

Inverter circuits based on neat TIPS-pentacene and TIPS-pentacene: polystyrene blend organic field-effect transistors (OFETs) with external resistive load has been studied. Resistive loads of 28 ΜΩ, 40 ΜΩ, 68 ΜΩ and 108 ΜΩ were used to study the inverter transfer characteristics. Transfer characteristics of both types of inverters are improved with increasing load resistance. Inverter with a representative OFET with neat TIPS-pentacene shows a DC voltage gain of −6.9, swing of 40 V, and static power dissipation of 9.5 μW with load of 108 ΜΩ and 50 V power supply. Similarly, inverter with a representative TIPS-pentacene: polymer blend OFET shows a DC voltage gain of −8.7, swing of 44 V, and static power dissipation of 10.2 μW with the same load. For both neat TIPS-pentacene and TIPS-pentacene: polymer blend inverters, maximum DC gain and voltage swing are achieved with highest value of resistive load. However, switching thresholds near V DD /2 are obtained with moderate resistive loads.

Organic field effect transistors (OFETs) have been widely explored for their popular applications in flat panel displays and various kinds of affordable sensors. The overall performance of the device depends on the quality of semiconductor-dielectric interface, and degree of crystalline order in the active layer, close to the above said interface. In the special league of solution processed OFETs, semicondutor: polymer blends have been reported as one of the best possible ways to achieve an intimate, uniform and defect free semiconductor-dielectric interface in a single step. In addition, degree of crystalline order can be further ameliorated through solvent vapor annealing (SVA), which essentially controls the evaporation time of the solvent.

A different strategy to form dielectric thin films using atomic layer deposition is proposed, where the dielectric stack consists of three layers in which the middle layer is deposited at a higher temperature than the top and bottom layer. This multi-temperature dielectric stack in metal-insulator-metal capacitor offers improved electrical properties compared to a dielectric film deposited at a single temperature. A multilayer 40 nm thick Al2O3 deposited with temperature and thickness sequence of 80 °C - 10 nm, 150 °C - 20 nm, and 80 °C - 10 nm offers reduced leakage current density by more than one order of magnitude compared to that for a 40 nm Al2O3 deposited at 150°C, and offers higher capacitance density compared to that for 40 nm Al2O3 deposited at 80 °C, and low values of voltage coefficients of capacitance. The changes in the capacitance density and leakage current are found to be strongly dependent on the various roughness values in the devices.

A comprehensive study for crystal alignment of TIPS-Pentacene by an off-center spin coating has been presented. In a normal center spin coating method, the centrifugal force on the grains is multidirectional which results into crystals aligning in multiple directions depending on the location on the sample. However in an off-center spin coating method where the samples are kept at a distance away from the center, a unidirectional centrifugal force in the direction of the sample causes all the grains to align nearly in the direction of this force. The spin speed was the paramount factor influencing the overall grain size, whereas the overall alignment depends on the off-center distance. All the films in these experiments were found to have very large crystal sizes, ranging up to 5 microns. In addition, films formed by off-center method were found to be more crystalline than the center spin coated film and show a metastable crystalline polymorph.

In an attempt to improve ON current and current ON/OFF ratio in tunnel field-effect Transistors (TFETs), a new wedge shaped structure for TFET named Wedge-TFET (WTFET) is proposed. This proposed device is a double gate structure, showing ∼3 times higher ON current compared to planar double gate TFET device working at supply voltage of 0.6 to 1.0 V. This increase is mainly due to increase in the tunneling area. In addition to increased current, W-TFET also shows high current ON/OFF ratio of the order ∼1012. The subthreshold swing values are slightly higher for W-TFET compared to our simulated DG-TFET, however, both of them fall in the range of 40 to 50 mV/dec. The W-TFET device with higher ON current and current ON/OFF ratio and with almost same area requirement can be a potential candidate for future low voltage applications.

In this work, the annealing effects of e-beam deposited Ta 2 O 5 films on the pH sensitivities of EIS based sensors are presented. XPS studies confirmed that the films annealed above 700 °C showed the best stoichiometry (Ta 1.96 O 5.04 ) compared to the as deposited film and the films annealed till 600 °C. XRD spectra confirmed the amorphous nature of the as deposited film, which remained amorphous till 600 °C and became polycrystalline above 700 °C. The EIS device showed the maximum sensitivity of 51.4mV/pH for the film annealed at 700 °C, while the device with the as deposited film had a sensitivity of 44.3mV/pH. Further increase in annealing temperature above 700 °C resulted in reduced sensitivity (31.0mV/pH) because of increased interface states (indicated by C-V hysteresis in a MOS device) and enhanced cracks formation in the films (indicated by FESEM). Therefore, the annealing temperature of 700 °C was found to be the optimum annealing temperature for the e-beam deposited Ta 2 O 5 films.

In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (−3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at −3.0 V.

Organic thin-film transistors (TFTs) have potential as pixel drivers in flexible active-matrix organic light-emitting diode displays [1]. Hence it is essential to analyze the charge-carrier injection and extraction dynamics of organic TFTs to gain a better understanding of the trapping and detrapping at the TFT interfaces. From the current-voltage characteristics of the TFTs, many important parameters can be extracted, such as carrier mobility, threshold voltage, on/off ratio, subthreshold slope and transconductance. But to quantitatively evaluate the trapping and detrapping dynamics, displacement current measurements on two-terminal long-channel capacitors (LCCs) are far more useful [2, 3]. The cross-section and the layout of an LCC are schematically shown in Fig. 1. Unlike a TFT, an LCC has only one contact, so that carriers are injected into and extracted from the semiconductor through the same contact. To increase the signal-to-noise ratio, a very large channel length (up to 6 cm) is employed. While Liang et al. have performed displacement current measurements on pentacene-based LCCs [2,3], we report here on displacement current measurements on LCCs based on four different organic semiconductors: pentacene, dinaptho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT), 2,9-didecyl-DNTT (C 10 -DNTT) and diphenyl-DNTT (DPh-DNTT). In TFTs, these semiconductors show hole mobilities ranging from 1 to 7 cm 2 /Vs. The goal of the displacement current measurements reported here is to study how the choice of the semiconductor affects the trapping and detrapping dynamics in organic TFTs.

The aim of this paper is to introduce several kinds of products of Mealy-type rough finite state machines (a rough finite-state machine with output). We establish the relationship among such products through coverings and investigate some algebraic properties of these products.

It is shown that the concepts of definite (possible) source and definite (possible) successor give rise to two topologies on the state-set of a rough automaton. Further, we show that the connectivity and separation properties of such rough automaton can be discussed in terms of these topologies.