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The article informs about binary serial transmissions are among the most widely used techniques for sharing information between devices by using wired or unwired transmissions. Topics include parity generating/checking method is one of the most widely used error detection techniques for data transmission; and digital communications, a parity bit is a bit added to a binary stream to ensure that the total number of 1-valued bits.

The article evaluates several oscilloscopes incluidng UXR-Series from Keysight Technologies; SDS2000X-E Series from SIGLENT Technologies; and Tektronix 5/6 Series from Tektronix.

The article discusses the evolution in oscilloscope design to improve electronic design, test and evaluation. Also cited are the partnership between Farnell and Rohde & Schwarz to hold the Oscilloscope Days 2021 webinar on the use of modern digital oscilloscopes for electronic design and test, and the launching by Yokogawa Test & Measurement of the DL950 ScopeCorder for renewable and energy efficient technology design.

The article offers information on the hardware trojans that can be introduced into integrated circuits (IC) and presents a method for its simulation testing. Topics discussed include the AND gate, a digital logic gate, used in the testing; the simulator developed by information technology company Booz Allen Hamilton, under contract from the U.S. Air Force Research Laboratory (AFRL); and the game theory engine on which the simulator is based.

The article presents an overview of the usefulness of jump gates to plastic molders

The article discusses the benefits over the use of logic analyzers to electronics engineers that can help troubleshoot bugs such as digital hardware debug, design verification, and embedded software debug. It compares the similarities and differences between oscilloscopes and logic analyzers. It notes oscilloscopes as the fundamental tool for general-purpose signal viewing while the logic analyzers detects logic threshold levels such as high and low threshold voltage.

The article offers information on suggestions to assemble an active cancellation stealth system. It mentions that minimizing the radar cross section (RCS) is important for achieving stealth of aircrafts. It mentions that digital-radio frequency memory (DRFM), field-programmable-gate-array (FPGA) and phased-array techniques help in achieving the active cancellation stealth system.

The article discusses the combination of logic built-in self-test (LBIST), a technology that inserts embedded logic for a self-contained test, with automatic test pattern generation (ATPG), which uses deterministic patterns, low power support and high stuck-at coverage, in implementing test in chip design. The hybrid test methodology is based on the concept of core isolation, which overlaps internal with external modes. The LBIST/ATPG hybrid reportedly achieves the shortest time in providing high test coverage.

The article reports on the improvement of complementary metal oxide demodulators (CMOS) image sensors through modern analog-to-digital converters (ADC). Image sensors are required to capture frames quickly enough for high-definition video which prompts designers to weigh the benefits of ADC architectures and make trade-offs in speed and size. It is noted that the layers of a CMOS sensor can be taken apart with the use of imaging and software-based circuitry extraction and schematic organization.

The article presents the profile of Liquid Instruments which makes test equipment with Instrument on-Chip technology, delivering a unique combination of performance, versatility, and customization capabilities. Topics include combines processing power of Field Programmable Gate Arrays with software that adapts to hardware configuration, redefining the way users can build test sequences; and seamless integration of hardware and software delivers exceptional versatility across it's applications.

The article discusses the innovative ways to reduce power consumption in a high-performance field-programmable gate array (FPGA). One way to reduce power in high-end FPGAs is the use of Stratix III, a Programmable Power Technology from Altera Corp. Using the Programmable Power Technology, the logic fabric of Stratix III can be programmed at the logic-array-block (LAB) level by providing high-speed logic or low-power logic which in turn reduces about 70% in leakage power for the low-power logic. Another is the combination of selectable core voltage and Programmable Power Technology which is said to offer over 50% power reduction at 1.1 volts.

The article discusses how interface chips must mediate between ever-lower logic voltages and real-world loads. According to the author, interfacing between circuits is hard because it connects signals of different voltage levels or across different impedances. Another difficulty is the brutality of the real world. Numerous interface integrated chips (IC) add a whole new set of challenges. The logic part has its own temperature derating of power dissipation. The need for driving solenoids or other difficult loads has led to the creation of an entire series of interface IC.

The article focuses on the power consumption of the digital system on chip (SOC) used in modern implantable medical devices, such as pacemakers and cardioverter defribillators. Power management techniques to reduce SOC power is offered. Logic circuits can consume power from three sources including dynamic component, short circuit power and static. The dynamic component is the power the device loses when the circuit capacitances charge and discharge. Two methods of effectively minimizing crossover current is presented. Rise and fall times significantly reduces short-circuit current by ensuring that the input rise and fall times are shorter than the output. While the clocks are stopped, the circuit consumes static or leakage power.

The article discusses several innovative design methodologies for high-performance radio frequency (RF) complementary metal oxide semiconductors (CMOS) in 2006. It includes information on passive component modeling and synthesis, on-chip component coupling and tool requirements for high-performance RF design in CMOS.

The article looks at programmable logic resources that deliver extremely capable but less complex parts. The logic circuits are used to absorb a typical small/medium μC-based system. The field programmable gate array landscape changed when foundries began to offer high-volume silicon processes at 0.13 micron. Benefits of programmable logic include system upgradeability, protection from component obsolescence and simplified printed circuit board and hardware design.

The article explains the advantages of a dual threshold voltages and power-gating design flows to very-deep-submicron chips. The dual-voltages approach and power-gating design flows can achieve excellent results for both power and timing with a high degree of automation. It manages both leakage power and performance of electronic circuitry with little effort. The dual voltage methodologies rely on the use of low-voltage cells that have smaller propagation delay and higher leakage power and the use of higher voltage cells that have larger delay and lower leakage.

The article provides information on the serial-communications strategies used by system designers to boost reliability and extend service life in hostile factory or industrial environments. A central controller and peripheral input/output modules are included in most programmable-logic-controller systems. By removing interconnections between devices, designers can bolster the reliability of a system. Some examples of wired communication standards are transistor-to-transistor logic, emitter-coupled logic, low-voltage differential signaling and Ethernet.

Explores the approach of semiconductor manufacturers in designing modern logic analyzers. Likelihood for serial buses to appear as external interfaces to another system or network; Addition of scope-like automated measurements that the user can apply directly to selected waveforms; Introduction of the design that facilitates signal acquisition and display on both logic analyzer and oscilloscope.

This article discusses circuit-protection methods that electronic original equipment manufacturing (OEM) segments can use to protect their products, their company's reputation, and in extreme cases, their customers. The electronics industry's evolution toward small-geometry complementary metal oxide semiconductor (CMOS) as the dominant design medium has bolstered signal-processing and computational performance, energy efficiency, economy, and compactness. At the same time, however, it has reduced the native robustness of integrated circuits in the face of common and unavoidable electrical transient hazards. In broad strokes, transient sources segment into lightning, switching, electromagnetic pulse (EMP), and electrostatic discharge (ESD). Of the four, electromagnetic pulses are thankfully rare, deriving most famously from nuclear events. But, like EMP, virtually all sources of electrical transients derive from a sudden release of stored energy. Lightning and ESD result from the sudden release of static charge; switching transients typically originate from the collapse of an electrostatic or electromagnetic field due to a sudden change in current or voltage in the presence of explicit or parasitic reactances. Sources within a classification tend to exhibit similar time-domain characteristics. Switching transients, for example, tend to be periodic with amplitude and repetition rates that vary by the details of an installation. INSET: SAFETY FIRST.

The article analyzes the architecture of the most commonly used differential signaling interface technologies to illustrate the trade-off between power consumption, throughput and electromagnetic interference emission. Furthermore, the article introduces a new Input/Output approach, the current transfer logic.

Focuses on the role of motherboards in the development of logic cards. Architectures in backplanes; Design constraints of backplanes; Stages of design and manufacturing process.

Discusses the use of an architectural and register-transfer-level (RTL) synthesis tools for the design of logic gates. Physical and logical hierarchy complexities for the design of gates; Differences between architectural and RTL synthesis; Decisive factors that favor a design flow based on architectural synthesis.

Examines the difficulties inherent in sampling high-performance buses with logic analyzers and strategies for addressing the same. Importance of setup and holdup times; Basic concepts explained; Challenges facing high-performance buses.

Reports on the benefits of using embedded memories that allow engineers to integrate memory and logic when designing system-on-a-chip (SoC) integrated circuits. Efforts by design engineers to develop a single process to maximize performance of memory and logic circuits; Ways of mitigating SoC embedded memory demands.

Focuses on the applications of the different embedded-Dynamic Random Access Memory (DRAM) technologies. Ways of combining embedded DRAM and logic circuits; Capabilities and specifications of the different embedded-DRAM technologies; Details on the conventional chip-probe 1 and 2 DRAM test.

Focuses on the significance of embedded computational modules for digital signal processing solutions. Utilization of logic cell array in the implementation of a general-purpose logic; Phase locked loops of QuickDSP devices; Random access memory modules contained in every embedded computational unit.

Discusses the development of cycle-based logic simulation technology. Benefits of cycle-based methodology; Implementation of simultaneous test feature; Deployment of scalar model for parallel simulation.

Reports that logic analyzer vendors are striving to come up with products that are faster, wider and have deeper performance to help designers keep up with circuit demands. Introduction of the TLA 714/720 logic analyzer by Tektronix Inc. and the HP 16600A and 16700A logic-analysis systems by Agilent Technologies. INSETS: Logic-analyzer partnering continues to expand for Tektronix.;Analyze this (bus)..

Presents instructions on setting up logic-analyzer triggers. Requirement of complex programming in implementing the triggers; Matching of Boolean expressions to different sequence levels; Use of occurrence counters; Storage qualification.

Reports on the manufacture of SH100K gate arrays, the first integrated circuits in the silicon-germanium bipolar process or B7HF. Applications of fast-logic integrated circuits; Features; Operating voltage for the gate arrays.

Focuses on the HP 16505A logic design analyzer. Functions for multiple concurrent views of acquired logic data analysis; Features correlating marker views; Detection of a stack anomaly with the immediate correlation of a software routine violation; Acquisition tool designs; Workspace and graph.

Discusses criteria in the determination of the most suitable measurement server implementation for the HP 16505A logic circuit design analyzer. Compatibility of encapsulated measurement server architecture based with analyzing requirements; Application of the logic design analyzer to a digital design team.

Discusses the importance of establishing data libraries to normalize the variety of logic circuit design analyzer data types. Design goals in overcoming challenges in the formation of data libraries; Case example of establishing data libraries for the HP 16505A and 16505B analyzers; Analyzer memory layout; Guidance using format specifications.

The article details the use of a current mirror that features modern dual transistors in generating pulses. According to the author, timing uncertainty can occur when complementary metal-oxide semiconductor (CMOS) gates are used to generate pulses because of gate-threshold variations. He states that bipolar-junction transistors can be used to produce accurate pulse widths. The current mirror model presented by the author produces pulses that are more predictable than those produced by CMOS.

The article explains how spread-spectrum clocking can help reduce electromagnetic interference (EMI) in synchronous systems. The benefits of spread-spectrum-clocking are discussed. An overview of how to use the spread-spectrum-clocking isolation function available in select Peripheral Component Interconnect Express (PCIe) switches is presented. Described, as well, are the advantages of the separation of clock domains.

The article offers information on the significance of fast switching speed and low phase noise for electronic-warfare (EW) systems. It states that synthesizers for the systems and simulation must be extremely broadband to correspond the range of possible threat emitters. It cites the need for synthesizers to provide clean signals in terms of a synthesizer's noise characteristics including its harmonic levels, single-sideband (SSB) phase noise, and nonharmonic spurious levels.

The article presents several articles of personal views related to electronic design. One discloses that applying pulse-width modulation (PWM) current to the light-emitting diode (LED) produces an average power comparable to that of direct current (DC) control signal, but with higher operating current and greater light output. An article describes the detection of differential GPS corrections transmitted by the U.S. Coast Guard, using a narrow-shift digital discriminator. Another, reports on the creation of an infrared close-object alert circuit with inexpensive components.

The article focuses on a superconducting chip developed by Hypres Inc. in the U.S. The chip contains about 11,000 Josephson junctions configured to form superconducting Rapid Single Flux Quantum logic circuits. This niobium-based chip in a commercial-off-the-shelf cryocooler that functions as a high-speed all-digital receiver holds great promise for improved microwave communications system performance.

The article discusses some innovative ways in making electronic transistors. Traditional transistors are based on polysilicon-gate electrodes and silicon-dioxide dielectric insulators because of its manufacturability and ability to deliver continued transistor performance improvements. Now, transistors are based on hafnium-gate dielectric insulators and innovative metal materials for the positive and negative metal oxide silicon transistors that make up complimentary metal oxide silicon semiconductors.

The article describes the use of field programmable analog circuits in signal conditioning and filtering applications. The circuits are based on complementary metal oxide semiconductor-operational transconductance and switched-capacitor amplifiers. The devices offer an easiest way to solve complex design problems.

This article discusses the application of very high speed complementary metal oxide semiconductor (CMOS) inverters in converting radio frequency to digital logic signals. There are several technical and economic disadvantages in using high-speed voltage comparator to perform radio frequency to digital conversion. The 74LVCU04 is an off the shelf CMOS hex inverter that is used in several applications.

Addresses the physical comparisons of single and dual-gate logic. Concerns on size requirements for logic packaging; Factors affecting thermal performance; Costs of using chip scale packages or wafer scale packages.

The article focuses on the elements and uses of a compact logic analyzer, handwriting calculator app and sewable electronics. It highlights the USB-based logic analyzer and oscilloscopes from IKA Logic, which can operate in a mixed capture/generate mode using a digital pattern generator to drive one or more connections. It also offers evaluation of MyScript's handwriting technology and Sparkfun's sewable electronics kits.

Introduces a circuit design that can measure a range of voltages aside from measuring low-level signals from photodetectors. Integration of the currents for a user-controlled integration period; Formula for the full-scale voltage input for the circuit; Measurement points for comparison with the calculated noise performance.

Introduces silicon-on-insulator process used in integrating 650-volts and low-voltage logic circuit made by Philips Semiconductor Inc. in the United States. Features and trademark of silicon-on-insulator process; Types of devices built with the EZ-HV process; Mechanism of the breakdown process; Advantages of oxide-isolation between circuits.

Features Tektronix's TLA700 2-GHZ logic analyzer family. Specifications; Capabilities; Applications; Enhancements; Speed of signal acquisition; Generation bus rates.

The article reports that SK Hynix Inc., the world's second largest memory chip maker is planning to build a factory in South Korea to meet the increasing demand for its NAND flash memory. The memory market has been improving with growing demand for faster processing power and greater storage in mobile devices and computers.

The article focuses on the importance of a new breed of test products to handle the challenge of chips that contain hundreds of millions of logic gates. According to Luke Schreier of National Instruments Corp., the discussion on logic gates is about analog and RF capacitors baked into the silicon. A diagram is presented depicting the Mentor Graphics' hierarchical approach.

The article reports that Yi Lu and Jingjing Zhang from the University of Illinois, Urbana-Champaign have used glucose meter as a logic gate in biocomputing platforms, which produced glucose or the reduced form of nicotinamide adenine dinucleotide (NADH) in response to biological substance.