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Go Abstract To Speed Up Your Design Flow.

Authors :
Abbasi, Taher
Source :
Electronic Design. 8/19/2002, Vol. 50 Issue 17, p51. 4p.
Publication Year :
2002

Abstract

Discusses the use of an architectural and register-transfer-level (RTL) synthesis tools for the design of logic gates. Physical and logical hierarchy complexities for the design of gates; Differences between architectural and RTL synthesis; Decisive factors that favor a design flow based on architectural synthesis.

Subjects

Subjects :
*LOGIC circuits
*LOGIC design

Details

Language :
English
ISSN :
00134872
Volume :
50
Issue :
17
Database :
Academic Search Index
Journal :
Electronic Design
Publication Type :
Periodical
Accession number :
7234241