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Self-aligned gate structures are preferred for faster operation and scaling down of thin film transistors by reducing the overlapped region between source/drain and gate electrodes. Doping on source/drain regions is essential to fabricate such a self-aligned gate thin film transistor. For oxide semiconductors such as In-Ga-Zn-O, SiNx capping readily increases their carrier concentration. We report that the SiNx deposition temperature and thickness significantly affect the device properties, including threshold voltage, field effect mobility, and contact resistance. The reason for these variations in device characteristics mainly comes from the extension of the doped region to the gated area after the SiNx capping step. Analyses on capacitance-voltage and transfer length characteristics support this idea.

Multilayered ZnO-SnO2 heterostructure thin films were produced using pulsed laser ablation of pie-shaped ZnO-SnO2 oxides target, and their structural and field effect electronic transport properties were investigated as a function of the thickness of the ZnO and SnO2 layers. The films have an amorphous multilayered heterostructure composed of the periodic stacking of the ZnO and SnO2 layers. The field effect electronic properties of amorphous multilayered ZnO-SnO2 heterostructure thin film transistors (TFTs) are highly dependent on the thickness of the ZnO and SnO2 layers. The highest electron mobility of 37 cm2/V s, a low subthreshold swing of a 0.19 V/decade, a threshold voltage of 0.13 V, and a high drain current on-to-off ratio of ∼1010 obtained for the amorphous multilayered ZnO(1.5 nm)-SnO2(1.5 nm) heterostructure TFTs. These results are presumed to be due to the unique electronic structure of an amorphous multilayered ZnO-SnO2 heterostructure film consisting of ZnO, SnO2, and ZnO-SnO2 interface layers.

This study examined the effect of oxygen plasma treatment on light-enhanced bias instability in Zn-Sn-O (ZTO) thin film transistors (TFTs). The treated ZTO TFT exhibited only a threshold voltage (Vth) shift of −2.05 V under negative bias illumination stress (NBIS) conditions, whereas the pristine device suffered from a negative Vth shift of 3.76 V under identical conditions. X-ray photoelectron spectroscopic analysis revealed that the oxygen vacancy defect density was diminished via the oxygen plasma treatment. This suggests the Vth degradation under NBIS is due to photo-transition of oxygen vacancy defects.

A novel strategy to enhance the bias and illumination stress stability of oxide thin-film transistors (TFTs) is presented. The ultrathin positive charge barrier is employed to block the movement of photo-generated charges toward the interface between gate insulator and semiconductor under negative gate bias and illumination. This method can break through the limitation in stability enhancement caused by the inevitable oxygen vacancy and facilitates the fabrication of highly stable oxide TFTs at low process temperature.

We have fabricated fully patterned transparent oxide/organic hybrid transistors on glass substrates that contain In-Ga-Zn-O as the active layer and a poly(4-vinyl phenol-comethyl methacrylate) copolymer as the dielectric layer. These devices exhibit a saturation mobility of 6.04 cm2/V s, a threshold voltage value of 3.53 V, a subthreshold slope of 360 mV/decade, and an on-off ratio of 1.0×109 at a maximum processing temperature of 200 °C. We found that the bias stability characteristics of the hybrid transistors are dependent on the ambient conditions, but can also be dramatically improved by applying a hydrophobic organic passivation layer to the gate insulator.

The gate bias dependence on the negative bias instability under illumination was examined. As the gate bias got more negative, dominant mechanism was changed from simple charge trapping to that accompanied by generation of subgap states. Degree of threshold voltage shift was not monotonously dependent on the magnitude of negative gate bias. It is strongly related with the corresponding instability modes for different gate bias regimes. The transition of instability mechanism depends on how much the gate bias stabilizes ionized oxygen vacancy states.

We investigated the visible photon accelerated negative bias instability (NBI) in amorphous In–Ga–Zn–O (a-IGZO) thin film transistor (TFT). As reported in previous works, the rigid shift in transfer curves with insignificant changes in field-effect mobility and subthreshold swing was observed. On the other hand, there is substantial change in capacitance-voltage characteristics caused by created subgap states. The suggested nature of created states is the ionized oxygen vacancy (VO2+) by the combination of visible light and negative bias. The generated VO2+ states enhance the NBI under illumination as increased deep hole trapping centers. Furthermore, the photoexcitation of VO to stable VO2+ yields excess free carriers in conduction band. The increased carrier density also enhances the negative shift in turn-on voltage of a-IGZO TFT.

P-type thin-film transistors (TFTs) using room temperature sputtered SnOx (x

This study examined the impact of the passivation layer on the light-enhanced bias instability of Al–Sn–Zn–In–O (AT–ZIO) thin film transistors. The suitably passivated device exhibited only a threshold voltage (Vth) shift of 0.72 V under light-illuminated negative-thermal stress conditions, whereas the device without a passivation layer suffered from a huge negative Vth shift of >11.5 V under identical conditions. The photocreated hole trapping model could not itself explain this behavior. Instead, the light-enhanced Vth instability of the unpassivated device would result mainly from the photodesorption of adsorbed oxygen ions after exposing the AT–ZIO back-surface in an ambient atmosphere.

This work was funded by the Portuguese Science Foundation (FCT-MCTES) through projects PTDC/CTM/73943/2006, PTDC/EEA-ELC/64975/2006, ERC 2008 Advanced Grant (INVISIBLE Contract No. 228144) and IT R&D program of MKE (Contract No. 2006-S079-03, Smart window with transparent electronic devices) from ETRI Korea. We thank K. Nomura for the Seebeck measurements and N. Franco for the XRD analysis. Copper oxide (Cu2 O) thin films were used to produce bottom gate p-type transparent thin-film transistors (TFTs). Cu2 O was deposited by reactive rf magnetron sputtering at room temperature and the films exhibit a polycrystalline structure with a strongest orientation along (111) plane. The TFTs exhibit improved electrical performance such as a field-effect mobility of 3.9 cm2 /V s and an on/off ratio of 2× 102. publishersversion published

We investigated the effect of the Sn/Zn ratio in the amorphous Zn-In-Sn-O (ZITO) system on the gate voltage stress-induced stability of the resulting thin film transistors (TFTs). The device stability of the TFTs with a composition channel of Zn:In:Sn=0.35:0.20:0.45 (device C) was dramatically improved, while those of the devices with Zn:In:Sn=0.45:0.20:0.35 and 0.40:0.20:0.40 suffered from deep level trap creation in the channel and charge trapping, respectively. The stability enhancement of device C can be attributed to its having the lowest total trap density, which was corroborated by the superior temperature stability of the subthreshold current region in the temperature range from 298 to 398 K. Therefore, the Sn atoms are believed to act as a stabilizer of the amorphous ZITO network, which is similar to the role of Ga in the In-Ga-Zn-O system.

We compared the effect of the temperature on the device stability of Al–Zn–Sn–O (AZTO) thin film transistors (TFTs) with top gate and bottom gate architectures. While the bottom gate device without any passivation layer on the AZTO channel layer showed a large threshold voltage (Vth) shift of 1.6 V after heating it from 298 to 398 K, the naturally passivated top gate device exhibited a smaller Vth shift of 0.6 V. This different behavior is discussed based on the concept of the thermal activation energy of the subthreshold drain current. It is proposed that the suitable passivation and lower interfacial trap density for the top gate TFT are responsible for its superior temperature stability compared to the bottom gate device.

Thin film transistors with a channel of Zn–In–Sn–O were fabricated via a combinatorial rf sputtering method. It was found that the role of the In atoms is to enhance the mobility and to shift the threshold voltage (Vth) negatively. On the other hand, the Sn fraction is critical for improving the overall trap density including the density-of-states of the bulk channel layer and the interfacial trap density at the ZnInSnO interface. The optimized transistor was obtained at a compositional ratio of Zn:In:Sn=40:20:40, which exhibited an excellent subthreshold gate swing of 0.12 V/decade, Vth of −0.4 V, and high Ion/off ratio of >109 as well as a high field-effect mobility of 24.6 cm2/V s.

A comparative study was made of the performance and electrical instabilities in amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistors with Al2O3 and Al2O3/SiNx gate dielectrics. Steeper subthreshold slope is observed in Al2O3 devices, which shows that the density of trap states at the interface of a-IGZO/Al2O3 is lower than that of a-IGZO/SiNx. Under high bias-stresses, a larger degradation is observed in Al2O3/SiNx devices. The device degradation for both devices are mainly attributed to the charge trapping phenomenon, but the different time dependence of threshold voltage shift shows that trapped electrons are more easily redistributed inside the Al2O3 dielectrics.

We have fabricated transparent bottom gate thin film transistors (TFTs) using Al-doped zinc tin oxide (AZTO) as active layers. The AZTO active layer was deposited by rf magnetron sputtering at room temperature. The AZTO TFT showed good TFT performance without postannealing. The field effect mobility and the subthreshold swing were improved by postannealing below 180 °C. The AZTO TFT exhibited a field effect mobility (μFET) of 10.1 cm2/V s, a turn-on voltage (Von) of 0.4 V, a subthreshold swing (S/S) of 0.6 V/decade, and an on/off ratio (Ion/Ioff) of 109.

Phosphorus (P)-doped ZnO thin films were grown by radio-frequency magnetron sputtering to study the microstructural properties of p-type ZnO. As-grown P-doped ZnO, a semi-insulator, was converted to p-type ZnO after being annealed at 800°C in an N2 ambient. X-ray diffraction, secondary-ion-mass spectrometry, and Hall effect measurements indicated that P2O5 phases in as-grown P-doped ZnO disappeared after thermal annealing to form a substitutional P at an O lattice site, which acts as an acceptor in P-doped ZnO. Transmission electron microscopy showed that the formation of stacking faults was facilitated to release the strain in P-doped ZnO during post-thermal annealing.