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1. Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using In-Situ ALD Digital O3 Treatment

4. Integration Design and Process of 3-D Heterogeneous 6T SRAM with Double Layer Transferred Ge/2Si CFET and IGZO Pass Gates for 42% Reduced Cell Size

5. 3D Integration of Vertical-Stacking of MoS2 and Si CMOS Featuring Embedded 2T1R Configuration Demonstrated on Full Wafers

6. Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using In-Situ ALD Digital O3 Treatment

7. Fabrication of $\Omega$ -gated Negative Capacitance FinFETs and SRAM

8. Ge nanowire FETs with HfZrOx ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability

9. Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION

10. Surface structures of Au–Pt bimetallic nanoclusters on thin film Al2O3/NiAl(100) probed with CO

11. High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications

12. Life-threatening thrombocytopenia associated with acute Epstein-Barr virus infection in an older adult

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