Integration Design and Process of 3-D Heterogeneous 6T SRAM with Double Layer Transferred Ge/2Si CFET and IGZO Pass Gates for 42% Reduced Cell Size

Authors :: X.-R. Yu
M.-H. Chuang
S.-W. Chang
W.-H. Chang
T.-C. Hong
C.-H. Chiang
W.-H. Lu
C.-Y. Yang
W.-J. Chen
J.-H. Lin
P.-H. Wu
T.-C. Sun
S. Kola
Y.-S. Yang
Yun Da
P.-J. Sung
C.-T. Wu
T.-C. Cho
G.-L. Luo
K.-H. Kao
M.-H. Chiang
W. C.-Y. Ma
C.-J. Su
T.-S. Chao
T. Maeda
S. Samukawa
Y. Li
Y.-J. Lee
W.-F. Wu
J.-H. Tarng
Y.-H. Wang
Source :: 2022 International Electron Devices Meeting (IEDM).
Publication Year :: 2022
Publisher :: IEEE, 2022.

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