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A method for the characterisation of the process-induced optical loss in butt-coupled passive waveguides will be described. In principle the results are valid for any active-passive waveguide butt-coupling as well (e.g. laser-waveguide). The method was applied to butt-coupled waveguides, which were grown by selective area metal organic vapour phase epitaxy (MOVPE). Different etching procedures for the preparation of the masked mesa stripes were examined, which considerably influenced the regrowth behaviour close to the mesa edge. The optical loss at the interface was found to depend primarily on the thickness difference of the waveguides. The excess layer thickness due the regrowth near the mesa is proportional to the width of the masked stripe. It reaches a factor of 1.7 at 50 μm wide stripes and decreases exponentially with distance from the stripe ( 1 e length = 26 μ m ). In general the measured loss values agree with the numerical simulation at least for stripe widths ≥30 μm. For stripe widths of ≤30 μm loss values ≤1 dB have been obtained in all cases, but deviations of the calculated loss values occurred, which can be attributed to the regrowth geometry at the interface.

This investigation reports on the overgrowth of GaInAs(P)/InP heterostructures on ridges having sidewall angles between 44° and 86°. The ridges were aligned towards the and 1 > direction. The most ideal tracking according to the step was found for the steepest etched angles with steps directed towards . The growth behavior on such a facet should allow for a high quality butt joint contact of two heterostructures devices. The growth in the perpendicular direction exhibits a different behavior as corrugations are observed in the step area. It seems that the different chemical reactivities of the various steps are responsible for the anisotropic growth behavior.

We report on the growth of highly uniform GaInAsP layers which can be achieved reproducibly over a long period. Quaternary layers with, e.g., λ g =1.050 μ m are obtained with a variation of the gap wavelength within ±1 nm over one wafer. For the run to run reproducibility nearly the same narrow tolerance band was measured. The effect of the substrate misorientation is briefly discussed. Finally we present the data of the fully MOMBE grown structure for the vertical integration of waveguides and photodiodes. Dark currents vary between 130–600 pA and the device capacity is below 100 fF for 10 V reverse voltage for the selected device geometry.

The device fabrication for a monolithic integration of a waveguide (WG), a photodiode (PD) and a junction field-effect transistor (JFET) in the InGaAs/InP material system is described. In an optimised WG/PD layer sequence, grown by metal organic vapour-phase epitaxy (MOVPE), JFETs have been realised using local Si and Be ion implantations. The JFETs (1.5 μm × 200 μm) have a maximum transconductance of 160 mS/ mm and a cutoff frequency of 12 GHz. The PDs are vertically coupled to the InGaAsP WG by evanescent field coupling. They show a low dark current of 3 nA and a 3 dB bandwidth of 5 GHz at −10 V bias. With the presented layer structure, a transimpedance receiver OEIC with monolithically integrated WG has been realised. The receiver sensitivity is −27.3 dBm at a BER of 10−9 for 400 Mbit/s data rate.

Using InP/InGaAs layers grown by metal organic molecular beam epitaxy (MOMBE) on semi-insulating (SI) InP substrate we have fabricated waveguide-integrated pin-photodiodes working on the principle of evanescent field coupling. A 3dB cutoff frequency of 9.6 GHz has been found in a 50 Ω system. The 100 μm long diodes exhibit a capacitance of < 0.1 pF at −5 V bias. In addition design criteria are given to improve the speed of the devices.

Monolithic arrays of four InP/lnGaAs pin photodiodes for wavelength division multiplexing applications have been fabricated on semi-insulating InP substrate. The diodes have a diameter of 30 μm on a 60 μm pitch. Deep trenches are used to isolate the individual diodes from each other. A crosstalk below −30 dB is achieved for frequencies up to about 3.3 GHz. Pulse measurements at the individual diodes show a falltime of 33 ps corresponding to a 3dB bandwidth in excess of 10 GHz.

It is shown that strained isoelectronically doped buffer layers grown on GaAs and InP substrates allow one to reduce the dislocation density as well as the deep level concentration. Photoluminescence measurements show an improved near gap luminescence and a reduced deep level emission. This has been also confirmed by DLTS measurements. The higher material quality is also reflected in the device performance. GaAs Schottky diodes (n ˜0.5 · 1016Cm-3) exhibit a leakage current of 100 pA up to 50 V reverse bias at room temperature even with large Schottky contact area of 125 μm × 60 μm. This technique allows the quality of electronic and optoelectronic devices to be improved.

It has been shown that with Ga or As doped InP epitaxial layers exhibit improved material quality [H. Beneking et al., Appl. Phys. Letters 47 (1985) 828]. By proper choice of the doping content a reduction of dislocations as well as a minority carrier diffusion length enhancement are achievable [H. Beneking and N. Emeis, IEEE Electron Device Letters EDL-7 (1986) 98]. It is demonstrated that the application of this technique allows one to fabricate bipolar diodes with improved electrical characteristics. The application of the strained layer growth in conventional device processing steps as dopant indiffusion and multilayer epitaxial growth is demonstrated. Furthermore, the uniformity of the parameters is greatly enhanced, which will be shown by presenting data on the standard deviation of reverse currents on 1 cm 2 wafers.

On p-type Ga 0.47 In 0.53 As LPE-grown layers, Schottky diodes were fabricated with different metals and surface preparations. On chemically etched surfaces, diodes with ideality factors near unity but rather low breakdown voltages with soft breakdown were achieved. The barrier heights were between 0.4 and 0.7 eV depending on the work function of the metal. On sputter-cleaned surfaces the diodes exhibited high breakdown voltages and barrier heights of about 0.7 eV independent of the metal. Annealing of the diodes at 320°C resulted in reduced series resistances and barrier heights in the case of sputteretched surfaces. The junction seems to consist of two different barriers; the lower one is determined by an As segregation at the interface, whereas the higher one is caused by traps which are induced by the sputter process.

It is shown that strained isoelectronically doped buffer layers grown on GaAs and InP wafers allow one to reduce the dislocation density drastically by a factor greater than 20. Correspondingly, the photoluminescence efficiency of near‐band‐edge emission is enhanced by about the same factor. By deep level transient spectroscopy measurements practically no deep levels can be detected in contrast to uncoated wafers. Applied to device fabrication a great improvement is found in comparison to conventionally fabricated optoelectronic and electronic devices.

A two-step liquid-phase-epitaxial process has been used to fabricate widegap-emitter Schottky collector transistors. After the growth of the first two epitaxial layers the sample has been structured and then overgrown in a second run. In that way a pn homojunction in the widegap material (InP) underneath the extrinsic base-emitter region and a pn heterojunction under the collector have been formed. First transistors fabricated show a current gain of 10 in the common-emitter configuration.

A Schottky contact photodiode on p-type GaInAs for application at λ=1.3–1.6 μm has been fabricated and tested. The coaxial type device shows an external quantum efficiency of 19% at λ=1.27 μm, and rise and fall times of less than 15 ps.

In the InP/GaInAs material system heterojunction bipolar transistors have been fabricated on isoelectronically doped InP buffer layers. The greatly improved performance of the B?E diodes, especially at low forward bias, is reflected in the improved behaviour of bipolar transistors.

A widegap-emitter transistor with a Schottky collector has been fabricated using n-InP as the emitter, p-GaInAs as the base layer and Ni as the Schottky metallisation. The fabricated transistors show a current gain better than 5 in the common-emitter configuration.