281 results on '"Lacaita, A.L."'
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2. Impact of the array background pattern on cycling-induced threshold-voltage instabilities in nanoscale NAND Flash memories
3. Comprehensive investigation of the impact of lateral charge migration on retention performance of planar and 3D SONOS devices
4. A wireless microsystem with digital data compression for neural spike recording
5. Unified mechanisms for structural relaxation and crystallization in phase-change memory devices
6. Status and challenges of phase change memory modeling
7. Explanation of programming distributions in phase-change memory arrays based on crystallization time statistics
8. Transient simulation of delay and switching effects in phase-change memories
9. Statistics of resistance drift due to structural relaxation in phase-change memory arrays
10. Folding of phase noise spectra in charge-pump phase-locked loops induced by frequency division
11. Comprehensive investigation of statistical effects in nitride memories-part II: scaling analysis and impact on device performance
12. Comprehensive investigation of statistical effects in nitride memories-part I: physics-based modeling
13. A new transient model for recovery and relaxation oscillations in phase-change memories
14. Fundamental limitations to the width of the programmed v_{T} distribution of nor flash memories
15. Time-to-digital converter for frequency synthesis based on a digital bang-bang DLL
16. Comparison of modeling approaches for the capacitance-voltage and current-voltage characteristics of advanced gate stacks
17. Differentially-Tuned VCO with Reduced Tuning Sensitivity and Flicker Noise Up-Conversion
18. Phase change memories: State-of-the-art, challenges and perspectives
19. Recent developments on Flash memory reliability
20. Edge and percolation effects on VT window in nanocrystal memories
21. Switching and programming dynamics in phase-change memory cells
22. Switch-off behaviour floating-body PD SOI MOSFET's
23. Impact ionization in silicon: a microscopic view
24. A new two-trap tunneling model for the anomalous stress-induced leakage current (SILC) in Flash memories
25. Phase-noise performance of crystal-like LC tanks
26. Monte Carlo simulation of conductance characteristics in SOI-MOSFET
27. Analysis of space and energy distribution of stress-induced oxide traps
28. Threshold switching and phase transition numerical models for phase change memory simulations
29. Power‐jitter trade‐off analysis in digital‐to‐time converters
30. Investigation of the RTN Distribution of nanoscale MOS devices from subthreshold to on-state
31. Physical mechanism and temperature acceleration of relaxation effects in phase-change memory cells
32. Frequency dependence on bias current in 5-Ghz CMOS vcos: impact on tuning range and flicker noise upconversion
33. Integrated LC oscillators for frequency synthesis in wireless applications
34. AM-to-PM conversion in varactor-tuned oscillators
35. Size-Dependent Retention Time in NiO-Based Resistive-Switching Memories
36. Noise Analysis and Minimization in Bang-Bang Digital PLLs
37. Random Telegraph Noise Effect on the Programmed Threshold-Voltage Distribution of Flash Memories
38. Transient effects of delay, switching and recovery in phase change memory (PCM) devices
39. Voltage-Controlled Relaxation Oscillations in Phase-Change Memory Devices
40. Physical modeling of single-trap RTS statistical distribution in flash memories
41. Quantization Effects in All-Digital Phase-Locked Loops
42. A multistandard Σ-Δ fractional-N frequency synthesizer for 802.11a/b/g WLAN
43. Experimental Study of Data Retention in Nitride Memories by Temperature and Field Acceleration
44. 5-GHz Oscillator Array With Reduced Flicker Up-Conversion in 0.13-$muhboxm$CMOS
45. Multiphase LC oscillators
46. A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs
47. Optimization of Threshold Voltage Window Under Tunneling Program/Erase in Nanocrystal Memories
48. Parasitic reset in the programming transient of PCMs
49. A 15-GHz broad-band /spl divide/2 frequency divider in 0.13-/spl mu/m CMOS for quadrature generation
50. Modeling of Tunneling P/E for Nanocrystal Memories
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