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PurposeFirst, the contributions of spatial characteristics to microclimate were analyzed. And the results from mobile measurements were compared to those from fixed measurements to examine accuracy of mobile method. Air temperature and physiologically equivalent temperature (PET) profiles were plotted to explore the impacts of the spatial characteristics of that urban square and local street.Design/methodology/approachThis research investigates the effects of urban canyons and landscape on air temperature and outdoor thermal comfort in an open square in Seoul, Korea, a city of diverse thermal environments. Mobile field measurements were carried out to obtain local meteorological data based on higher spatial resolution.FindingsOn a day in October under clear sky, air temperature and PET differences of up to 1.77 °C and 9.6 °C were observed at 2 p.m. and 3 p.m., respectively. These were mainly from the impact of shading effects caused by surrounding obstacles. The current layout and volume of vegetation in the square seemed not effective for reducing air temperature and improving thermal comfort, which needs further study.Originality/valueThe authors tested a way to investigate time delay when using mobile measurements by correcting measured local data using adjacent meteorological observatory data. The findings of and limitations on mobile station-based field measurement and analysis are discussed herein.

The advances in modern intelligent electronic systems have a pressing need for smart electromagnetic interference (EMI) shielding capabilities in a frequency-selective manner to choose which electromagnetic waves in a certain range to be blocked. Herein, we present multilayered EMI shielding composites that can provide selective on-off characteristics for specific frequency ranges across a broad spectrum. The composites are composed of outermost dielectric layers and conductive interlayers fabricated via solution-printing, wherein hexagonal boron nitride (BN) and silver-coated BN particles are embedded, respectively. The EMI shielding frequency range and on-off selectivity are controllable by varying the configuration of the composite structure in terms of the BN content and the number of composite layers, providing different interstitial spaces between the fillers and interfacial dielectric properties. Furthermore, the optimal combination of these layers permits excellent combinatorial properties of EMI shielding (32–62 dB), thermal conductivity (7.61 W/m·K), and electrical insulation (4.03 kV/mm) in the through-plane direction. The developed composites and their synthetic pathways have enormous potential for tailored material design and flexible system integration in next-generation EMI shielding technologies.

MgO films were deposited on Si via atomic layer deposition (ALD) using Mg(EtCp)2 and H2O precursors and their thermal stability was examined as a function of the post-deposition annealing (PDA) temperature. The characteristic self-limiting behavior of the ALD process was confirmed by changing several parameters, such as precursor pulsing times, deposition temperature, and number of cycles. The exceptional resulting step coverage was verified on a patterned wafer with a high aspect ratio. The band gap and dielectric constant of the as-deposited ALD-MgO film were extracted to be approximately 7.5 eV and 8.4, respectively, and were stable up to the PDA temperature of 700 °C. However, considerable outward diffusion of the underlying Si atoms toward MgO started to occur above 700 °C, and most of the MgO film was converted to an amorphous Mg-silicate phase at 900 °C with a thin layer of remaining MgO on top.

Although solid-state phase transformations through chemical reaction with the surrounding environment are important in the field of materials science, the atomic-level dynamics at reacting surfaces have been difficult to observe directly. Herein, we found highly ordered arrays of 1D intermediate crystals with a unique atomic configuration during the thermal sulfidation of 3D-structured MoO2 to 2D layer-structured MoS2. These arrays reveal a dimension-breaking reconstruction process (3D → 1D → 2D) as well as a unique electronic structure evolution. Theoretical calculations show that the 1D crystals have a cross-sectional structure of four transition-metal atoms arranged in a diamond shape; these are critical to the atomic layer-by-layer formation of 2D transition-metal dichalcogenides. Furthermore, electronic structure analyses reveal that the 1D intermediate crystals alter the MoO2/MoS2 contact structure from p- to n-type with increases in the number of formed MoS2 layers.

The combined effects of the atomic-layer-deposition (ALD) temperature (220 °C–280 °C) and metal electrodes (TiN and Mo) on the ferroelectric properties of Hf0.5Zr0.5O2 films were studied. Regardless of the metal electrode, a tetragonal–orthorhombic–monoclinic phase evolution sequence was observed with increasing ALD temperature after post-metallization annealing. However, the phase transition temperature slightly changed depending on the metal electrode, which was predetermined based on the as-deposited states. Additionally, the out-of-plane orientation of the final orthorhombic grains was highly dependent on the crystallographic alignment of the metal electrode grains, resulting in different values of the maximum remanent polarization. In terms of long-term reliability, the fatigue characteristics were highly dependent on the electrode characteristics, and the wake-up characteristics were mainly affected by the initial phase distribution determined by both the ALD temperature and metal electrode.

The size of the advanced Cu interconnects has been significantly reduced, reaching the current 7.0 nm node technology and below. With the relentless scaling-down of microelectronic devices, the advanced Cu interconnects thus requires an ultrathin and reliable diffusion barrier layer to prevent Cu diffusion into the surrounding dielectric. In this paper, amorphous carbon (a-C) layers of 0.75-2.5 nm thickness have been studied for use as copper diffusion barriers. The barrier performance and thermal stability of the a-C layers were evaluated by annealing Cu/SiO2/Si metal-oxide-semiconductor (MOS) samples with and without an a-C diffusion barrier at 400 °C for 10 h. Microstructure and elemental analysis performed by transmission electron microscopy (TEM) and secondary ion mass spectroscopy showed that no Cu diffusion into the SiO2 layer occurred in the presence of the a-C barrier layer. However, current density-electric field and capacitance-voltage measurements showed that 0.75 and 2.5 nm thick a-C barriers behave differently because of different microstructures being formed in each thickness after annealing. The presence of the 0.75 nm thick a-C barrier layer considerably improved the reliability of the fabricated MOS samples. In contrast, the reliability of MOS samples with a 2.5 nm thick a-C barrier was degraded by sp2 clustering and microstructural change from amorphous phase to nanocrystalline state during annealing. These results were confirmed by Raman spectroscopy, X-ray photoelectron spectroscopy and TEM analysis. This study provides evidence that an 0.75 nm thick a-C layer is a reliable diffusion barrier.

The transition metal dichalcogenides (TMDs) have great optical absorption and mobility in a subnanometer thickness. The MoSe2 among TMDs is significantly interested as an active layer in optical devices because it is superior to other TMDs in light absorption. Herein, we investigated the mechanism and characteristics of phototransistors using bi-layer MoSe2 film grown by molecular beam epitaxy. The interaction between the Al2O3 and MoSe2 was explored by X-ray and ultraviolet photoelectron spectroscopy, which showed that the chemical bonding and energy-band bending in the MoSe2 due to the electron doping. The optical devices exhibited well-controlled performance of the phototransistors with gate bias and illumination power-density, resulting in superior photoresponsivity (R) of 242 A/W. The mechanism of the R was fully interpreted by the change in quasi Fermi levels, defect states, mobility, and metal contact. Especially, capturing the electrons (holes) generated in the defect states increases the probability that the untrapped holes (electrons) reach the source and drain electrode, resulting in the high R. In addition, the decay mechanism was described by lowering the temperature, which persistent photocurrent was not observed at the low temperature. Finally, the performance of logic gates composed of the MoSe2 demonstrates its applicability to future photo-sensing systems.

HfO2-based ferroelectrics are highly expected to lead the new paradigm of nanoelectronic devices owing to their unexpected ability to enhance ferroelectricity in the ultimate thickness scaling limit (≤2 nm). However, an understanding of its physical origin remains uncertain because its direct microstructural and chemical characterization in such a thickness regime is extremely challenging. Herein, we solve the mystery for the continuous retention of high ferroelectricity in an ultrathin hafnium zirconium oxide (HZO) film (∼2 nm) by unveiling the evolution of microstructures and crystallographic orientations using a combination of state-of-the-art structural analysis techniques beyond analytical limits and theoretical approaches. We demonstrate that the enhancement of ferroelectricity in ultrathin HZO films originates from textured grains with a preferred orientation along an unusual out-of-plane direction of (112). In principle, (112)-oriented grains can exhibit 62% greater net polarization than the randomly oriented grains observed in thicker samples (>4 nm). Our first-principles calculations prove that the hydroxyl adsorption during the deposition process can significantly reduce the surface energy of (112)-oriented films, thereby stabilizing the high-index facet of (112). This work provides new insights into the ultimate scaling of HfO2-based ferroelectrics, which may facilitate the design of future extremely small-scale logic and memory devices.

This paper presents a low-random noise of 2.6 e-rms, a low-power of 116.2 mW at video rate, and a high-speed up to 960 fps 2-mega pixels global-shutter type CMOS image sensor (CIS) using an advanced DRAM technology. To achieve a high performance global-shutter CIS, we proposed a novel architecture for the digital pixel sensor which is a remarkable global-shutter operation CIS with a pixel-wise ADC and an in-pixel digital memory. Each pixel has two small-pitch Cu-to-Cu interconnectors for the wafer-level stacking, and the pitch of each unit pixel is less than 5 μm which is the world’s smallest pixel embedding both pixel-level ADC and 22-bit memories.

Sub-micron pixels have been widely adopted in recent CMOS image sensors to implement high resolution cameras in small form factors, i.e. slim mobile-phones. Even with shrinking pixels, customers demand higher image quality, and the pixel performance must remain comparable to that of the previous generations. Conventionally, to suppress the optical crosstalk between pixels, a metal grid has been used as an isolation structure between adjacent color filters. However, as the pixel size continues to shrink to the sub-micron regime, an optical loss increases because the focal spot size of the pixel’s microlens does not downscale accordingly with the decreasing pixel size due to the diffraction limit: the light absorption inevitably occurs in the metal grid. For the first time, we have demonstrated a new lossless, dielectric-only grid scheme. The result shows 29 % increase in sensitivity and +1.2-dB enhancement in Y-SNR when compared to the previous hybrid metal-and-dielectric grid.

Pulsed-laser annealing (PLA) was performed on a preformed Pt-doped Ni-rich silicide film (Ni2Si phase), and its microstructural and phase evolution were studied from submelting to melting condition by varying the laser power density (P). Vertically nonuniform compositional profile with an interfacial intermixing was observed under a solid state reaction regime (P

For the fabrication of high-performance top-gated MoS2 transistors, a uniform atomic layer deposition (ALD) of an ultrathin high-k gate dielectric film without abnormal leakage paths on a MoS2 channel is required. In this study, we fabricated a ~5.2 nm-thick monolithic HfO2 gate dielectric film by utilizing an e-beam-evaporated Hf seed layer (target thickness of 3 nm) prior to the ALD of a HfO2 film (~2 nm). The Hf seed layer was fully converted to HfO2 without metallic residues during the following ALD process, without damages to the Raman and photoluminescence characteristics of the underlying MoS2. The conformal and pinhole-free ALD of the subsequent HfO2 film was verified using conductive atomic force microscopy. In addition, operation of a top-gated MoS2 transistor was demonstrated by integrating the Hf-seeded HfO2 gate dielectric film.

Defects in HfO2 dielectric film caused by indium and arsenide diffusion from InAs were investigated. To investigate the dissociation of InAs during post-deposition annealing (PDA) at 600 °C, we analyzed the ratio of the elements on the surface of the oxide layer and the chemical states by using time-of-flight secondary-ion mass spectroscopy and X-ray photoelectron spectroscopy, respectively. In–As bonding was dissociated and In and As atoms were diffused through the HfO2 layer from InAs. Fortunately, the diffusion and trap density could be controlled by using a 1-nm-thick Al2O3 passivation layer. In addition, we used the nitridation process to control the trap density. We evaluated the thermal and electrical stability of three samples—HfO2/InAs, HfO2/Al2O3/InAs, and nitrided HfO2/Al2O3/InAs—by analyzing the change in trap density before and after PDA at 600 °C and the stress-induced leakage current. In conclusion, the passivation layer effectively improved the thermal and electrical stability, whereas the nitridation process using NH3 gas did not. Moreover, although nitridation could reduce the interfacial defect states, due to structure distortion, it induced the degradation of the device.

Non-equilibrium fractal growth of MoS2 was induced by establishing an extremely Mo rich chemical vapor deposition (CVD) environment using a rapid heating rate in a confined reaction space. In addition, a detailed shape evolution mechanism was suggested based on the results of thermodynamics and kinetics studies. The extremely Mo rich CVD condition allowed various MoS2 flakes to be synthesized with triangular, star-like, and dendrite-like shapes in series, owing to the thermodynamic preference to increase the number of growth directions. Moreover, numerous small triangular crystals led to the formation of MoS2 flakes with jagged edges, probably as a result of the aggressive nucleation triggered by a fast and abundant supply of MoO3−x vapors. Lastly, using the MoS2 flakes with various fractal shapes, a systematic improvement of the hydrogen evolution reaction performance was demonstrated in accordance with the increase in the surrounding edge length.

The importance of optimizing the millisecond annealing (MSA) temperature for Pt-doped NiSi ( ${\mathrm {Ni}}_{{1}-{x}}$ Pt x Si) contact formation was highlighted by implementing and characterizing the ${\mathrm {Ni}}_{{1}-{x}}$ Pt x Si films in the static random-access memory (SRAM) cells fabricated with a 28-nm design rule. MSA at 750 °C–900 °C effectively reduced the junction leakage current compared to that with the conventional rapid thermal annealing, because of its efficient suppression of Ni diffusion in the junction region. Moreover, with an increase in the MSA temperature, the beneficial effects of maintaining a low junction leakage, such as interface flattening and grain size increase, were observed. However, the increase in the MSA temperature deteriorated the statistical distribution of the standby leakage current of the SRAM cells by producing more encroachment and spiking defects; this was attributed to the build-up of a high initial film stress and large stress relaxation during the subsequent back-end processes.

Pt-doped NiSi‒NiSi2 thin films in a uniform lamellar structure with a periodicity on the scale of a few tens of nanometers were formed on Si(001) substrates using a continuous laser scanning process. When the Pt-doped NiSi film was melted at high temperatures and was supercooled at high solidification rates (a high scanning speed of over 200 mm/s), a NiSi‒NiSi2 lamellar structure evolved while interacting with the underlying Si substrate and following the classical eutectic solidification path. The lamellar spacing could be easily controlled by the laser scanning speed. In addition, the periodically formed, nearly single-crystalline NiSi and NiSi2 phases exhibited epitaxial relationships with each other and also with the Si(001) substrate. It is believed that this novel NiSi‒NiSi2 lamellar structure can be used as a template for application areas requiring an electrode with a line/space pattern on the scale of a few tens of nanometers that can be prepared without using costly photolithographic processes.

The mechanical responses under cyclic bending of Ag nanowire composite electrodes coated with various metal oxide films of different thicknesses were explored, in an attempt to evaluate their applicability to flexible transparent electrodes. Al2O3, HfO2, and TiO2 films were deposited onto Ag nanowire electrodes by atomic layer deposition at a low temperature of 100 °C, and cyclic bending tests with in situ resistance measurements were conducted for up to 300,000 cycles. Thicker metal oxide films resulted in greater increases in the resistances of the composite electrodes under cyclic bending due to the reduced fracture strength of the films. Regardless of the type of metal oxide, however, similar tendencies were observed in the resistance changes in response to cyclic bending. It was found that the critical thickness calculation based on the Griffith theory for the evaluation of the brittle-to-ductile transition was not applicable to the metal oxide/Ag nanowire composite electrodes. By correlating the mechanical, ambient, and thermal reliability test results with those of optoelectrical property evaluations, the optimal thickness of Al2O3 film, as a representative metal oxide film, was determined to be 3–5 nm for Ag nanowire composite flexible transparent electrodes.

The objective of this study was to determine detailed microstructure of a Ni1–xPtxSi film formed via a melting/quenching process using high temperature laser annealing on a Si(001) substrate. The orthorhombic Ni1–xPtxSi film was found to be able to epitaxially grow with a crystallographic relationship of Ni1–xPtxSi[010]//Si[110], Ni1–xPtxSi(400)//Si(3 3 ¯ 1), and Ni1–xPtxSi (104)//Si(004). Volume expansion of the Ni1–xPtxSi film due to Pt incorporation was mainly accommodated by an increase in only one direction nearly parallel to the film surface (lattice parameter a). This was explained by the minimum coherent strain at the Ni1–xPtxSi (104)/Si(004) interface with an epitaxial growth tendency. Atomic-scale scanning transmission electron microscopy analyses revealed that the interface of Ni1–xPtxSi/Si had a repetitive atomic-step feature with energetically favorable Ni1–xPtxSi(004) terraces and (400) structural ledges that could increase the coherent area. By generating an array of misfit dislocations with an extra half plane of Ni1–xPtxSi(020), the elastic strain was further relieved.

In the development of dynamic random access memory (DRAM) with a device size of 20 nm or less, the leakage current of a capacitor with high-k dielectrics is one of the main factors causing the failure of a device. To reduce the failure rate of the device, we conducted experiments to reduce the boron impurities, which form defect sites in the dielectrics of the capacitor. The boron source flux was reduced during the deposition process of the capping layer after the formation of the capacitor, and the actual boron concentration in the capping layer was measured by an atom probe tomography. The leakage current characteristics of the samples were confirmed through the dielectric leakage failure test, which is a mass production test technique. In addition, the resistance failure test was performed to measure the risk of increased resistance. From these results, it was confirmed that the failure rate due to the leakage current of the capacitor decreased linearly with reduced boron concentration and the increase in failure rate due to the cell node resistance was negligible. In addition, the results show that the failure rate of mass-produced DRAM products can be significantly reduced without any change in the structure or materials of the capacitor. This is expected to contribute greatly to the development of DRAM with dimensions on the scale of 20 nm or less.

In order to reduce contact resistance (Rc) of the source/drain region in nanoscale devices, it is essential to overcome the increasing leakage and hot-electron-induced punch through (HEIP) degradation. In this paper, we propose a simple in situ Si soft treatment technique immediately after direct contact (DC) etching to reduce Rc and minimize HEIP degradation. We found by analysis with a transmission electron microscope, that 10 s of treatment reduced the plasma damaged layer by 19%, which resulted in 10.5% reduction of the P+ contact resistance. For comparison, the P + Rc was reduced by 6.5% when the doping level of the plug implantation was increased by 25%, but the HEIP breakdown voltage (VHEIP) by AC stress was greatly reduced by more than 80 mV, increasing the standby leakage current of DRAM devices. In the case of removing the plasma damage layer, not only did VHIEP not decrease until after 10 s, but also the reduction in Rc was larger than with the plug enhancement. The effect of the plasma damaged layer on HEIP was verified through the plug effect and gate induced drain leakage measurement, based on the distance between the gate and DC for each process. This simple in situ technique not only removed byproducts and the plasma damaged amorphous layer, but it also affected the effective implantation of dopants in subsequent plug processes. It was also cost effective because the process time was short and no extra process steps were added.

In this study, Al2O3/alucone nanolayered composites were studied as the overcoating for Ag nanowire electrodes with the aim of improving their mechanical reliability. Ultrathin and conformal Al2O3/alucone nanolayered composites with different layer spacings were formed on Ag nanowire electrodes via molecular layer deposition. To evaluate the effect of the different nanolayered composite overcoatings with the different layer spacing on the mechanical reliability of Ag nanowire electrodes, bending fatigue tests were performed on the specimens for up to 300,000 cycles while monitoring their resistance in situ. Ag nanowire electrodes with the nanolayered composite overcoating exhibited considerably smaller increases in resistance under bending fatigue, as compared to those with a single Al2O3 layer. In the nanolayered composites, the increase in resistance was further reduced as the layer spacing was decreased. Microstructural analysis confirmed that the density of propagated cracks in the overcoating layers was lower in the nanolayered composites compared to the single Al2O3 layer, resulting in a smaller increase in the resistance of the nanolayered composites. A finite-element method simulation of the bending of a single Al2O3 layer and nanolayered composites, which were designed to match the characteristics of our experimentally tested samples, indicated stress relaxation at the interfaces of the alucone layer, which strengthens the mechanical reliability of the nanolayered composites. (C) 2020 Elsevier B.V. All rights reserved.

This study provides new insight into mechanisms of ionic reactions on the surface of ZnO nanorod networks, which could result in enhanced performance in optical or molecular sensors. The current- voltage characteristics of ZnO nanorod network devices exhibit typical nonlinear behavior in air, which implies the formation of a Schottky barrier when metals are used as contacts. The conductance of the device increased significantly in vacuum, which can be explained by the desorption of hydroxyl groups at very low pressure. While physisorbed water or oxygen-related ions can detach from the ZnO surface during evacuation, exposure to high energy in the electron beam is believed to detach the chemisorbed anions of O- and O-2 from the surface of ZnO nanorods, which releases more electrons into the channel. The increase in available electrons enhances the conductance of the ZnO nanorods. Slow initialization of the conductance under ambient conditions indicates that the ionic re-adsorption is inactive under these conditions. Thus, the electron irradiation process can be used to reset the surface ionic molecules on metal oxide nano-structures by tuning the surface potential prior to the passivation process.

We employed rapid thermal annealing (RTA) as a novel approach to anneal indium–gallium–zinc–oxide films for thin film transistor (TFT) applications. We analyzed the binding states of the elements presented in the films annealed with RTA and hot plate based on X-ray photoelectron spectroscopy data. The investigation confirmed that the RTA samples underwent sol–gel reactions at a low temperature of 180 °C. We also acquired the transfer curves of the TFTs incorporated with the samples. The RTA samples exhibited a high on-current level, whereas the hot plate sample annealed at the same temperature demonstrated nearly no current flow. The data manifested that RTA generated both photonic and thermal energies, thus efficiently facilitating sol–gel reactions at a low temperature. Furthermore, we investigated on the energy band structures of the annealed films based on reflection electron energy loss spectroscopy and ultraviolet photoelectron spectroscopy analyses, discovering that the annealing atmosphere significantly affected the band structure of the film.

The electrical properties of HfO2/Al2O3 stacked dielectrics on n-type In0.53Ga0.47As were investigated as a function of the atomic layer deposition (ALD) temperature, particularly within the low temperature range from 100 to 200° C. Although the capacitance equivalent oxide thickness increased due to decreases in the dielectric constants of the HfO2 and the Al2O3 films, lowering the ALD temperature to 100° C improved the interface-related electrical characteristics, such as the interface state density and frequency dispersion under accumulation. In particular, a significant reduction in the leakage current was achieved at a similar physical thickness under substrate electron injection conditions, which was probably due to the improved near-interface characteristics enabled by the formation of the gate stack at a temperature of 100° C.

We report a novel patterning method using oxygen plasma treatment for flexible and transparent Ag nanowire electrodes. Using a dry film photoresist as a solid-state film-type photoresist, Ag nanowires were selectively oxidized under oxygen plasma treatment. Microstructural analysis revealed that the Ag nanowires were fully oxidized after 30 s of oxygen plasma treatment, which was also reflected in the changes in the optoelectronic properties of the Ag nanowires. The fully oxidized Ag nanowires could be completely dissolved in NH3 solution (aq.), without using a toxic etchant to form sharp patterns of Ag nanowire electrodes. To further confirm the applicability of the patterning technique demonstrated here in electronic devices, MoS2 thin-film transistors (TFTs) with patterned Ag-nanowire source/drain (S/D) electrodes were fabricated and they showed similar performances to typical MoS2 TFTs with thin-film-type Ti/Au S/D electrodes.

Vertical MoO2/MoS2 core–shell structures were synthesized on an amorphous surface (SiO2) by chemical vapor deposition at a high heating rate using a configuration in which the vapor phase was confined. The confined reaction configuration was achieved by partially covering the MoO3-containing boat with a substrate, which allowed rapid buildup of the partially reduced MoO3–x crystals in an early stage (below 680 °C). Rapid temperature ramping to 780 °C enabled spontaneous transition of the reaction environment from sulfur-poor to sulfur-rich, which induced a sequential phase transition from MoO3–x to intermediate MoO2 and finally to MoO2/MoS2 core–shell structures. The orthorhombic crystal structure of MoO3–x contributed to the formation of vertical crystals on the amorphous substrate, whereas the nonvolatility of the subsequently formed MoO2 enabled layer-by-layer sulfurization to form MoS2 on the oxide surface with minimal resublimation loss of MoO2. By adjustment of the sulfurization temperature and time...

In pursuit of a potential low-resistive contact structure, ErSi2-x was grown on an excessively P-doped and highly strained epitaxial Si layer (Si:P with a P concentration of ∼2.8 at%), and its microstructure was investigated in comparison to that grown on a conventional Si(001) substrate. On the Si substrate, ErSi2-x grains nucleated with a local epitaxial relationship and grew to form a polycrystalline film with a preferred alignment of ErSi2-x(10 1 ¯ 0)//Si(001) in a largely strained state. However, the epitaxial relationship at the interface during the ErSi2-x nucleation stage was disrupted, and randomly oriented columnar ErSi2-x grains grew on the Si:P(001) layer. Several experiments to separate the possible strain and doping effects showed that inhibition of the epitaxial nucleation of ErSi2-x grains was induced by excessive P accumulation at the interface region rather than by the strain effect. P enrichment at the interface encouraged ErSi2-x film growth without a preferred orientation, and the intermittent P-deficient areas worsened the interface roughness by provoking the local intrusion of ErSi2-x grains toward the Si:P layer.

In order to produce a dynamic random access memory (DRAM) of 20 nm or less, the most important concern regarding development is to reduce the leakage current degradation of the capacitor using high-k dielectrics. We studied the effect of defect sources present after the formation of the capacitor and measured the leakage current characteristics of the capacitor using the dielectric breakdown degradation test, a test used in mass production. From these results, we confirmed that the leakage current degradation was completely eliminated by removing external impurities of boron and hydrogen without any change in the structure or materials of the capacitor. For further DRAM scaling, we propose a method of reducing leakage current degradation of the capacitor.

Germanium telluride (GeTe), which has long been used in phase-change devices, has very unique structural characteristics. While atomic movement and related bond-order switching have been believed to determine the ferroelectric characteristics of this compound, structural changes accompanying ferroelectric switching have not been examined. In this study, using transmission electron microscopy and Raman spectroscopy, we directly observed the atomic movement and the related change in the local structure of GeTe during ferroelectric switching under an applied E-field. The crystal symmetry of GeTe could be alternated between two phases (R3m (rhombohedral) and Cm (monoclinic)) by changing the compound's polarization direction, indicating that the ferroelectric switching behavior of GeTe can be controlled. This observation suggests that ferroelectric switching of GeTe may originate from the phase transition between R3m and Cm through the formation of a morphotropic phase boundary (MPB). Since these two phases can generate MPBs with similar energies, the rotation of lone-pair direction during the phase transition can effectively change the polarization direction. The exotic phenomenon of ferroelectric switching, which involves changes in the chemical bonds, can be predicted on the basis of the role of several dopants through DFT calculations.

To extract comprehensive and accurate interface state density (D it) distribution for a low-temperature polysilicon (LTPS) thin film, three well-established methods based on capacitance–voltage (C–V) measurements were compared: high–low frequency capacitance, conductance, and quasi-static (QS) capacitance methods. Because of the strong frequency-dependent response of grain boundary traps within the LTPS, C–V measurements are necessary on p- as well as n-type LTPS films, as they provide D it distribution across the entire LTPS band gap. The QS capacitance method, which uses an optimal high-frequency C–V curve with a minimal grain boundary trap response, provided the best and most comprehensive estimate of D it distribution across the LTPS band gap, even at room temperature (25 °C). Although the narrow extraction ranges of D it were extended toward the mid-gap region by increasing the measurement temperature in both high–low frequency capacitance and conductance methods, the responses of the grain boundary traps still overestimated the D it values near the band edges.

Semiconducting two-dimensional (2D) materials-based devices usually exhibit inferior electrical performance compared to their theoretical predictions, which is mainly attributed to the presence of high density of interfacial defect induced trap states within the bandgap of 2D materials. It is pertinent to control the density of interface traps (D it) and identify their respective energy levels inside the band gap of the 2D materials to understand the tailored device performance. Here, we report the large modulation of D it by electrical gating and varying the channel thickness of tungsten diselenide (WSe2) placed on ultra-clean hexagonal boron nitride (hBN) gate insulator in a metal–insulator–semiconductor structure, which is revealed by performing multi-frequency capacitance and conductance measurements. Analysis of the 2D hBN/WSe2 interface reveals that with the increase of WSe2 thickness, D it at the midgap of WSe2 is reduced to 6 × 109 cm−2 eV−1, which is less than D it reported for SiO2/Si interface (∼1010 cm−2 eV−1). Furthermore, by increasing thickness and applying gate voltage, D it distribution is systematically modulated inside the WSe2 band gap from valence band edge to mid-gap to conduction band edge, thereby changing the Fermi level of WSe2, and inducing versatile device polarity. Our results show that D it and its spatial energy distribution within the thickness tailored WSe2 band gap primarily control polarity modulation in WSe2.

The passivation effect of an Al2O3 layer on the electrical properties was investigated in HfO2–Al2O3 laminate structures grown on indium phosphide (InP) substrate by atomic-layer deposition. The chemical state obtained using high-resolution X-ray photoelectron spectroscopy showed that interfacial reactions were dependent on the presence of the Al2O3 passivation layer and its sequence in the HfO2–Al2O3 laminate structures. Because of the interfacial reaction, the Al2O3/HfO2/Al2O3 structure showed the best electrical characteristics. The top Al2O3 layer suppressed the interdiffusion of oxidizing species into the HfO2 films, whereas the bottom Al2O3 layer blocked the outdiffusion of In and P atoms. As a result, the formation of In–O bonds was more effectively suppressed in the Al2O3/HfO2/Al2O3/InP structure than that in the HfO2-on-InP system. Moreover, conductance data revealed that the Al2O3 layer on InP reduces the midgap traps to 2.6 × 1012 eV–1 cm–2 (compared to that of HfO2/InP, that is, 5.4 × 1012 eV–...

Ultrasensitive room-temperature operable gas sensors utilizing the photocatalytic activity of Na-doped p-type ZnO (Na:ZnO) nanoflowers (NFs) are demonstrated as a promising candidate for diabetes detection. The flowerlike Na:ZnO nanoparticles possessing ultrathin hierarchical nanosheets were synthesized by a facile solution route at a low processing temperature of 40 °C. It was found that the Na element acting as a p-type dopant was successfully incorporated in the ZnO lattice. On the basis of the synthesized p-type Na:ZnO NFs, room-temperature operable chemiresistive-type gas sensors were realized, activated by ultraviolet (UV) illumination. The Na:ZnO NF gas sensors exhibited high gas response (S of 3.35) and fast response time (∼18 s) and recovery time (∼63 s) to acetone gas (100 ppm, UV intensity of 5 mW cm–2), and furthermore, subppm level (0.2 ppm) detection was achieved at room temperature, which enables the diagnosis of various diseases including diabetes from exhaled breath.

Uniform deposition of high-k dielectrics on two-dimensional (2D) crystals is highly desirable for their use in future nano-electronic devices. Here, the surface coverage of the Al2O3 films grown by atomic layer deposition (ALD) was investigated on mechanically-exfoliated MoS2, WS2, WSe2, and h-BN flakes for exploring the deposition kinetics of the Al2O3 films on the 2D crystals. The film coverage followed a decreasing order of WSe2 > WS2 > MoS2 > h-BN, which was mainly determined by the ALD temperature and adsorption energy (Eads) of the ALD precursor (trimethyl-aluminum) during the initial ALD cycles. The obtained |Eads| values of the precursor on the 2D crystals corresponded well to a van der Waals physisorption energy of 0.05–0.26 eV. Furthermore, the magnitude of the extracted Eads values showed a strong dependence on the induced dipole polarizability of the 2D crystals. The obtained results demonstrate that the surface coverage of the ALD high-k dielectrics can be modulated by choosing the types of the 2D substrates, and could provide a pathway for the integration of high-k dielectrics in 2D crystal-based nano-electronic devices.

To synthesize a thermally robust Ni1–xPtxSi film suitable for ultrashallow junctions in advanced metal-oxide-semiconductor field-effect transistors, we used a continuous laser beam to carry out millisecond annealing (MSA) on a preformed Ni-rich silicide film at a local surface temperature above 1000 °C while heating the substrate to initiate a phase transition. The melting and quenching process by this unique high-temperature MSA process formed a Ni1–xPtxSi film with homogeneous Pt distribution across the entire film thickness. After additional substantial thermal treatment up to 800 °C, the noble Ni1–xPtxSi film maintained a low-resistive phase without agglomeration and even exhibited interface flattening with the underlying Si substrate.

As a future-generation source/drain contact structure, NiSi films were formed on a strained and epitaxial Si:P layer (P concentration of ~ 1.9 at.%), and their unique microstructural properties were characterized as a function of the annealing temperature (400–800 °C). Unlike the NiSi film formed on Si, those formed on the strained Si:P consisted of many abnormally large grains with a rather uniform thickness and flat-bottom interface, most likely because of the strain effect caused by the underlying Si:P layer. The strain energy built at the NiSi/Si:P interface is believed to have significantly affected the microstructure and morphology of the subsequently grown NiSi film, which eventually led to retardation of thermal agglomeration.

An experiential aspect regarding the improvement of retention characteristics of InSnZnO (ITZO) thin-film transistor-based nonvolatile memory (TFT-NVM) devices with a hydrogen peroxide H2O2 treated Aluminum oxide (Al2O3) tunneling layer is reported. A better performance in retention of $\sim 92$ % (after ten years), a smaller subthreshold swing of 96 mV/decade, and a higher field effect mobility of 31.08 cm2/ $\text {V}\cdot \text {s}$ were obtained in H2O2 treated TFT-NVM devices compared with untreated one. Furthermore, employing the H2O2treatment in the Al2O3 layer provided oxygen-rich (O/Al ratio = 1.45) and OH− residuals free Al2O3, which effectively minimized the interface states ( $1.34 \times 10^{11}$ cm $^{-2}$ eV $^{-1})$ between the ITZO/(Al2O3/SiO x /SiO2) stack through strong oxidation. These results suggest that high-quality Al2O3 dielectric layer can be obtained through cost-effective H2O2 oxidation techniques for TFT-NVM devices.

In this study, the thermal sulfidation characteristics of two amorphous nonstoichiometric Mo-oxide (MoO3−x) films were investigated that were deposited using e-beam evaporation of MoO3 and MoO2 powders. It was observed that evaporation of MoO2 produced an amorphous MoO3−x film that exhibited a greater number of low oxidation states than that obtained by MoO3 evaporation. Moreover, subsequent sulfidation allowed the formation of a continuous MoS2 film; meanwhile, the MoO3-evaporated sample transformed into a discontinuous MoS2 film. Both the initial thickness of the MoO2-evaporated film and the sulfidation temperature were varied to determine their effects on the final MoS2 film quality. The sulfidation of an approximately 1-nm-thick MoO2-evaporated film at 780 °C produced a predominantly monolayer MoS2 film. Further, an operation of the bottom-gated transistor arrays using the synthesized MoS2 film was demonstrated along with a preliminary experimental result for potential application in three-dimensional device integration.