90 results on '"Denais, M."'
Search Results
2. 65 nm LP/GP mix low cost platform for multi-media wireless and consumer applications
3. Designing in reliability in advanced CMOS technologies
4. NBTI degradation: From physical mechanisms to modelling
5. Multi-vibrational hydrogen release: Physical origin of Tbd, Qbd power-law voltage dependence of oxide breakdown in ultra-thin gate oxides
6. Impacts of the recovery phenomena on the worst-case of damage in DC/AC stressed ultra-thin NO gate-oxide MOSFETs
7. Evidence and modelling current dependence of defect generation probability and its impact on charge to breakdown
8. A thorough investigation of MOSFETs NBTI degradation
9. Breakdown mechanisms in ultra-thin oxides: impact of carrier energy and current through substrate hot carrier stress study
10. Origin of Vt instabilities in high-k dielectrics: Jahn-Tellet effects or oxygen vacancies
11. New Insights on Percolation Theory and the Origin of Oxide Breakdown Thickness and Process Deposition Dependence
12. Unified Perspective of NBTI and Hot-Carrier Degradation in CMOS using on-the-Fly Bias Patterns
13. On the 6T-SRAM Cells Degradation Characterization in Ultra-Scaled CMOS Technologies
14. New Insights Into Recovery Characteristics During PMOS NBTI and CHC Degradation
15. Impact of Hot Carrier Degradation Modes on I/O nMOSFETS Aging Prediction
16. Origin of Vt Instabilities in High-$k$Dielectrics Jahn–Teller Effect or Oxygen Vacancies
17. Physical Modeling of Negative Bias Temperature Instabilities for Predictive Extrapolation
18. New Insights into Recovery Characteristics Post NBTI Stress
19. Paradigm Shift for NBTI Characterization in Ultra-Scaled CMOS Technologies
20. Reliability of Ultra Thin Gate Oxide CMOS Devices: Design Perspective
21. New Extensive MVHR Breakdown Models
22. Multi-vibrational hydrogen release: Physical origin of Tbd,Qbd power-law voltage dependence of oxide breakdown in ultra-thin gate oxides
23. Review on high-k dielectrics reliability issues
24. Interface Trap Generation and Hole Trapping Under NBTI and PBTI in Advanced CMOS Technology With a 2-nm Gate Oxide
25. Low cost 65nm CMOS platform for Low Power & General Purpose applications
26. Insight on physics of Hf-based dielectrics reliability.
27. New perspectives on NBTI in advanced technologies: modelling & characterization.
28. MVHR (multi-vibrational hydrogen release): consistency with bias temperature instability and dielectrics breakdown.
29. High-K dielectrics breakdown accurate lifetme assessment methodology.
30. On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFET's.
31. Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors.
32. New methodologies of NBTI characterization eliminating recovery effects.
33. Low temperature process flow optimisation for 65nm CMOS mixed-signal applications.
34. Characterization of Vt instability in hafnium based dielectrics by pulse gate voltage techniques [CMOS device applications].
35. New hole trapping characterization during NBTI in 65 nm node technology with distinct nitridation processing [MOSFETs].
36. Oxide field dependence of interface trap generation during negative bias temperature instability in PMOS.
37. Interface traps and oxide traps under NBTI and PBTI in advanced CMOS technology with a 2nm gate-oxide.
38. Trapping and detrapping mechanism in hafnium based dielectrics characterized by pulse gate voltage techniques [CMOS transistors].
39. Hydrogen release and defect generation rate in ultra-thin oxides [MOSFET devices].
40. Modelling charge to breakdown using hydrogen multivibrational excitation (thin SiO2 and high-k dielectrics) [MOS devices].
41. Characterization and Modeling NBTI for Design-in Reliability
42. Modelling charge to breakdown using hydrogen multivibrational excitation (thin SiO2 and high-K dielectrics)
43. Insight on physics of Hf-based dielectrics reliability
44. New methodologies of NBTI characterization eliminating recovery effects
45. Oxide field dependence of interface trap generation during negative bias temperature instability in PMOS
46. 65nm LP/GP mix low cost platform for multi-media wireless and consumer applications
47. MVHR (multi-vibrational hydrogen release): consistency with bias temperature instability and dielectrics breakdown
48. Trapping and detrapping mechanism in hafnium based dielectrics characterized by pulse gate voltage techniques
49. Reliability of Ultra Thin Gate Oxide CMOS Devices: Design Perspective
50. On-the-flycharacterization of NBTI in ultra-tihin gate oxide PMOSFET's
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