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Selective area growth (SAG) of gallium nitride (GaN) on silicon (Si) wafers efficiently relaxes the tensile stress that is generated in the GaN layer, when the structure is cooled down to room temperature after the growth. Hence, SAG enables the growth of thicker layers that are capable of operating at higher voltages than those grown in 2D layers. In this study, two GaN layers are grown by SAG on 200 mm-diameter Si(111) wafers by metal organic vapor phase epitaxy for the fabrication of pseudo-vertical p–n diodes. During the growth, the SiH4 precursor flow for the first sample was double than that for the second one. The uniformity of the doping concentration of the layers is investigated by scanning spreading resistance microscopy and the p- and n-type doped regions are examined by scanning capacitance microscopy. A low net doping concentration of 1.4 × 1016 cm−3 is extracted from capacitance–voltage measurements and a destructive breakdown occurs at 700 V for a 90 μm-diameter pseudo-vertical p–n diode. These results show the high potential of the SAG of GaN on Si wafers for vertical power devices. [ABSTRACT FROM AUTHOR]

The current research investigates the potential advantages of optimally combining wide bandgap Al2O3 with high dielectric constant (high-κ) Ta2O5 for gate dielectric applications. Various compositions of 10 nm AlxTayO oxide films are grown on the Al0.3Ga0.7N/GaN heterostructure by co-sputtering Al and Ta metals, followed by thermal oxidation at 500 °C. The average root-mean-square roughness of the grown oxide films is ∼1.2–1.4 nm compared to 0.4 nm for as-deposited metal. X-ray photoelectron spectroscopy and transmission electron microscopyconfirm the formation and thickness of the grown oxide films. The bandgap (E g) of the oxide films calculated from O 1 s electron energy loss spectra show a linear increase from 4.85 eV for pure Ta2O5 to 6.4 eV for pure Al2O3. The dielectric constant (ε ox ) calculated from capacitance–voltage (C G − V G) measurements decreases linearly from 25.7 for Ta2O5 to 7.9 for Al2O3. The interface trap density (D it ) is estimated from the frequency dispersion of capacitance–voltage (C G − V G) characteristics. The DC and radio frequency (RF) characteristics of AlxTayO/Al0.3Ga0.7N/GaN high electron mobility transistor (HEMT) devices are measured and compared with the Schottky HEMT devices (without any gate oxide). Compared to Schottky HEMT devices, AlxTayO/Al0.3Ga0.7N/GaN HEMT devices show superior DC characteristics, which helps us achieve maximum RF output power. Furthermore, the OFF-state measurements show that the AlxTayO/Al0.3Ga0.7N/GaN HEMT devices can sustain higher source-to-drain voltages, from a minimum of 88 V on pure Ta2O5 metal-oxide-semiconductor (MOS)-HEMTs to a maximum of 138 V on pure Al2O3 MOS-HEMTs before the dielectric breakdown happens, compared to a 57 V breakdown voltage on Schottky HEMT devices. An oxide variation of AlxTayO, with Al composition ratio of 0.34, shows an exceptional ION/IOFF ratio of 4 × 1011, a gate leakage current of 8 × 10−12 A/mm, a near-ideal subthreshold slope of 63.8 mV/dec, and the unity current gain frequency ( f T) of 25.6 GHz. [ABSTRACT FROM AUTHOR]

For microscale gaps, DC breakdown voltage is described theoretically and through simulation by accounting for field emission generated electrons and the subsequent ionization of neutral gas and ion-induced secondary electron emission. Here, we extend DC microscale breakdown theory to AC. Particle-in-cell (PIC) simulations show that breakdown voltage V varies linearly with gap distance d independent of frequency and the ion-induced secondary electron coefficient γ S E for d ≲ 4 μ m , where field emission dominates breakdown over ionization and avalanche. For d ≳ 4 μ m and γ S E = 0 , DC breakdown voltage increases linearly with d; for γ S E = 0.05 , DC breakdown voltage decreases to a minimum before beginning to increase at larger gap distances. For AC fields with γ S E = 0.05 , V behaves similarly to the DC case with the decrease corresponding to secondary emission occurring at higher voltages and larger gap distances with increasing frequency. At 10 GHz and γ S E = 0.05 , V resembles that of the DC case with γ S E = 0 up to ∼8 μm, suggesting that increasing the frequency effectively changes the number of ions striking the electrodes and the resulting electrons released. Phase space plots showing electron and ion velocities as a function of position across the gap show that electrons and ions are increasingly trapped within the gap with increasing frequency, reducing the number of ions that can strike the cathode and the subsequent secondary emission. Incorporating the resulting effective secondary emission coefficient for AC microscale gaps yields a simple phenomenologically based modification of the DC microscale gas breakdown equation. [ABSTRACT FROM AUTHOR]

In recent years, interest in synthetic C4F7N as a gas insulator has been growing due to its unique insulation properties and low global warming potential. In spite of this, very few studies are devoted to the analysis of the electric breakdown of C4F7N and its mixtures with other dilutants such as CO2 and N2. In the present paper, we use a two-dimensional fluid model to analyze the electrical breakdown of the atmospheric pressure C4F7N/N2 mixture. We establish the influence of the C4F7N fraction in the mixture and the cathode voltage rise rate on the breakdown voltage. We find that the ratio between the electron attachment frequency and the voltage rise rate defines the streamer parameters. Namely, if the time scale of electron attachment to C4F7N is much faster than the voltage rise rate, the plasma electronegativity of the streamer body and of its head is extremely high, and it is difficult to define exactly the streamer head location. In the opposite case of the fast rise rates, the conventional streamers with sharp heads were obtained. [ABSTRACT FROM AUTHOR]

The failure of polymeric solid insulation under transient voltages is closely associated with space charge. In this study, DC and AC field dependent conduction characteristics of epoxy resin were investigated using the space charge limited current and high voltage broadband dielectric spectrum methods. The breakdown voltages (BDVs) were examined over a wide range of DC voltage ramp rates. The results reveal a threshold effect of AC conduction loss below 600 Hz with respect to the electric field. By analyzing charge migration laws, a mobility distribution was deduced, with an upper limit of 10 − 9 m 2 V − 1 s − 1 , which is much higher than the measured DC mobility of 10 − 14 m 2 V − 1 s − 1 . A multi-mobility bipolar charge transport model was proposed by introducing the obtained mobility distribution. Compared to the single-mobility model, high-mobility carriers induce larger unblocked space charge currents for high dv/dt voltages, leading to lower values of BDV, which is consistent with experiment results. As the voltage ramp rate decreases, both simulation and experiment demonstrate higher BDVs due to the field shielding effect of homocharges. [ABSTRACT FROM AUTHOR]

Hardness of thin films is a noteworthy property in the electronic and mechanical industry and is generally observed to be dependent on the degree of roughening facilitated from surface heights' surface spatial heterogeneity at the mesoscopic observation scale. Nonetheless, owing to enhanced scale fluctuations and higher-order central moments, conventional parameters provide limitations and errors in capturing the spatial heterogeneity of surfaces. Herein, we have utilized scale-independent fractal parameters to analyze the spatial heterogeneity of surface heights in Ti1−xSixN ternary hard films deposited with varying Si doping concentrations using sputtering technique. The fractal dimension, lacunarity coefficient, Moran index, surface entropy, Otsu's separability, and fractal succolarity were computed to provide an overarching understanding of the surface heights' spatial heterogeneity. Principal component analysis was employed on the data sets to identify the parameter(s) accounting for the maximum variance and accordingly, the structure–property relation between spatial heterogeneity of surface and hardness is analyzed and discussed in the context of the fractal dimension of surface heights. The results indicate the possibility of mesoscopic surface engineering and, consequently, tuning of hardness and modulus of elasticity in Ti1−xSixN hard films by mere changing of surface spatial heterogeneity facilitated by the fractal dimension of surface heights. [ABSTRACT FROM AUTHOR]

Aramid fiber (AF)-reinforced epoxy (EP) resin composite materials are widely used in the application of insulation rod-reinforced components, but the adhesion performance between AFs and EP resin is poor, which easily leads to interfacial defects and even gradually develops into breakdown, flashover, and other faults. In this study, a simple, environmentally friendly, diverse, and highly designable layer-by-layer self-assembly modification method was adopted to assemble aramid nanofibers/SiO2 onto the surface of AFs. The modified AFs were then used to produce composite materials with EP resin. By testing the interface breakdown, flashover, and leakage current of the AF/EP resin composite materials, the influence mechanism of AF surface modification on the material interface insulation performance was studied. The results show that the insulation performance of the modified composite material first increases and then decreases with the increase in the number of assembled layers, with the maximum increase in breakdown voltage being 93.56% and the maximum increase in flashover voltage being 30.91%. [ABSTRACT FROM AUTHOR]

High breakdown voltage and exceptional robustness make β‐Ga2O3 power devices a key focus of current research. Despite growing attention to the reliability of β‐Ga2O3 devices, systematic studies are still limited, and comparative analyses between different structures remain unreported. This study presents a comparative analysis of β‐Ga2O3 Schottky barrier diodes (SBD) and p‐NiO/β‐Ga2O3 heterojunction diodes (HJD) with mesa termination through comprehensive reliability test, including high‐temperature storage, reverse recovery, surge current, and rectification characteristics. The results indicate that the SBDs outperform in high‐frequency rectification performance up to 1 MHz, whereas the HJDs demonstrate superior high‐temperature stability of 250 °C. The surge current densities of the SBD and HJD devices reach 0.88 and 0.78 kA cm−2, respectively, representing the highest values reported to date. In particular, the efficiency of both the SBD and HJD devices exceeds 95% in circuit application, with SBD excelling in high‐frequency mode and HJD performing optimally in high‐temperature conditions. This study highlights the high reliability of β‐Ga2O3 devices and provides valuable insights for the application under varied operating conditions. [ABSTRACT FROM AUTHOR]

The gate reliability of p-GaN gate high electron mobility transistors (HEMTs) was investigated in this Letter. Compared with conventional p-GaN gate HEMT, the in situ SiN cap-layer on the p-GaN layer can lift up the energy band and form a metal–insulator–semiconductor structure. With the introduction of an in situ SiN cap-layer, the DC electrical characteristics and reliability have been significantly improved. The reverse gate leakage current is reduced by 3 orders of magnitude. The threshold voltage shifts from 1.67 to 3.25 V, the on-resistances increased from 8.7 to 9.9 Ω mm, and the gate breakdown voltage is improved from 10.2 to 16.3 V. After conducting time-dependent gate breakdown measurement and predicting lifetime with a 10-year failure rate of 63%, it is calculated that the maximum allowable gate voltage increased from 6.3 to 11.4 V. The 10-year gate voltage swing has improved from 4.63 to 8.15 V. In addition, the in situ SiN HEMT exhibits good stability under high temperatures and long-term stress tests. The experimental results demonstrate that the in situ SiN cap-layer offers significant advantages in gate reliability. [ABSTRACT FROM AUTHOR]

Layered CoO2 is of great interest for its promising properties but is meta‐stable in its bulk form. CoO2 is synthesized by converting the quasi‐1D crystal structure of bulk Ca3Co2O6 via a hydrothermal treatment. The resulting nanostructures are predominantly nanoscrolls with very thin walls, which exhibit long‐term stability. A detailed structural investigation reveals that the CoO2 is found to crystallize in monoclinic form, similar to the related CaCoO2‐CoO2 misfit structure. Individual nanoscrolls are characterized electrically and show a p‐type semiconducting nature with a high current‐carrying capacity of 4·105 A cm−2 and an extremely high breakdown voltage of up to 270 kV cm−1. The results demonstrate the possibility to stabilize meta‐stable materials in low‐dimensional forms and a promising application of the nanoscrolls as interconnect in high‐voltage electronic circuitry. [ABSTRACT FROM AUTHOR]

Low‐angle bevel mesa structures are the key technological ideas needed to produce high‐quality vertical GaN devices. Nevertheless, the literature lacks sufficient information regarding the techniques that can yield the best results for obtaining the bevel angles smaller than approximately 5°.[1] Notably, for high p–n junctions NA/ND ratios, such low angles are necessary for the application of negative beveled edge termination and the efficient lowering of electric field at the surface.[1–6] In this work, the optimization of the beveled‐mesa fabrication technique for vertical GaN devices is demonstrated employing a plasma etching of the photoresist mask fabricated using a reflow process. By adjusting the resist reflow process parameters, in particular various BCl3 Cl2−1 ratios and inductively coupled plasma–reactive ion etching plasma power, a range of beveled mask angles as low as 10°–12° is achieved. However, those processes all show etching selectivity close to 1:1 between GaN and the photoresist. Even lower bevel mesa angles are reported for a novel process optimization that resulted in improving GaN to photoresist selectivity by a factor of 5–10. As a result, even smaller bevel mesa angles close to 1°–2° are able to be attained. The developed approach has the advantage of being relatively simple and cost effective. [ABSTRACT FROM AUTHOR]

One of the key elements of vertical high‐voltage GaN‐based devices is a properly designed junction termination extension (JTE) structure. One of the approaches to the fabrication of JTE structures is the use of p‐type epitaxial layers and their appropriate shaping to obtain high values of breakdown voltage. In this work, optimization of two‐zone (TZ) step‐etched JTE structures for vertical GaN power devices using technology computer aided design simulations is presented. Two constructions of the device are used, with a single‐zone (SZ‐JTE) and TZ‐JTE (TZ‐JTE) structure. The dependence of the breakdown voltage of SZ‐JTE structure is very sensitive to its thickness. The maximum breakdown voltage of 1654 V is obtained for the SZ‐JTE thickness of 110 nm. The use of a TZ‐JTE with an appropriate segment thickness ratio allows for a breakdown voltage above 75% of the theoretical value (≈1500 V) for a much wider range of JTE thicknesses and to achieve higher values of the breakdown voltage, reaching ≈96% of the theoretical value (1887 V). Finally, the performed simulations allow to map the full dependence on the thickness of the TZ‐JTE areas (2D‐map) and to determine the process window leading to the breakdown voltage above 1500 V. [ABSTRACT FROM AUTHOR]

In this study, it is aimed to examine the DC characteristics of a vertical PIN diode featuring AlGaN as the drift layers. In the investigation, observing the changes in DC characteristics with the variation of Al content (0%–4%) in the drift layers as well as its thickness is focused on. By applying AlGaN as the drift layer, the semi‐insulating properties are augmented and the detrimental background carbon impurity is reduced, leading to a reduction in the leakage current and an improvement in the breakdown voltage characteristics of the device. Room‐temperature and low‐temperature photoluminescence measurements confirm a reduction in the intensity of both yellow luminescence and blue luminescence, which can be attributed to the decrease in defect concentration. Furthermore, to minimize the occurrence of premature breakdown voltage, p‐type GaN is meticulously etched into a bevel shape, and subsequent confirmation through the utilization of a scanning electron microscope reveals an inclination of 13°. The outcome of the analysis on the DC characteristic indicates an improvement in reverse‐bias characteristics with the increase in the Al ratio in the drift layer for the 2 μm series. Furthermore, for the 20 μm Al0.04Ga0.96N, a breakdown voltage of 2540 V is recorded. [ABSTRACT FROM AUTHOR]

Herein, a DC and microwave performance of 2 μm gate length AlGaN/GaN high‐electron‐mobility transistor (HEMTs) on a Mn‐doped GaN substrate is demonstrated. The maximum drain current is 670 mA with a threshold voltage of −$-$2.5 V and with good pinch‐off characteristics. The breakdown voltage of the HEMT is ≈80 V. The HEMT shows Δ8% current collapse while referenced HEMT on a SiC substrates which is fabricated simultaneously shows large Δ30% current collapse. When the HEMT with a gate width of 100 μm is tuned for the maximum output power at 2.4 GHz with a drain voltage of 30 V, it delivers 500 mW (5 W mm−1) with the maximum drain efficiency of 54%. These output performances are in good agreement with ideal class‐A operation performance. Therefore, it is concluded that the HEMT on Mn‐doped GaN substrates is promising for future microwave and millimeter‐wave high‐power transistors. [ABSTRACT FROM AUTHOR]

In order to achieve high‐performance gallium nitride (GaN) high‐electron‐mobility‐transistors (HEMTs) capable of operating in the X‐band, a bilayer passivation technique is employed. The technique involves creating a stacked passivation layer consisting of a 20‐nm Si‐rich silicon nitride (SixN) passivation layer and a 100‐nm N‐rich silicon nitride (Si3N4) passivation layer. This effectively reduces radio frequency scattering in GaN HEMTs without compromising the breakdown voltage (BV). On the one hand, the SixN passivation layer effectively suppresses the surface states of devices, resulting in low current collapse. On the other hand, the Si3N4 passivation layer can effectively reduce gate leakage caused by the SixN passivation layer, allowing the device to reliably operate at higher voltages. Consequently, a GaN HEMTs with SixN/Si3N4 bilayer passivation achieve a low current collapse of 5% and a high BV of 157 V. The device features a current gain cutoff frequency (fT) and maximum oscillation frequency (fmax) of 57.9 and 96.8 GHz, respectively. Additionally, it exhibits excellent radio frequency performance in the X‐band, with an output power density (Pout) of 13.7 W mm−1 and power added efficiency of 60.8% at a drain voltage (VD) bias of 50 V. [ABSTRACT FROM AUTHOR]

This article presents a study on the improvement of the gate robustness and reliability of p‐GaN gate high‐electron‐mobility transistors (HEMTs) by doping profile engineering and by performing a thermal treatment. The reduction of the p‐doping concentration at the Schottky interface using a graded magnesium (Mg) profile in the p‐GaN layer and introducing a top Si‐GaN cap layer is proposed, combined with a high‐temperature anneal step after the gate patterning. The results show that the proposed approach enhances the gate breakdown voltage, reduces the gate leakage current, and increases the time to failure under constant voltage stress, while ensuring stable dynamic behavior and off‐state leakage performance under high‐voltage stress. [ABSTRACT FROM AUTHOR]

As‐grown GaN buffer layers have a significant electron concentration, which causes an increase in leakage current and a decrease in the breakdown voltage, VBR, of GaN High Electron Mobility Transistors (HEMTs). To prevent this, deep acceptor traps of density, NAT, are added to the GaN layer during growth. While a study on the effect of NAT on VBR is available in the literature, that on the effect of NAT on contact resistance, Rc, of source/drain contacts is lacking. Herein, the following is established using technology computer‐aided design simulations calibrated with measured current–voltage characteristics of ungated AlGaN/GaN structures: 1) Rc increases significantly with NAT and with the depth of the trap level from the conduction band. For trap level 2.5 eV below the conduction band, Rc doubles for an increase in NAT from 1 × 1016 to 5 × 1017 cm−3. 2) The variation of Rc with temperature is non‐monotonic. Over a temperature range of 300–450 K, Rc is nearly constant with temperature for NAT = 1 × 1016 cm−3 and decreases by 20% for NAT = 5 × 1017 cm−3, when traps are 2.5 eV below the conduction band. Also, the degradation of the transfer and output characteristics of GaN HEMTs due to a notable increase in Rc due to NAT is investigated. [ABSTRACT FROM AUTHOR]

P‐type NiOx is employed for the fabrication of NiO/Ga2O3p–n diode. Addressing the challenge of low hole mobility in NiOx, an extensive investigation into the impact of oxygen stoichiometry engineering in NiOx is conducted. The meticulous optimization of the O2/Ar ratio to 30% during the sputtering process results in significant improvements, notably achieving enhanced hole mobility of 1.61 cm2 V−1 s. It leads to a low specific on‐resistance of 2.79 mΩ cm2 and a high rectification ratio of ≈1011, underscoring the efficacy of recombination transport mechanism driven by enhanced hole mobility. Detailed band alignment analysis between NiOx and Ga2O3 reveals a small band offset, with a valence band offset of 2.47 eV and a conduction band offset of 1.70 eV. It suggests a tailored modification of band alignment through the engineering the oxygen stoichiometry in NiOx, facilitating enhanced recombination conduction. The device exhibits a superior breakdown voltage (Vb) of 2780 V and a notable Baliga's figure of merit (BFOM) of 2.77 GW cm−2, surpassing the SiC unipolar figure of merit. The insights gained from this work are expected to inform future designs and optimizations of high‐performance Ga2O3 electronic devices. [ABSTRACT FROM AUTHOR]

The Na‐flux method is expected to be a key GaN growth technique for obtaining ideal bulk GaN crystals. Herein, the structural quality of the latest GaN crystals grown using the Na‐flux method and, for the first time, the characteristics of a vertical transistor fabricated on a GaN substrate grown using this method are discussed. Vertical transistors exhibit normally off operation with a gate voltage threshold exceeding 2 V and a maximum drain current of 3.3 A during the on‐state operation. Additionally, it demonstrates a breakdown voltage exceeding 600 V and a low leakage current during off‐state operation. It is also described that the variation in the on‐resistance can be minimized using GaN substrates with minimal off‐angle variations. This is crucial for achieving the large‐current chips required for future demonstration of actual devices. In addition, the reverse I–V characteristics of the parasitic p–n junction diode (PND) structures indicate a reduction in the number of devices with a significant leakage current compared to commercially available GaN substrates. Finally, a circular GaN substrate with a diameter of 161 mm, surpassing 6 inches, grown using the Na‐flux method is demonstrated, making it the largest GaN substrate aside from those produced through the tiling technique. [ABSTRACT FROM AUTHOR]

The development of processes for epitaxial growth of vertical gallium nitride (GaN) drift layers enabling 1.2 kV breakdown voltage on low‐cost sapphire substrates is presented in comparison to GaN bulk substrates. The targeted blocking capability demands drift layers with a thickness of 10 μm and low but controllable n‐type doping. Using a growth rate of 2.5 μm h−1 the concentration of unintentionally incorporated carbon is sufficiently low to adjust the n‐type carrier concentration to ≈1 × 1016 cm−3 for all types of substrates. To assess GaN drift region properties in terms of forward bias conductivity and reverse bias blocking strength, a quasi‐vertical p‐n‐diode structure is utilized. Bow reduction of GaN‐on‐sapphire structures is achieved using a stealth laser scribing process. Breakdown voltages higher than 1600 V and a specific on‐state resistance as low as 0.7 mΩ cm2 are obtained with diodes fabricated on GaN substrates. Similar structures grown on sapphire show breakdown voltages of about 1300 V due to higher levels of current leakage. Comparing different types of substrates, a direct correlation between dislocation density in the drift layer with the leakage current in p‐n diodes is deduced. [ABSTRACT FROM AUTHOR]

Electrolytic capacitors are known to be fast devices with very low time constant and able to deliver high power. This class of capacitors is then an interesting technology to power miniaturized embedded electronics for Internet of Things applications. However, the current electrolytic capacitor suffers from its bulky size that does not fit with the miniaturization. To solve this issue, a proof‐of‐concept consisting of miniaturizing an electrolytic capacitor based on tantalum materials to give rise to a new class of electrolytic micro‐capacitors is proposed. To reach this ambitious objective, thin films (<100 nm) of tantalum metal (Ta), tantalum nitride (TaN), and tantalum oxide (Ta2O5) are deposited on a Si substrate by sputtering deposition method. After a careful optimization of the deposition parameters, Ta/Ta2O5 and TaN/Ta2O5 electrodes (Ta and TaN ≈45 nm and Ta2O5 ≈25 nm) and study their behaviors when biased at high voltage (>20 Volts) in aqueous electrolyte are produced. The Ta/Ta2O5 and TaN/Ta2O5 interfaces when the electrode is polarized near and beyond the breakdown voltage of the dielectric layer are carefully investigated. Polarizing the electrodes beyond the breakdown voltage are shown to result in anodization‐like mechanisms. In the case of the TaN/Ta2O5 electrode, an N‐rich porous layer grew within the Ta2O5 layer as polarization increased. A comparative study on the 2 stacked layers electrodes with different compositions (Ta/Ta2O5 and TaN/Ta2O5) but similar thicknesses (45/25 nm) is carried out: both electrodes show excellent capacitance retention of over 90% over 300 000 cycles. The frequency behavior of Ta/Ta2O5 and TaN/Ta2O5 electrodes shows that both are potential candidates in electrolytic micro‐capacitors for powering miniaturized electronics. [ABSTRACT FROM AUTHOR]

This paper explores the microfabrication process of plasma reactors, from the production of micro-reactors to the addition of through silicon vias (TSV) using proprietary etching techniques and on site cleanroom facilities. The investigation focuses on both newly fabricated closed and open-cavity micro-hollow cathode discharge (MHCD) reactors, with particular emphasis on electrical and optical diagnostics to characterize their plasma properties. All experiments, including those on closed-cavity reactors, were specifically conducted for this study under identical conditions to ensure a rigorous comparison between reactor types. When electrical diagnostics were carried out in helium at various pressures, interesting phenomena such as the evolution of voltage breakdown were observed. These diagnostics also provided new insights into the impact of surface electrode and overall geometry properties and pressure on reactor performance. Additional investigation into instability mechanisms revealed self-pulsing oscillations, with different reactor types having different oscillation amplitudes for similar operating conditions. Optical emission spectroscopy (OES) emerged as a strong tool for spatial plasma analysis, revealing consistent gas temperature distributions across reactor diameters. The Inglis-Teller series provided an estimate of the upper limit of electron density, while the Stark broadening analysis of H α offered valuable insights into electron density variations, particularly in the self-pulsing regime. [ABSTRACT FROM AUTHOR]

To improve the dielectric strength in vacuum, spark conditioning through repetitive breakdowns by AC or impulse voltage is an effective method. AC conditioning at commercial power frequencies has been widely used due to its cost‐effectiveness, but the breakdown voltage after AC conditioning is generally lower compared to impulse conditioning. We have confirmed that multiple breakdowns occur successively in a half cycle of AC voltage application. It is considered that the multiple breakdowns are harmful for conditioning and triggered due to the previous breakdown in the same half cycle. In this paper, we discuss dielectric strength improvement by high frequency AC conditioning and how the multiple breakdowns are induced. We experimentally confirmed that the AC conditioning effect is improved by increasing the frequency of AC voltage for different applied AC conditioning voltages in a sphere‐plane electrode system. We focused on the breakdown position from the light emission images during AC conditioning to investigate whether the multiple breakdowns were induced or affected by the previous breakdown. We found that the multiple breakdowns occurred close to the previous breakdown position. The multiple breakdowns would be induced by the collision of metal particles due to the previous breakdown with the counter electrode. These breakdowns do not contribute to removing protrusion and would lead to damage to the electrode surface. The increasing frequency of AC conditioning would suppress the multiple breakdowns and improve the dielectric strength in vacuum. © 2024 The Author(s). IEEJ Transactions on Electrical and Electronic Engineering published by Institute of Electrical Engineers of Japan and Wiley Periodicals LLC. [ABSTRACT FROM AUTHOR]

A pressure scaling law for the partial discharge inception voltage (PDIV) of wedge-shaped, dielectric-bounded gas gaps is derived and experimentally validated. The investigated prototypical electrode geometry is of relevance in a number of practical applications, such as contacting enameled wires in electric motors or transformers. The derived pressure scaling law is of particular interest for electric propulsion in aviation systems. The results show that the PDIV can be accurately parametrized from first principles as a function of the scaling parameter p ⋅ s / ε r , where p is the gas pressure, s is the thickness of the insulating coating and ɛ r its relative dielectric permittivity. Previously published empirical relationships between the PDIV and pressure are shown to be local approximations of the presented general scaling law. In particular, the often assumed linear relation of PDIV with pressure is shown to not be generally valid. [ABSTRACT FROM AUTHOR]

The heat dissipation optimization process is a crucial element in high power high electron mobility transistor (HEMT) components fabricated using the Gallium Nitride grown on silicon (Si) substrate. In this study, the Si substrate is thinned from 1000 to 600 µm, and then the partial device area (under the HEMT two dimension (2D electron concentration gas channel) is etched to 20 µm by a deep etching system. After, three different materials are utilized to fill the gap. There are electroplate copper sheets, silver paste, and copper paste. Afterward, the electrical properties and thermal management of the device are compared before and after the implementation of the heat dissipation process. The horizontal breakdown voltage of the gate and drain at 10 µm distance of copper paste is increased to 430 V compared to 405 V before the heat dissipation process. More importantly, the surface temperature of the device dropped approximately from 58 to 38 °C and the percentage drop in output current is reduced from 10.18% to 5.23%. [ABSTRACT FROM AUTHOR]

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Significant efforts are devoted to optimizing the efficiency of triboelectric energy harvesting systems, particularly through the design of an advanced power management system (PMS) for Triboelectric Nanoenerators (TENGs). A critical aspect of PMS is the design and control of switches. However, existing switches face significant limitations. For spark switches, precise control cannot be achieved, and electronic switches can only operate at voltages below several hundred volts which is limited by the risk of electrical breakdown. To address these limitations, a hybrid electronic‐spark switch power management system (HESS) is proposed. HESS changes the connection of capacitors from parallel to series by deploying a maximum voltage tracking switch components at the peak voltage point, resulting in a much‐elevated voltage level to activate the spark switch. This approach achieves precise control of the spark switch for the first time and significantly reduces the operating voltage of electronic switches. Through simulation and experimental verification, HESS achieves the control at a voltage level of 1.8 kV for spark switch, with an electrical component breakdown voltage of only 450 V. The power density of the HESS is 29.8 mW Hz−1 m−2, which is a new record for electronic switches. [ABSTRACT FROM AUTHOR]

We report high-Al-composition (HAC) Al0.51Ga0.49N vertical power Schottky barrier diodes (SBDs) on sapphire substrates grown by metal organic chemical vapor deposition. The fabricated vertical HAC AlGaN-on-sapphire SBDs exhibit a low turn-on voltage of 1.31 V, a high on/off ratio of ∼107, a low ideality factor of 1.35, and a high breakdown voltage of 662 V. [ABSTRACT FROM AUTHOR]

In high-power switching applications such as electric grids, transportation, and industrial electronics, power devices are supposed to have kilo-voltage (kV) level blocking capability. In this work, 1200-V gallium nitride (GaN) lateral field-effect rectifiers (LFERs) are demonstrated. The GaN-on-sapphire epitaxial structure is adopted to prevent vertical breakdown. To address electric field crowding, a p-GaN/AlGaN/GaN junction termination extension (JTE) is embedded in the anode region of the LFER. Comparing to the conventional LFER (Conv-LFER) fabricated on the same wafer, the JTE-anode LFER (JTE-LFER) achieves an improved breakdown voltage (>2.5 kV) and a lower dynamic ON-resistance (RON). The proposed p-GaN/AlGaN/GaN JTE offers a semiconductor-based solution (contrasted to the dielectric-based solution, i.e., field plate) to mitigate the high electric field, which is highly desirable for wide bandgap semiconductor power devices as it enhances the dielectric reliability. [ABSTRACT FROM AUTHOR]

In this Letter, we present a p-GaN gate enhancement-mode GaN-on-Si high-electron mobility transistor fabricated using Mg-acceptor re-passivation realized through ammonia plasma treatment. The gate-to-source and gate-to-drain access regions of the device were treated with ammonia plasma using a plasma-enhanced chemical vapor deposition system, resulting in the formation of a high-resistivity GaN cap layer. The fabricated device has a high threshold voltage (VTH) of 2.0 V and a low gate reverse leakage current (IGR) of 10−11 A/mm. A breakdown voltage (BVOFF) of 670 V together with a specific on-resistance (Ron,sp) of 0.87 mΩ cm2 was obtained in a device with LGD = 6 μm. The measured dynamic on-resistance (Ron,d) at a quiescent drain voltage (Vds,q) of 600 V with a stress time of 10 and 120 s is 1.06 and 1.34 times of the static on-resistance (Ron,s), respectively. Good thermal stability of VTH and gate current IG were observed after a thermal stress at 175 °C for 100 h. The developed fabrication techniques exhibit a great potential to be applied into GaN power transistors. [ABSTRACT FROM AUTHOR]

In high-power switching applications such as electric grids, transportation, and industrial electronics, power devices are supposed to have kilo-voltage (kV) level blocking capability. In this work, 1200-V gallium nitride (GaN) lateral field-effect rectifiers (LFERs) are demonstrated. The GaN-on-sapphire epitaxial structure is adopted to prevent vertical breakdown. To address electric field crowding, a p-GaN/AlGaN/GaN junction termination extension (JTE) is embedded in the anode region of the LFER. Comparing to the conventional LFER (Conv-LFER) fabricated on the same wafer, the JTE-anode LFER (JTE-LFER) achieves an improved breakdown voltage (>2.5 kV) and a lower dynamic ON-resistance (RON). The proposed p-GaN/AlGaN/GaN JTE offers a semiconductor-based solution (contrasted to the dielectric-based solution, i.e., field plate) to mitigate the high electric field, which is highly desirable for wide bandgap semiconductor power devices as it enhances the dielectric reliability. [ABSTRACT FROM AUTHOR]

In this work, the effect of offset channel length (Loffset) and the dielectric layer thickness (d) on the InSnO/InGaZnO (ITO/IGZO) dual-active-layer (DAL) high-voltage thin-film transistors (HV-TFTs) is systematically investigated. The characteristics of the DAL HV-TFTs resemble that of GaN high electron mobility transistors, wherein the breakdown voltages (VBD) reach saturation at a certain Loffset, and the on-resistance (Ron) linearly increases with Loffset. The linear fitting of Ron vs Loffset indicates that d has a multifaceted impact on the performance of HV-TFTs. In addition to its theoretical role in transistor models, d also influences the channel doping concentration and sidewall deposition issues in practical devices. The DAL HV-TFT with a 30-nm Al2O3 gate dielectric achieves a remarkable VBD of 450 V, the highest figure of merit of 118.2 kW/cm2, and a positive threshold voltage of 3.65 V. Both experiments and simulations indicate that the breakdown occurs within the semiconductor channel, paving the way for further improvement of the performance. [ABSTRACT FROM AUTHOR]

This work investigated the single-event effects (SEE) of NiO/β-Ga2O3 heterojunction diodes (HJDs) irradiated by 1.86 GeV tantalum ions with linear energy transfer over 80 MeV cm2/mg. The HJDs exhibited radiation responses with the early single-event leakage current (SELC) degradation until the fatal single-event burnout (SEB) failure, which was far below their breakdown voltages. Meanwhile, the surface morphology revealed the SELC damage expressed as burnout of topside NiO and metal stacks, while the SEB damage was observed as a burned hole in the β-Ga2O3 epitaxial layer. According to technology computer aided design simulations, the thicker p-type region in HJDs could further alleviate the electric field crowding effect exacerbated by the heavy-ion strike because of the extension of charge distribution in the p-type region. The SEB threshold was raised to 250 V by thickening the NiO layer to 300 nm. As for the SELC degradation process along with the burnout of topside stacks in HJDs, we supposed the probable reason was the intolerance of NiO to the high electric field under the SEE. This paper analyzed the SEE mechanism in β-Ga2O3 diodes and paved the way for heavy-ion irradiation hardening. [ABSTRACT FROM AUTHOR]

ABSTRACT This study investigates discharge phenomena in suspended droplets using needle–needle electrodes. By employing ultrasonic suspension technology for noncontact droplet suspension and high‐speed cameras for capturing time‐resolved discharge images, the study examines the impact of droplets on discharge characteristics and morphology. Results show that droplets alter the electric field distribution, affecting discharge paths. Low‐conductivity droplets hinder discharge, causing deflection or changes in the discharge channel, whereas high‐conductivity droplets act as suspended electrodes, facilitating discharge channel formation, reducing breakdown voltage and shortening the establishment time. Droplets transition from ellipsoid to flat and back during discharge, with high‐conductivity droplets potentially undergoing liquid explosion. These findings are crucial for designing high‐voltage equipment in liquid‐contaminated environments. [ABSTRACT FROM AUTHOR]

For the past few decades, metal–oxide–semiconductor field-effect transistors (MOSFETs) have been the most important application in IC circuits. In certain circuit applications, the breakdown voltage and specific on-resistance serve as key electrical parameters. This article introduces a readily accessible approach to enhance the source–drain breakdown voltage (BVDS) of MOSFETs based on the Bipolar-CMOS-DMOS (BCD) platform without extra costs. By attentively refining the process steps and intricacies of the doping procedures, the breakdown voltages of NMOS and PMOS experienced increments of 3.4 V and 4.6 V, translating to enhancements of 31.5% and 50.3%. Parallel simulations offer insightful mechanistic explanations through simulation tools, facilitating superior outcomes. This initiative lays significant groundwork for the advancement of a comprehensive BCD process development framework. [ABSTRACT FROM AUTHOR]

I-line stepper is widely used in large scale device manufacturing with limited achievable critical dimension by itself. With the aid of the spacer sidewall, the critical dimension can be further shrunk down. Spacer sidewall aided process necessitates an additional deposition-etching process, which inevitably results in process related damage under the gate. This paper proposes an optimized spacer sidewall aided gate patterning procedure for 0.15 μm GaN High Electron Mobility Transistors (HEMTs) fabrication. The process is proved to be effective in improving device performance compared to conventional sidewall process by keeping first Si-rich SiN passivation layer integrity at the gate edge. Interface trap density (Dit) and mobility were extracted for both conventional sidewall process and the optimized one with different passivation layers at the gate edge, demonstrating a lower Dit and higher mobility using the optimized process with enhanced device performances, such as higher current, breakdown voltage, and stress state characteristics, compared to the conventional process, which is promising for mass production of 0.15 μm GaN HEMTs. [ABSTRACT FROM AUTHOR]

Metal‐organic chemical vapor deposition growth of vertical GaN PN structures on 6″ Si(111) substrates enabling a 1200 V breakdown voltage is demonstrated. Thanks to an optimized buffer structure utilizing island growth in an AlN/Al0.1Ga0.9N superlattice, the threading dislocation density is drastically reduced, and sufficient compressive stress is incorporated in active GaN layers to compensate for the thermal mismatch. Crack‐free PN structures with drift layer thicknesses up to 7.4 μm are realized with a threading dislocation density of ≈5 × 108 cm−2 and an absolute wafer bow <50 μm. Quasi‐vertical PN diodes reveal a linear increase in the breakdown voltage with the drift layer thickness with an average breakdown field of ≈1.6 MV cm−1. Additionally, the leakage current is shown to decrease monotonically as the drift layer thickness increases. For a 7.4 μm thick drift layer with a net ionized donor concentration of 0.9 × 1016 cm−3, a high breakdown voltage of 1200 V, a low specific on‐resistance of 0.4 mΩ cm−2, and a low leakage current of 10−4 A cm−2 (at a reverse bias of 650 V) are obtained. These results demonstrate the great potential of cost‐effective vertical GaN‐on‐Si power devices operating in the kilovolt range. [ABSTRACT FROM AUTHOR]

Herein, AlGaN/GaN lateral diode with the Schottky‐Metal‐Insulator‐Semiconductor (MIS) cascode anode (CALD) to optimize forward voltage drop (VF) and reverse leakage current (ILEAK) trade‐off is proposed. In the CALD device, a normally‐on Ni/HfO2/AlGaN MIS‐controlled channel as well as a lateral Ni/GaN Schottky contact are cascoded at the anode. The designed normally‐on MIS‐controlled channel has high electron concentration at forward bias and prevents high electric‐field at reverse bias, which ensure both low VF and low ILEAK. Meanwhile, the Ni/GaN Schottky contact with a high Schottky barrier height further suppresses the ILEAK. As a result, the fabricated CALD demonstrates an optimized VF–ILEAK trade‐off relationship, including a low VF of 1.6 V and a low ILEAK of 5.2 × 10−8 A mm−1 (at reverse voltage of 400 V), together with a high breakdown voltage (BV) >700 V. These high performances suggest that the CALD can be a promising candidate for GaN power diode applications requiring a better VF–ILEAK trade‐off. [ABSTRACT FROM AUTHOR]

Wide-bandgap semiconductors have been envisioned for power electronics applications because of their ability to operate at higher temperatures and higher applied voltages without breakdown. However, the presence of defects may cause device failure, necessitating a comprehensive understanding of material defects. This review provides a fingerprint of known defects in three envisioned semiconductors for power electronics: 4H-SiC, GaN, and β-Ga2O3. Via a detailed discussion of defects—the origins of electrically active charge traps—through their activation energies and capture cross-sections, we provide important insights into defect parameter distributions. This review not only serves as a reference but also offers a strategic roadmap for distinguishing between similar defects. Such knowledge is key for the development of more robust and efficient power electronic devices that can fully exploit the potential of wide-bandgap semiconductors. [ABSTRACT FROM AUTHOR]

Defining the copper-based catalysts that are responsible for the catalytic behaviour of oil-paper insulation systems and implementing effective regulation are of great significance. Accelerated ageing experiments were conducted to reveal variations in copper scales and deterioration in insulation properties. As ageing progressed, TEM images demonstrated that copper species were adsorbed and aggregated on the fibre surface in the form of nanoparticles (NPs). The scale of NPs exhibited a continuous increase, from 27.06 nm to 94.19 nm. Cu(I) and Cu(II) species were identified as the active sites for inducing intense free radical reactions, which significantly reduced the activation energy, making the insulating oil more susceptible to oxidation. The role of the antioxidant di-tert-butyl-p-cresol (DBPC) in extending the insulation life was regulated by determining the optimal addition time based on variations in the interfacial tension. After the second addition of DBPC, the ageing rates of the dissipation factor, acidity, micro-water and breakdown voltage in the Cu+DBPC group decreased by 28.8%, 43.2%, 52.9% and 46.7%, respectively, compared to the Cu group. This finding not only demonstrates the crucial role of DBPC in preventing the copper-based catalyst-induced oxidation of insulating oil, but also furnishes a vital foundation for enhancing the long-term stability of transformer insulation systems. [ABSTRACT FROM AUTHOR]

This study examines and compares the breakdown and aging properties of five insulating liquids. Additionally, the influence of different voltage polarities on these properties was analyzed to investigate the effect of aging on polarity behavior under lightning impulse voltage in a semi-uniform field. The results were compared to standardized AC breakdown tests. After 2330 h and 4350 h of aging, changes were observed in key aging indicators such as water content (both absolute and relative), total acid number, and color across all liquids. Viscosity increased by up to 10% in natural esters. Notably, the rise in water content due to aging was concerning only for mineral oil, exceeding 20%. The impact of aging on breakdown voltage varied depending on the voltage type and polarity. Aging had the least effect under negative lightning impulse voltage, while the synthetic ester MIDEL 7131 exhibited the most significant reduction in breakdown voltage under positive lightning impulse voltage, dropping by over 24%, from more than 560 kV to 428 kV. In contrast, mineral oil showed only a 3% decrease. For the other liquids, the most pronounced reduction in breakdown voltage due to aging occurred under AC voltage, with natural esters showing a 17% decline, synthetic esters 26%, and mineral oil experiencing a 38% reduction. [ABSTRACT FROM AUTHOR]

This study treats the effect of hydrolytic aging on breakdown voltage of polyesterimide employed in rotating electrical machine windings. The aging was carried out at 93% relative humidity and 40℃ in a climatic chamber. The samples were made as twisted pair copper conductors covered by a thin layer (35 µm) of polyesterimide. The duration of aging is 12000 h (500 days). The values of breakdown voltage were analyzed statistically using Weibull model. The insulation was characterised by FTIR. The study shows modifications of breakdown voltage versus aging time. The decrease is attributed to the increase in free volume leading to the raise in mean free path of charge carriers. While the raise is awarded to the arrangement of the structure. The shape parameter of Weibull plots alters versus aging time. The shortening is attributed to the raise of defect sizes. Whereas the augmentation is allotted to the arrangement of molecular structure. During the tests of dielectric failure, space charge can be formed and affect breakdown voltage. The results of FTIR show the disappearance of several absorbance peaks highlighting the degradation of the material. The degradation is done by the decomposition of imide bond and ester bond at the polyesterimide-copper interface. [ABSTRACT FROM AUTHOR]

In order to improve the off-state and breakdown characteristics of double-channel GaN HEMTs, an ultra-thin barrier layer was chosen as the second barrier layer. The strongly polarized and ultra-thin AlN sub-barrier and the InAlN sub-barrier are great candidates. In this article, the two epitaxial structures, AlGaN/GaN/AlN/GaN (sub-AlN) HEMTs and AlGaN/GaN/InAlN/GaN (sub-InAlN) HEMTs, were compared to select a more suitable sub-barrier layer. Through TEM images of the InAlN barrier layer, the segregation of In components can be seen, which decreases the mobility of the second channel. Thus, the sub-AlN HEMTs have a higher output current density and transconductance than those of the sub-InAlN HEMTs. Because the high-quality AlN barrier layer shields the gate leakage current, a 294 V breakdown voltage was achieved by the sub-AlN HEMTs, which is higher than the 121 V of the sub-InAlN HEMTs. The current gain cut-off frequency (fT) and maximum oscillation frequency (fmax) of the sub-AlN HEMTs are higher than that of the sub-InAlN HEMTs from low to high bias voltage. The power-added efficiency (PAE) and output power density (Pout) of the sub-AlN HEMTs are 57% and 11.3 W/mm at 3.6 GHz and 50 V of drain voltage (Vd), respectively. For the sub-InAlN HEMTs, the PAE and Pout are 41.4% and 8.69 W/mm, because of the worse drain lag ratio. Thus, the Pout of the sub-AlN HEMTs is higher than that of the sub-InAlN HEMTs. [ABSTRACT FROM AUTHOR]

The study presents a novel Silicon on Insulator (SOI) Metal–Semiconductor Field-Effect Transistor (MESFET) with an Aluminum Nitride (AlN) layer under the drain electrode, aiming to enhance the breakdown voltage and overall performance. AlN, known for its large breakdown field and bandgap, is utilized to modify the electric field distribution, thereby reducing parasitic capacitances (Cgs and Cgd) and improving frequency specifications. The AlN layer extends from the drain to the gate side, altering the electric field and depletion region in the gate area near the drain, resulting in a higher breakdown voltage. Simulation results reveal that the proposed AlN-SOI MESFET structure outperforms the conventional structure. Breakdown voltage increases from 22 to 47 V, attributed to the AlN layer's effect on electric field distribution. The study also analyzes parameters such as output power density, drain current, heating effect, carrier concentration, potential distribution, and parasitic capacitances. The AlN-SOI MESFET exhibits improved characteristics, including reduced self-heating, lower parasitic capacitances, higher transducer gain, and superior performance compared to existing structures. The proposed device demonstrates the potential for high-frequency and high-voltage applications, making it a promising choice for electronic applications. The fabrication process and ethical considerations are also discussed. [ABSTRACT FROM AUTHOR]

During the construction of cable joints, three common defects may occur on the XLPE surface: scratches, moisture exposure, and adhered contaminated particles. To evaluate the impact of these defects on joint performance, this paper establishes a sheet model of XLPE insulation in cable joints to analyze the changes in the electric field under different defects and explore the influence of different defects on the electric field and breakdown voltage. Results of the study reveal that the electric field at the scratch site on XLPE produces severe distortion, being 1.6 times that of non-scratch areas. When exposed to moisture, the more conductive impurities present in the adhered contaminated water on the XLPE surface, the higher the conductivity of the contaminated water, thereby increasing its conductive performance and the electric field strength, which is 1.22-1.4 times that of the non-moist interface. When particles adhere to the XLPE surface, severe distortion occurs at the particle-interface electric field, approximately 1.5 times that of the defect-free interface. Scratches have the most significant impact on the electric field of XLPE insulation. Experimental results also demonstrate that the breakdown voltage without defects is 129.6 kV, while the breakdown voltage with scratch defects is 59.1 kV, moisture defects is 69.7 kV, and particle contamination defects is 59.2 kV, with scratches having the most significant impact on the breakdown voltage of XLPE insulation. These findings provide important insights into the influence of different defects on the insulation performance of cable joints. [ABSTRACT FROM AUTHOR]

This study presents a β-Ga2O3 Schottky barrier diode (SBD) with a Mg current blocking layer (Mg-CBL) fabricated via the Mg-doped spin-on-glass (Mg-SOG) technique, affording a surface roughness damage-free thermal doping process. The proposed technique improves the breakdown voltage (BV) of the β-Ga2O3 SBD from 580 to 2200 V and marginally increases the specific on-resistance from 4.0 to 4.8 mΩ cm2, yielding a notable power figure of merit exceeding 1 GW/cm2. The Mg-CBL effectively captures the electrons and mitigates the electric field, leading to a significant increase in BV and slight decrease in the forward current loss. The temperature-dependent I–V curves reveal that the reverse saturation current decreases owing to the physical mechanism of the Mg-CBL structure. Moreover, the Gaussian distribution model is applied to correct the Schottky barrier inhomogeneity stemming from the Mg-CBL. The results illustrate the promising potential of the Mg-CBL fabricated via the Mg-SOG technique for yielding high-performance β-Ga2O3 SBDs. [ABSTRACT FROM AUTHOR]

Voltage breakdown in sub-transmission networks resulting from an increase in load demand can be addressed by incorporating distributed generation (DG) units such as hydro, wind, photovoltaic, and geothermal in some buses. This approach can lower power losses and the price of the primary generated energy while increasing network dependability and efficiency. Feasibility of dispersed generation integration & its effect on sub-transmission system operation were investigated using Ben Walied 66 kV sub-transmission network in Libya as a state. This study presents modified particle swarm optimization (MOPSO) technique to select the best option with dispersed generation units under various operating conditions. The Ben Walied 66 kV sub-transmission network has been subject of effects research on both normal operation and load growth scenarios. The goal of this study was to find best way to adjust penetration level of the three DGs in response to changes in the network loading. Three DG units have been refitted to study the effects on test networks for sub-transmission, which consist of 30 and 51 buses. A comparison analysis shows that while the ideal locations of DG units remain constant with load expansion, the optimal solution for the penetration level percentage of three DG units was boosted by new optimal sizes. Research has been done on how the power factor of distributed generators (DGs) affects the practical performance of 66 kV networks in steady-state conditions. The integration of DG units in regulating these losses and voltage variations is demonstrated by the results, which indicate that the ideal solution for DG unit’s power factor was at a value of 0.87 lagging. [ABSTRACT FROM AUTHOR]

The diketopyrrolopyrrole-based polymer (DPPT-TT) has been employed in organic power field effect transistors due to its exceptional off-state breakdown performance. The impact of organic semiconductor layer thickness on the breakdown performance has not been explored. In this study, we investigate the impact of DPPT-TT layer thickness on the breakdown voltage (BV) by fabricating organic field effect transistors (OFETs) with various DPPT-TT layer thicknesses. Our findings reveal that the devices' BV is a strong function of DPPT-TT layer thickness, and reducing the DPPT-TT layer thickness from 68 to 15 nm results in a decrease in BV from 291 to 86 V, attributed to the two-dimensional (2D) electric field crowding effect. An analytical model utilizing the 2D Poisson equation reveals an electric field at the DPPT-TT layer's surface. Thinner DPPT-TT layer exhibits larger electric field peak, leading to premature breakdown near the drain electrode. The relationship between breakdown electric field and DPPT-TT layer thickness was established by fitting the experimental data to the model, revealing an average BV error of only 8.8%. This phenomenon is validated to be ubiquitous in polymer based OFETs via DPPT-TT-based and P3HT-based devices. According to the proposed model, this 2D electric field crowding effect can be mitigated by adjusting the dielectric layer thickness (tD) and/or the dielectric material. [ABSTRACT FROM AUTHOR]

In this paper, a ∼2 nm in situ SiN cap layer on AlGaN barrier layer is grown, which is revealed to be crystalline using high-resolution cross-sectional transmission electron microscopy. Benefitting from superior interface quality of epitaxial crystalline SiN/AlGaN interface, the gate diodes with in situ SiN cap layer feature lower interface trap state density than that with GaN cap layer. By comparing the GaN high electron mobility transistors (HEMTs) with the conventional GaN cap layer, the GaN HEMTs with in situ SiN cap layer exhibit improved device performance, showing higher electron mobility, higher drain current, larger on/off current ratio, and higher transconductance. For breakdown characteristics, the devices with in situ crystalline SiN cap layer show prominent advantages over the GaN cap layer with a 30% breakdown voltage increase to 810 V. [ABSTRACT FROM AUTHOR]

The etching of p‐GaN requires extremely strict control over etching depth and morphology; otherwise, it will result in poor electrical characteristics. This work uses ALD(Atomic layer deposition) in situ N2 plasma and postanneal‐assisted passivation to effectively recover the electrical properties degraded by p‐GaN etching. Compared to unpassivated devices, this approach eliminates surface oxygen bonds, recovering drain current from 10 to 126 mA mm−1, reducing gate leakage by an order of magnitude, achieving an ON/OFF current ratio exceeding 108, a breakdown voltage of 930 V at 1 μA mm−1, and effectively suppressing current collapse. [ABSTRACT FROM AUTHOR]