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Improved gate reliability of normally off p-GaN gate HEMTs with in situ SiN cap-layer.

Authors :
Zhang, Ga
Zhao, Shenglei
Song, Xiufeng
Yu, Longyang
Sun, Xuejing
Cao, Chuangzhe
You, Shuzhen
Liu, Zhihong
Hao, Yue
Zhang, Jincheng
Source :
Applied Physics Letters. 11/4/2024, Vol. 125 Issue 19, p1-5. 5p.
Publication Year :
2024

Abstract

The gate reliability of p-GaN gate high electron mobility transistors (HEMTs) was investigated in this Letter. Compared with conventional p-GaN gate HEMT, the in situ SiN cap-layer on the p-GaN layer can lift up the energy band and form a metal–insulator–semiconductor structure. With the introduction of an in situ SiN cap-layer, the DC electrical characteristics and reliability have been significantly improved. The reverse gate leakage current is reduced by 3 orders of magnitude. The threshold voltage shifts from 1.67 to 3.25 V, the on-resistances increased from 8.7 to 9.9 Ω mm, and the gate breakdown voltage is improved from 10.2 to 16.3 V. After conducting time-dependent gate breakdown measurement and predicting lifetime with a 10-year failure rate of 63%, it is calculated that the maximum allowable gate voltage increased from 6.3 to 11.4 V. The 10-year gate voltage swing has improved from 4.63 to 8.15 V. In addition, the in situ SiN HEMT exhibits good stability under high temperatures and long-term stress tests. The experimental results demonstrate that the in situ SiN cap-layer offers significant advantages in gate reliability. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00036951
Volume :
125
Issue :
19
Database :
Academic Search Index
Journal :
Applied Physics Letters
Publication Type :
Academic Journal
Accession number :
180763021
Full Text :
https://doi.org/10.1063/5.0237694