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Summary form only given. We have demonstrated an integrated optoelectronic MCM that uses a glass substrate as a mechanical carrier for the VCSEL, VCSEL driver, and diffractive element. Over a distance a little longer than 1 mm, our system fanned-out a single VCSEL into 60 individual fan-outs.

A new direct conversion wide band (23 GHz-31 GHz) six-port millimeter wave receiver suitable for integrated circuit fabrication is proposed to satisfy mass-market wireless communications. The receiver contains one multi chip module (MCM) consisting of a wide band six-port junction, four RF detectors (Schottky diodes), video amplifiers and I&Q decoder. The prototype circuits are fabricated in hybrid integrated circuits, and the receiver topology is suitable for fabrication in microwave monolithic integrated circuits (MMICs). This new hardware receiver is proposed as a robust, rugged, low cost receiver for use in wide band wireless mass market QPSK communications. Hand held and laptop terminals for future e-mail/multimedia services are a prime example of communication equipment needing such receivers. BER measurements and simulation results are presented in the presence of noise, adjacent signal interference, local oscillator (LO) phase shift and LO phase noise.

We have integrated an 850-nm VCSEL, its driver, and diffractive lenslet array onto a single substrate to produce an integrated opto-electronic multi-chip module. The diffractive element fans the output from the VCSEL into an array of approximately 60 focal spots at a plane 1416 µm from the surface of the VCSEL. Experimental results are presented.

This paper focuses on the issues concerning the system design of an IC implementation of a new integrated sensor and signal conditioning module for automotive anti-locking brake systems (ABS). It describes a concise solution for the detection of the speed and direction of rotation of a car-wheel. The signal conditioning is realised by digital control of analog elements and a new signalling protocol is detailed which transmits information via modulation of the supply current. The system functions in a harsh operating environment to above 150°C, with the external supply voltage varying from 40 V to 4.5 V, and features robust EMC performance. It is realised as a Multi Chip Module (MCM) in BiCMOS/DMOS (BCD) and CMOS processes, and is completely contained in a two pin package with no external components. (6 pages)

The explosion of global mobile telephone market has resulted in strong need for wide range and variety of packaging technologies in order to supply personal phones with enhanced product miniaturization, cost reduction, and good electrical performance. In that regard, Multi-Chip Module (MCM) is inevitably the one of the choice for the packaging of the mobile telephone. In this paper, we introduce an RF MCM-L transceiver module packaged by BGA for a 1.8-GHz personal communication service (PCS). We have focused most of our effort on low-cost and high-density design for the module. Basically, the low cost design is achieved using MCM-L substrate. The miniaturization of the transceiver was accomplished using optimally unified decoupling capacitors, thin MCM-L substrate and bare-chip mount technology. The second level package type of the RF MCM-L transceiver is ball grid array (BGA) with the ball size of 400 /spl mu/m. HP ADS and Maxwell software are used for the circuit and the interconnection simulation, and HP 8595E-spectrum analyzer is used for the RF measurement. The total area of the RF MCM transceiver is only 2.25 cm/sup 2/ which is reduced by 37.5% compared to the hybrid package type. The receiver of the RF MCM transceiver has exhibited typical 8 dB gain and 2.5 dB noise figure (NF). 1-dB saturation point is over -9 dBm. The transmitter of the RF MCM transceiver has had shown the typical gain of 25 dB. The power consumption of the receiver and the transmitter are 180 mW and 416 mW, respectively.

A 0.1 cc high efficiency power amplifier multi chip module (MCM) employing novel enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FETs (HJFET) has been successfully developed for 1.9 GHz wide-band CDMA handsets. The HJFET has a 5 nm thickness Al/sub 0.5/Ga/sub 0.5/As barrier layer for improving a gate forward turn-on voltage. It was also optimized with thickness of upper and lower Al/sub 0.2/Ga/sub 0.8/As electron supply layers to obtain a high maximum drain current. Under single 3.5 V operation, the MCM exhibited 26.0 dBm output power, a record 47.2% power-added efficiency and 22.3 dB associated gain with -35.5 dBc adjacent channel leakage power ratio at 5 MHz off-center frequency.

A fast microcontroller in a high density Multichip Module (MCM) package is developed which is EMC compliant and suitable for automotive and industrial applications. The 16-Bit Microcontroller MCM was realised in laminate technology with wire-bond chip interconnection and a custom-specific package in reflow-soldered edge clip gullwings in standard QFP-outline. The EMC-constraints were easily solved by shielding the MCM with its own ground-plane. Reliability and cost-targets are met by the widely-structured, low-cost 4 layer laminate technology. It can be used in a wide range of industrial and automotive applications. A number of variants of the MCM design are now under development

To built a 3K X 3K pixel near-IR FPA, we have made a package and a multi-chip module for Mitsubishi 1040 X 1040 PtSi CSD, which is one of the largest SWIR FPAs. Mosaicing demands smallest gaps between chips to achieve a large fill-factor and controlled flatness to fit a camera focal plane. The package of 52-pin half-pitch PGA has been designed to be smaller than the bear chip. After the chip is glued on the package and wire-bonded, nine packages with the chip are arrayed in three by three on a multi chip module (MCM) of 6 cm X 6 cm area. The fill-factor of the imaging area is 89 percent. The package and MCM are made of AlN ceramic of high thermal conductivity. MCM, therefore, plays a role of an efficient heat sink. The surface of the package, with which the chip is in contact, has been polished with accurate flatness as well as MCM. As the result, the height of nine chips built on MCM are uniform within approximately 20 micrometers in 6 cm X 6 cm area. The mosaic array will be equipped in a near-IR camera for astronomical observations of a wide field view.

An electronic compass watch microsystem has been designed and tested. The microsystem uses two micro-machined fluxgate magnetic sensors, and the angle calculation is based on the pulse position method. The compass has been designed to have an accuracy of one degree. The analogue and digital circuitry of the system fit on a single Sea-of-Gates array of 200k transistors. Together with the sensors and passive components it can be combined on a single Multi Chip Module.

Thermal analysis of an instrumentation microsystem, based on MCM (Multi Chip Module) technology with an active silicon platform, is presented. Results of theoretical analysis (analytical solutions based on thermal-electrical analogy, numerical FEM-simulations) are verified by measurements on a real system. The glue bonding layer (used for die attachment) and the package-to-ambient interface have been identified as the dominant thermal resistors. The measured thermal response time (time constant < 1 s) and good temperature distribution of the MCM microsystem (no hot-spots) indicate that a single-point adaptive thermal management scheme is required and sufficient to increase functional availability of all subsystems, and to maintain reliability and accuracy of the entire microsystem.

Temperature dependence of silicon MCM substrate RF properties is studied by modeling simple I/O structures. Both normal RF IC and high resistivity silicon substrates were processed. Lumped element equivalent circuit parameters were extracted for temperature range -60° C – +90° C.

For the ATLAS experiment at the planned Large Hadron Collider (LHC) at CERN hybrid pixel detectors are being built as innermost layers of the inner tracking detector system. Modules are the basic building blocks of the ATLAS pixel detector. A module consists of a sensor tile with an active area of 16.4 mm/spl times/60.4 mm, 16 read out ICs, each serving 24/spl times/160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and power distribution busses. The dies are attached by flip-chip assembly to the sensor diodes and the local busses. In the following a module based on MCM-D technology will be discussed and prototype results will be presented.

This paper describes a new philosophy for realising terahertz MCMs, that can operate within the frequency range of approximately 75 to 300 GHz, which are not only manufacturable but can also provide state-of-the-art performance. To this end, a consortium of four leading UK universities has recently been formed to demonstrate this T-MCM technology. Some of the techniques that will be under investigation within this ambitious three-year research programme are presented here. The ultimate goal is to provide industry with a technology that will allow them, for the first time, to realise complete terahertz sub-systems without the need for bulky and expensive superconducting and machined waveguide components.

Hybrid integrated circuits (HIC s) are being teached at the Technical University of Brno since the time of establishing the Microelectronics Department in 1980. At this time I have turned my activities after twelve years of research work in the hybrid film circuits area to the education sector. Today the Department of Microelectronics with only 15 years of continuous development of teaching process is one of the largest of the 19 departments comprising the Faculty of Electrical Engineering and Computer Science.

NEC has successfully developed a compact multi chip module for video and data communications. The transmitter (TX) and receiver (RX) are unified using high density packaging technology which is newly developed in consideration of reliability, e.g. hermetic seal and thermal management, and of low insertion loss RF I/O structure. Pseudomorphic Hetero Junction FETs (P-HJ-FET) are employed for LNA and power amplifier (PA) MMICs to achieve a low noise figure of 6.6 dB and high output power of 19 dBm. And the module also realized an excellent S/N of 60 dBp-p/rms for the NTSC VIDEO signal transmission.

Foreword V.D. Agrawal. MCM Testing Background: Fundamentals of MCM Testing and Design-For-Testability Y. Zorian. Die Level Testing: Known Good Die L. Gilg. Substrate Testing: A Survey of Test Techniques for MCM Substrates M. Swaminathan, et al. Smart Substrate MCMs A. Gattiker, W. Maly. Electron Beam Probing - A Solution for MCM Test and Failure Analysis R. Schmid, et al. Module Level Test: MCM Test Strategy Synthesis from Chip Test and Board Test Approaches A. Flint. Designing 'Dual Personality' IEEE 1149.1 Compliant Multi-Chip Modules N. Jarwala. An Effective Multi-Chip BIST Scheme Y. Zorian, H. Bederr. MCM Test Applications: Design-For-Test in a Multiple Substrate Multichip Module J.A. Jorgenson, R.J. Wagner. A Test Methodology for High Performance MCMs T.M. Storey, B. McWilliam. Module Level Diagnosis: A Formalization of the IEEE 1149.1-1990 Diagnostic Methodology as Applied to Multichip Modules K. Posse. Multichip Module Diagnosis by Product-Code Signatures P. Nagvajara, et al. Simulation Techniques for MCMs: Simulation Techniques for the Manufacturing Test of MCMs M. Tegethoff, T. Chen. MCM Test Economics: Economic Analysis of Test Process Flows for Multichip Modules Using Known Good Die C.F. Murphy, et al. Index.

A multi chip module (MCM) method for combining high frequency circuits with low frequency readout electronics is investigated. The RF chip consists of a detector circuit with monolithically integrated zero bias Schottky barrier diodes and planar antenna structures on high resistivity silicon substrates. This rectifying antenna (rectenna) is manufactured by silicon monolithic millimeter wave integrated circuit (SIMMWIC) technology. The signal of the rectenna is amplified by a CMOS preamplifier mounted in a hybrid construction next to the rectenna. An amplification of 32 dB is measured. Maximum sensitivity of the detector circuit including preamplification is 1600 mV/mWcm2 at 94.6 GHz.

The structure, fabrication, and theory of a 3D planarized optoelectronic clock signal distribution device, based on a thin light-guiding substrate in conjunction with a 2D polymer holographic grating array, are described. We have previously demonstrated a 25 GHz 1-to-42 (6 X 7) highly parallel fanout interconnect with a signal to noise ration of 10 dB1. In this paper, theoretical work focused on generating a globally uniform fanout distribution is presented. An objective function aimed at equalizing the intensities among the fanout beams is established and optimization results are reported. Finally, the angular misalignment and wavelength dispersion problem are further discussed, together with their tolerance requirements on the size of the photoreceivers and the bandwidth of the vertical cavity surface emitting lasers integrated on the multi-chip-modules.© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The use of Electronics Technologies in Space pose interesting but manageable challenges and significant opportunities for the use of Multi-Chip Modules (MCMs) and low cost packaging technologies — whose properties offer significant advantages in space and locations involving exposure to radiation. Communication via satellites located in space require performance at high frequencies in the microwave range (delivered by silicon or GaAs MMICs- monolithic microwave integrated circuits — and controlled by MCMs), hardware technologies which are compact and lightweight and will withstand the acceleration forces during launch and manoeuvre into orbit, semiconductor device and packaging and interconnection technologies which will withstand prolonged exposure to radiation, and an extremely high reliability because of the high telecommunications traffic carried and the enormous cost of repair if a failure should occur.

For Multi Chip Module (MCM) technology several types of substrates like laminate board, ceramic, metal, glas and silicon may be used. Traditionally these have only been a substrate for interconnecting metal wires. All components, active and passive are either mounted or screen printed on the surface. During resent years however there has been a development towards integration of “embedded” passive components for both LTCC and MCM-D technology and mount the ICs on top. With the use of silicon as a substrate material it is now possible to increase the integration by adding active components in the substrate. Micro Circuit Engineering (MCE) in UK developed a MIL-1553/1760 Data Bus with an active substrate (all CMOS logic). No extra metallisation is needed for this system. Lucas Electronics together with IMC are developing a CPU MCM with the memory in the substrate and IMC together with Saab Combitech developed an Intelligent Power Module for automotive applications with protection circuits in the substrate. The Data Bus MCM is produced in large volumes today

This paper presents a fiber optic packaging technique using qualifiable materials and processes that has been developed for space applications. The technique is consistent with a Multi Chip Module implementation. This packaging technique allows multiple fiber optic interfaces to be combined with high density electronics within a single easily integrable package and can be used wherever fiber optics are incorporated into spaceborne systems, including the Fiber Optic Data Bus, the Space Station FDDI interface, any upgrades of the Space Station Local Bus from 1553 to 1773, and various Dual Rate 1773 applications.

This paper investigates the feasibility of implementing various elements of a EHFISHF terminal using MultiChip Module (MCM) technology. A functional definition of the terminal is derived from projected systems requirements. An assessment of the miniaturization, performance, reliability and cost tradeoffs for packaging and interconnect technologies is presented. Functional partitioning and allocation of these system requirements establishes the physical architecture and identifies candidate elements for MCM technology insertion. An overview is provided of key MCM development issues including known-good die, CADCAE, materials and test. The paper concludes with a description of an optimal MCM implementation of selected EHFISHF terminal features.

In this paper, a new design style for multi-FPGA system is proposed. It fills the large gap between high-level synthesis and the FPGA logic design by providing datapath circuit module library which can contain high-level simulation models as well as low-level circuit netlists. Some bit-serial circuit modules have been designed which are easy to partition and place within multiple FPGAs. Also, we have describe our novel work on Field-Programmable Multi-Chip Module which demonstrates its ability in reducing hardware size, reducing power consumption, reducing packaging cost and providing with high density chip-to-chip connections.

Failure mechanisms of STIC (silicon tantalum integrated circuit) resistors on low voltage CBIC (complementary bipolar integrated circuit) devices, assembled onto MCMs (multichip modules), are investigated with specially designed testers. In general, STIC resistors are stable and fit for microelectronic circuit applications. It is shown that thermally stabilized STIC resistors could be destabilized with a basic solution of pH>10 and could subsequently be degraded under the influence of an electric field. The anodization process is shown to follow a phenomenological equation. A model for the possible failure mechanism which includes MCM assembly defluxing solutions, moisture, alkaline elements, and applied voltage is proposed. >

A vertical multilayer transition for millimetre-wave frequencies is introduced and implemented in IMEC multi-chip module (MCM) technology. Simulation and measurement results for a back-to-back CPW-to-microstrip transition prototype show excellent agreement. Moreover, the microstrip-to-microstrip vertical via-less transition, as the core idea that is introduced, demonstrates less than 0.7 dB of loss in the band from 57 to 66 GHz, which satisfies the European as well as US standard bandwidth for 60 GHz communications systems. The low insertion loss along with the straightforward design procedure makes the proposed vertical via-less transition a valuable candidate for 60 GHz communications systems.

A three dimensional model of Multi-Chip Module (MCM) was built with ANSYS based on the internal structure, dimension and material of the MCM produced by Atmel Corporation. The internal and surface temperature distribution of the MCM working in typical mode was studied with the aid of ANSYS. Then heat dissipation proportion of each part of the model and the effect of thermal conductivity on internal temperature of MCM was analysed. The surface temperature of MCM obtained by simulation and the result measured by Thermal Infrared Imager is consistent, so the Finite Element (FE) model and analytical method in this paper can be used to simulate the temperature distribution of MCM quite accurately.

Recently, the trend in mounting technology has been toward the multi-chip module owing to its larger mounting density. A demand for low thermal expansion coefficient polyimide and a low dielectric constant polyimide is growing rapidly in complying with this trend.

The aim of this article is to provide a systematic method to perform optimisation design or evaluation for multi-chip module (MCM) in electronic packaging by considering thermal control. Based on investigation of the parameters characteristics (about structural and thermal physical parameters characteristics) which are originated by design and manufacture, the key performance indexes of MCM that include the lowest internal temperature objective, thermal transfer accuracy, chip placement are analysed. The mapping relations between parameters characteristics of MCM are established on the basis of systematic design point. A GA-RSM model was presented to implement the optimisation. Furthermore, some design processes for improving performance are induced. Finally, an example is discussed to apply the method.

A very flexible maskless technique for thin film hybrid formation has been developed. Lay outs are transferred directly from work stations to laser controls. Openings in ceramic substrates are achieved through laser cutting, and chips are embedded to give a common chip-to-substrate surface, flat to within 2 μm. Dielectric layers of polyimide are formed by spin on techniques and are then laser structured for via hole formation.Interconnections of the embedded chips are generated by laser direct writing of thin copper lines from copper formate, followed by chemical copper deposition. Chemical pretreatments of the aluminum contact pads allow for reasonable chip contacting with these methods. Electrical measurements on the dc line conductivity and the high frequency behaviour of these interconnections have also been performed.

Micro systems have become possible as a result of the fast evolution of VLSI technology. Modern (BI)CMOS technology allows complete systems to be integrated on a single chip while new packaging technologies allow the use of micropattern techniques also on multichip carriers. The same micropattern techniques can also be used for designing micromechanical structures as well as silicon sensors possibly with inclusion of signal conditioning, conversion and interpretation circuitry.

The design, fabrication and performance of a 60-GHz multi-chip module receiver employing a substrate integrated waveguide filter and antenna are presented. The receiver is integrated onto a single multilayer substrate, fabricated using photoimageable thick-film technology. The module incorporates a GaAs monolithic microwave integrated circuit low-noise amplifier and downconverter, with lumped elements for intermediate frequency (IF) filtering embedded into the substrate. The chip cavities for mounting of the MMICs are photo-imaged as part of the standard process, giving precise dimensional control for short bond-wire lengths. The complete module including integrated antenna measures only 22.5 mm x 5.4 mm x 0.3 mm and works from 58 to 64 GHz.

A compact 60 GHz MCM receiver has been demonstrated by integrating millimetre-wave substrate-integrated waveguides and GaAs MMICs for the first time. The module includes a waveguide antenna and filter, MMIC LNA and mixer, and lumped elements for IF filtering embedded into the multilayer photo-imageable thick-film substrate. Cavities for MMIC attachment are photo-imaged as part of the standard process.

An 80 Gbit/s ATM-switch multi-chip module (MCM) has been developed that uses only an optical I/O interface for high-speed signal interconnection. The MCM was fabricated using 0.25 µm CMOS/SIMOX technology, 622 Mbit/s/channel 40 channel/module parallel-optical-interconnection technology, and high-performance cooling technology. Its small size (220 × 174 × 15 mm) will enable 80 Gbit/s optical ATM cell switching.

Silicon based Multi Chip Module (MCM-Si) technology offers high precision and high packing density compared with traditional PCB and ceramic thick film hybrid technologies. When used in RF-equipment, MCM-Si's suffer from severe signal loading and signal coupling via the substrate. In this paper modeling of passive elements on MCM's is discussed. Simple equivalent circuits and parameter extraction methods are presented.

We developed a polyimide optical waveguide with multi-fan-out which can be used as an optical interconnection between the many LSI chips in a multichip module system. The propagation direction of the signal light is changed from horizontal to vertical and from vertical to horizontal using aluminum micromirrors in this waveguide. We then introduced a signal light into this waveguide, the propagation direction of which was bent by an aluminum micromirror. It impinged on the photodiode to induce a significant increase in the photodiode current.

A multichip module using a multilayer substrate with a polyimide dielectric and a fine pattern of copper conductors is discussed. This substrate contains small copper columnar vias, which reduce the thermal resistance of the polyimide layers without causing a channel accommodation drop, and thin-film resistors for terminated transmission. The module can mount a high density of high-speed LSI chips that produce twice as much heat as those in conventional modules and can transmit high-speed pulses at over 2 Gb/s. The structure and features of the module, its design and fabrication, and its electrical and thermal characteristics are discussed. >

The development of a manufacturing test and diagnostic methodology for multi-chip modules as used in the IBM 4300 processor models involves determining the most attractive compromise among a number of conflicting factors: a) high test coverage, b) high diagnostic resolution, c) test generation, d) test equipment, and e) test application and diagnosis. This paper describes a set of solutions which were developed to create a high-volume, low-cost manufacturing test operation for the product in question. This paper examines the role of the testing methodology in productivity and product quality, details the diagnostic approach chosen, and provides an example of the overall manufacturing system performance achieved by analyzing a large module production sample.

In recent years the on-chip delay has gone down much more rapidly than the signal delay in packaged circuits. As a consequence of this the packaging delay times have had to be reduced drastically, which means that a greater packging density had to be implemented. A novel planar packaging technique, used in the new Siemens main frame computer 7500 H 90 has led to considerable progress in solving this problem. An essential part of this system is a multi-chip-module which can hold up to 144 bare chips. The carrier of these IC's is a 16-layer high density multilayer printed circuit board, which is fabricated in a sequential process. Interlayer contacts are formed by 80 µm wide blind via-holes, which are generated by excimer-laser ablation of the dielectric. The process desribed in this paper shows that it is possible to produce blind via-holes with an aspect ratio of about one in an extremely reliable and reproducible way. This process is already being successfully run on a production line. It is to our best knowledge the first time excimer lasers have been used on a large-scale in an industrial environment.

In this paper, a LED multi-chip module with a heat pipe was designed for automotive headlights, which took advantages of the relative air flow during vehicle travelling for forced convection to keep the junction temperature of LED chips below 60°C. The Structure is compact enough to be suitable for placement in a small space for automotive lighting. The influence of paraments on the junction temperature of LED chips, such as the distance of LED arrangement and dimensions of both DBC substrates and sinks, has also been discussed by numerical simulation using ANSYS software. Then, the structure of the module was optimized. The junction temperature was measured using the forward voltage method, under the condition of both natural convection and forced convection. It was analyzed that the factors having an effect on thermal performance of the module. Furthermore, taking the condition of natural air convection during vehicle stopping into account, a temperature control system was designed for this module.

In this paper, the way to provide an electrical equivalent scheme for any power multi chip module (PMCM) is presented. Considering the geometrical description of the PMCM, an electrical R, L, M circuit is automatically generated using a special software, InCa. This circuit can be used either directly in a PSPICE simulation, or to analyse technical parameters like switching cell inductance, interaction between power and drive circuit or current unbalance in the PMCM.