High-performance datapath implementation on Field-Programmable Multi-Chip Module (FPMCM)

In this paper, a new design style for multi-FPGA system is proposed. It fills the large gap between high-level synthesis and the FPGA logic design by providing datapath circuit module library which can contain high-level simulation models as well as low-level circuit netlists. Some bit-serial circuit modules have been designed which are easy to partition and place within multiple FPGAs. Also, we have describe our novel work on Field-Programmable Multi-Chip Module which demonstrates its ability in reducing hardware size, reducing power consumption, reducing packaging cost and providing with high density chip-to-chip connections.