Author: "Loh, Gabriel H." / Topic: computer architecture - Searchworks@Jio Institute Digital Library Search Results

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Start Over Author "Loh, Gabriel H." Topic computer architecture

Author: Stow, Dylan, Akgun, Itir, Wenqin Huangfu, Yuan Xie, Xueqi Li, and Loh, Gabriel H.
Subjects: BANDWIDTHS, COMPUTER architecture, NONVOLATILE memory, PARALLEL computers, DATA integration
Abstract: Emerging Monolithic Three-Dimensional (M3D) integration technology will not only provide improved circuit density through the high-bandwidth coupling of multiple vertically-stacked layers, but it can also provide new architectural opportunities for on-chip computation, memory, and communication that are beyond the capabilities of existing process and packaging technologies. For example, with massive parallel communication between heterogeneous memory and compute layers, existing processing-in-memory architectures can be optimized and expanded, developing into efficient and flexible near-data processors. Additionally, multiple tiers of interconnect can be dynamically leveraged to provide an efficient, scalable interconnect fabric that spans the three-dimensional system. This work explores some of the challenges and opportunities presented by M3D technology for emerging computer architectures, with focus on improving efficiency and increasing system flexibility. [ABSTRACT FROM AUTHOR]
Published: 2019
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Author: Sim, Jaewoong, Loh, Gabriel H., Sridharan, Vilas, and O'Connor, Mike
Subjects: *DYNAMIC random access memory, *COMPUTER storage devices, *CENTRAL processing units, *COST effectiveness, *CACHE memory
Abstract: The resiliency problem of die-stacked memory will become important because of its lack of serviceability. This article details how to provide practical and cost-effective reliability, availability, and serviceability support for die-stacked DRAM cache architectures. The proposed approach can provide varying levels of protection, from fine-grained single-bit upsets to coarser-grained faults within the constraints of commodity non-error-correcting code DRAM stacks. [ABSTRACT FROM AUTHOR]
Published: 2014
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Author: Falsafi, Babak and Loh, Gabriel H.
Subjects: *COMPUTER architecture, *COMPUTER input-output equipment, *COMPUTER systems, *COMMITTEES, *CONFERENCES & conventions
Abstract: This special issue is the tenth in an important tradition in the computer architecture community: IEEE Micro's Top Picks from the Computer Architecture Conferences. This tradition provides a means for sharing a sample of the best papers published in computer architecture in 2012 with the IEEE Micro readership and researchers in the computer architecture community. [ABSTRACT FROM PUBLISHER]
Published: 2013
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Author: Loh, Gabriel H., Yuan Xie, and Black, Bryan
Subjects: *TECHNOLOGICAL innovations, *THREE-dimensional display systems, *MICROPROCESSORS, *COMPUTER systems, *ELECTRONIC circuits, *INTEGRATED circuit design, *COMPUTER engineering, *COMPUTER industry, *INTEGRATED circuit interconnections, *COMPUTER architecture
Abstract: The article presents an overview on the emergence of three-dimensional (ED) integration in the fabrication technology and its impact on processor design. It also presents various case studies on different approaches in designing (3D) multicore system and single-core processors and discusses the significance of technological innovations in creating future high-performance microprocessors. It offers an overview on 3D die-stacking integration, a new fabrication technology that stacks multiple layers of processed silicon with a very high-density, low-latency layer-to-layer interconnect.
Published: 2007
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