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Invited: Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.

Authors :
Stow, Dylan
Akgun, Itir
Wenqin Huangfu
Yuan Xie
Xueqi Li
Loh, Gabriel H.
Source :
DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p1243-1246, 4p
Publication Year :
2019

Abstract

Emerging Monolithic Three-Dimensional (M3D) integration technology will not only provide improved circuit density through the high-bandwidth coupling of multiple vertically-stacked layers, but it can also provide new architectural opportunities for on-chip computation, memory, and communication that are beyond the capabilities of existing process and packaging technologies. For example, with massive parallel communication between heterogeneous memory and compute layers, existing processing-in-memory architectures can be optimized and expanded, developing into efficient and flexible near-data processors. Additionally, multiple tiers of interconnect can be dynamically leveraged to provide an efficient, scalable interconnect fabric that spans the three-dimensional system. This work explores some of the challenges and opportunities presented by M3D technology for emerging computer architectures, with focus on improving efficiency and increasing system flexibility. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
0738100X
Issue :
56
Database :
Complementary Index
Journal :
DAC: Annual ACM/IEEE Design Automation Conference
Publication Type :
Conference
Accession number :
155539615
Full Text :
https://doi.org/10.1145/3316781.3323475