Back to Search Start Over

PROCESSOR DESIGN IN 3D DIE-STACKING TECHNOLOGIES.

Authors :
Loh, Gabriel H.
Yuan Xie
Black, Bryan
Source :
IEEE Micro. May/Jun2007, Vol. 27 Issue 3, p31-48. 18p.
Publication Year :
2007

Abstract

The article presents an overview on the emergence of three-dimensional (ED) integration in the fabrication technology and its impact on processor design. It also presents various case studies on different approaches in designing (3D) multicore system and single-core processors and discusses the significance of technological innovations in creating future high-performance microprocessors. It offers an overview on 3D die-stacking integration, a new fabrication technology that stacks multiple layers of processed silicon with a very high-density, low-latency layer-to-layer interconnect.

Details

Language :
English
ISSN :
02721732
Volume :
27
Issue :
3
Database :
Academic Search Index
Journal :
IEEE Micro
Publication Type :
Academic Journal
Accession number :
26322655
Full Text :
https://doi.org/10.1109/MM.2007.59