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The present study deals with the failure load analysis of rigid frames by the kinematically admissible approach, with emphasis on a combinatorial searching problem closely correlated to AI technology. In general, the essence of AI technology is to establish efficient search techniques for the prescribed goal among enormous data bases or knowledge-bases, which are frequently generated from combination of elements, as encountered in the traveling salesman problem. Because of non-differentiability or discreteness, the search of such a combination for the goal requires a large number of generate-and-test procedures, which wastes enormous computer time. Failure modes which are kinematically admissible to collapsed frames can be categorized into two types of mode: elementary failure modes and their linearly combined modes. By and large, for even medium-sized rigid frames the number of combined modes becomes explosively large. Thus, it is important to establish an effective search technique for the minimum load factor by virtual work equations for elementary modes and enormous combined modes without exploitation of any kind of continuity condition such as differentiation. Some efficient bounding operations to prune futile alternatives is applied as an example frame, whose result shows excellent searching efficiency.

We have developed a smart pixel that monolithically integrates a metal-semiconductor-metal (MSM) photodetector, metal-semiconductor field effect transistors (MESFET's), and a vertical-cavity surface-emitting laser (VCSEL). This device can perform both NOR- and OR-types of operation with a thresholding function. Optimal device parameters are obtained by using a SPICE simulation. Calculations show that the switching time is mainly limited by the CR time constant of the input stage, which consists of the MSM photodetector, the load-resistor, and the MESFET connected to the MSM photodetector. The fabricated device attained a contrast ratio of more than 30 dB with optical gain. The 3-dB bandwidth was 220 MHz and the switching energy was 700 fJ at an operation frequency of 100 MHz. We also discuss the power consumption and the packing density of the smart pixel including the VCSEL as a function of operation frequency. A MESFET that has high f/sub T/ with low bias voltage and a VCSEL that has a low threshold current while maintaining the wall-plug efficiency are necessary to obtain a higher performance device.

We have fabricated a photonic switching device that monolithically integrates a metal-semiconductor-metal photodetector, metal-semiconductor field-effect transistors, and a vertical-cavity surface-emitting laser. This device can perform both NOR- and OR-types of operation with thresholding input-output characteristics. The contrast ratio is more than 30 dB with optical gain. The device also shows a 3-dB bandwidth of 220 MHz and switching energy of 700 fJ at a 100-MHz frequency. >

InGaAs quantum-well vertical-cavity surface-emitting lasers with low-Al-content p-type mirrors grown by metalorganic chemical vapor deposition (MOCVD) have have been characterized. Series resistance in p-type Al/sub x/Ga/sub 1-x/As/GaAs mirrors decreases drastically as the Al content in Al/sub x/Ga/sub 1-x/As decreases from AlAs. Air-post devices with a p-type Al/sub 0.06/Ga/sub 0.4/As/GaAs top mirror exhibit a room temperature CW threshold current of 1.8 mA at an operating voltage of 2.0 V (with a threshold power consumption at 3.6 mW). >

Room-temperature pulsed operation of a GaInAsP/InP vertical-cavity surface-emitting laser diode (VCSELD) with an emission wavelength near 1.55 mu m is reported. A double heterostructure with a 34-pair GaInAsP ( lambda /sub g/=1.4 mu m)/InP distributed Bragg reflector (DBR) was grown by metalorganic chemical vapor deposition (MOCVD). The measured reflectivity of the semiconductor DBR is over 97% and threshold current is 260 mA for a 40- mu m phi device with a 0.88- mu m-thick active layer. Threshold current density is as low as 21 kA/cm/sup 2/ at room temperature. >

This paper examines the growth of InP epilayers on Si substrates that have GaAs intermediate layers. To improve InP crystalline quality, the GaAs intermediate layer thickness is optimized and four-thermal-cycle annealing is performed after GaAs and/or InP growth. The InP epilayers have a higher crystalline quality than InP epilayers grown directly on Si. When the InP epilayer thickness is 6{mu}m, the x-ray full width at half-maximum is 250 arcseconds and the etch pit density is 3 {times} 10{sup 7}cm{sup {minus} 2}.

The authors present a study of the thermal interference in a two-dimensional 0.85 µm vertical-cavity surface-emitting laser array. The distance between pixels is 250 µm. The temperature of the centre pixel is found to increase by at least 15°C due to thermal interference when the other pixels are operated near the threshold current.

The first 0.85 µm 8×8 bottom-emitting vertical-cavity surface-emitting laser diodes (VCSELs) have been grown on AlGaAs substrates. Their characteristics are the same as those of VCSELs grown on GaAs substrate. The authors have also fabricated 8×8 independently addressable VCSEL arrays which exhibited good lasing characteristics and uniform threshold current density.

Summary form only given. Room-temperature operation of a current-injection near-1.55- mu m GaInAsP/InP vertical-cavity surface emitting laser diode (VCSELD) was achieved. The double heterostructure was grown by metal-organic chemical vapor deposition on a

GaAs and GaP are grown on Si substrates by MOCVD. GaP is directly grown on Si, and GaAs is grown with the intermediate layers of GaP, GaP/GaAsP strained layer superlattice (SLS) and GaAsP/GaAs SLS. GaP and GaAs are characterized by double crystal X-ray diffraction, photoluminescence and transmission electron microscopy. The characteristics of GaP on Si with changing the thickness and those of GaAs grown on Si with changing the intermediate layer thickness are investigated. The thermal cycle growth is employed for GaAs on Si to reduce the dislocation density.

This paper examines the growth of InP epilayers on Si substrates that have GaAs intermediate layers. To improve InP crystalline quality, the GaAs intermediate layer thickness is optimized and four-thermal-cycle annealing is performed after GaAs and/or InP growth. The InP epilayers have a higher crystalline quality than InP epilayers grown directly on Si. When the InP epilayer thickness is 6{mu}m, the x-ray full width at half-maximum is 250 arcseconds and the etch pit density is 3 {times} 10{sup 7}cm{sup {minus} 2}.

The dependence of the critical layer thickness hc on mole fraction x of Si1−xGex/Si heterostructures is determined by direct observations of misfit dislocations by using the electron beam induced current (EBIC) technique and transmission electron microscopy (TEM). The EBIC images of the Si1−xGex/Si interfaces show square‐grid patterns running in the 〈110〉 directions. These patterns are identified by TEM observation to be misfit dislocations generated at the Si1−xGex/Si interface. The dependence of hc on x is compared with the results reported by R. People and J. C. Bean [Appl. Phys. Lett. 47, 322 (1985) and 49, 229 (1986)]. The comparison reveals that inconsistency exists between them, especially in the range of x

GaP crystals are grown on Si substrates by MOCVD. Double crystal X-ray diffraction indicates that the crystal quality of GaP layers greatly improves when AsH3 is supplied before growth. The FWHM of (400) diffraction peak of the GaP layer decreases as the thickness increases and the best FWHM of 112.5 arcs is obtained at a thickness of 5 μm. The GaP/Si interface is characterized using secondary ion mass spectroscopy (SIMS) to demonstrate the effect of AsH3.