Search

The growth of epitaxial graphene on C-face 6H-SiC substrates is investigated using pro-cess conditions that can form small, local areas of graphene. The thickness of SiC lost to Si sublimation is not completely countered by the thickness of the resulting graphene and so graphene-covered basins (GCBs) are formed. The GCBs are most likely nucleated at threading dislocations from the substrate. The GCB morphology exhibits ridges, similar to those found on continuous films. The GCBs expand through erosion of the surrounding SiC substrate walls, eventually coalescing into continuous films. The ratio of the Raman D and G peaks was used to estimate the crystallite length scale and it was found to be about 200 nm for small GCBs and > 1 m for continuous films.

The effectiveness of an in-situ growth interrupt in nitrogen doped 8° off-cut epilayers was investigated using ultraviolet photoluminescence imaging. Low-doped n-type epilayers (<1016 cm-3) exhibited an abrupt increase in BPD to TED conversion at the growth interrupt and achieved 96-99% conversion overall (< 10 BPDs/cm-2), while high-doped epilayers had minimal conversion at the interrupt (< 1%) and overall (< 30%). This large discrepancy suggests nitrogen prohibits or alters the conversion mechanism at the growth interrupt. Therefore, a novel SEM technique was developed to "freeze-in" the interface morphology and help elucidate the conversion mechanism. Preliminary results suggest that preferential etching at the point of BPD intersection with the surface is greatly reduced in highly doped layers, which inhibits the conversion mechanism.

Doubly-implanted SiC vertical MOSFETs were fabricated displaying a blocking voltage of 4.2kV and a specific on-resistance of 23 mΩ-cm2, on a 4.5mm x 2.25mm device. Design variations on smaller (1.1mm x 1.1mm) devices showed on-resistance as low as 17 mΩ-cm2 with a blocking voltage of 3.3kV. Analysis is presented of the on-resistance and temperature dependence (up to 175ºC), as well as switching performance. Switching tests taken at 1000V and 6A showed turn-on and turn-off transients of approximately 20-40ns.

The effects of proton irradiation on uv 4H-SiC single photon avalanche photodiodes (SPADs) are reported. The SPADs, grown by chemical vapor deposition, were designed for uv operation with dark count rates (DCR) of about 30 kHz and single photon detection efficiency (SPDE) of 4.89%. The SPADs were irradiated with 2 MeV protons to a fluence of 1012 cm-2. After irradiation, the I-V characteristics show forward voltage (<1.9 V) generation-recombination currents 2 to 3 times higher than before irradiation. Single photon counting measurements imply generation-recombination centers created in the band gap after irradiation. For threshold voltage ranging from 23 to 26 mV, the 4H-SiC SPAD showed low DCR (<54 kHz) and high SPDE (>1%) after irradiation. The SPADs demonstrated proton radiation tolerance for geosynchronous space applications.

Homo- and heteroepitaxial 3C-SiC layers were grown on 4H-SiC step-free mesas. The yields of smooth, defect-free mesas were ~ 17% for both intentionally and unintentionally doped films, while those with screw dislocations and multiple stepped surfaces were ~ 22%. The electronic and structural properties of the mesas were found on a micrometer-sized length scale using µ-PL and µ-Raman, respectively. 3C-SiC mesas were found to have complete 3C-SiC coverage with some of the mesas having electronic defects, while other mesas were found to be defect-free.

Field-effect transistors were fabricated on GaN and Al0.2Ga0.8N epitaxial layers grown by metal organic chemical vapor deposition (MOCVD) on sapphire substrates. The threshold voltage VTH was higher when AlGaN was used as an active layer. VTH also increased with temperature due to the increased positive polarization charge at the GaN/AlN buffer/sapphire interfaces. Drain current increased at high temperatures even with more positive threshold voltage, which makes GaN-based FET devices attractive for high temperature operation.

Epitaxial graphene (EG) grown on the carbon-face of SiC has been shown to exhibit high carrier mobilities, in comparison to other growth techniques amenable to wafer-scale graphene fabrication. The transfer of large area (>mm2) graphene films to substrates amenable for specific applications is desirable. We demonstrate the dry transfer of EG from the C-face of 4H-SiC onto SiO2, GaN and Al2O3 substrates via two approaches using either 1) thermal release tape or 2) a spin-on, chemically-etchable dielectric. We will report on the impact that these transfer processes has upon the electrical properties of the transferred EG films.

The structure of various inclusions in SiC epitaxial layers grown on 4o offcut substrates was investigated using three advanced techniques. Using micro-Raman spectroscopy, the observed inclusions exhibited a complex structure having either different SiC polytypes like 3C or 6H or they were misoriented 4H-SiC inclusions. The UVPL images showed dislocations and other extended defects around the inclusion-related defects, and strain fields were observed in the x-ray topographs near the defect sites. Spectral UVPL imaging shows features with varying luminescence inside the inclusion related defects which propagate and may cause deformation in the crystalline structure and lead to non-radiative recombination centers within the defect.

The recently developed technique of UVPL imaging has been used to track the path of basal plane dislocations (BPDs) in SiC epitaxial layers. The glide of BPDs during epitaxial growth has been observed and the role of this glide in forming half-loop arrays has been examined. The ability to track the path of BPDs through the epitaxy has made it possible to develop a BPD reduction process for epitaxy grown on 8° offcut wafers, which uses an in situ growth interrupt and has achieved a BPD reduction of > 98%. The images also provide insight into the strong BPD reduction that typically occurs in epitaxy grown on 4° offcut wafers.

The effect of various types of in-grown stacking faults and threading screw/edge type dislocations on carrier lifetime and diffusion lengths in 4H-SiC epitaxial films was investigated through cathodoluminescence decays and charge collection efficiencies of electron beam induced current signals at specific defects sites. Most stacking faults yielded ~40% reduction in the carrier lifetime. Moreover, drastic lifetime reductions were observed in regions containing surface triangular defects and bulk 3C polytype inclusions. Dislocations of both types serve as efficient recombination centers, though stronger reduction in diffusion lengths was observed in the vicinity of screw type dislocations.

The temperature dependence of the carrier lifetime was measured in n-type 4H-SiC epilayers of varying Z1/2 deep defect concentrations and layer thicknesses in order to investigate the recombination processes controlling the carrier lifetime in low- Z1/2 material. The results indicate that in more recently grown layers with lower deep defect concentrations, surface recombination tends to dominate over carrier capture by other bulk defects. Low-injection lifetime measurements were also found to provide a convenient method to assess the surface band bending and surface trap density in samples with a significant surface recombination rate.

Knoop microhardness assessments were conducted on a variety of 6H- and 4H-SiC substrates to assess any appreciable differences that may need to be considered in wafer manufacture and general application. Nitrogen-doped, vanadium-doped and unintentionally doped (UID) substrates with both on-axis and 8° off-axis orientations were assessed. In general, the Knoop hardness values fell in the 2000 to 2500 kg/mm2 range (equivalent to approximately 20 to 25 GPa). Hardness values measured in the <1100> crystal direction were significantly higher than in the <11-20> direction. Undoped and vanadium-doped samples were harder than nitrogen-doped samples. For both 6H and 4H nitrogen-doped samples, the hardness was as much as 10% higher for 8° offcut wafers than for on-axis.

Graphene layers were created on both C and Si faces of semi-insulating, on-axis, 4H- and 6H-SiC substrates. The process was performed under high vacuum (<10-4 mbar) in a commercial chemical vapor deposition SiC reactor. A method for H2 etching the on-axis substrates was developed to produce surface steps with heights of 0.5 nm on the Si-face and 1.0 to 1.5 nm on the C-face for each polytype. A process was developed to form graphene on the substrates immediately after H2 etching and Raman spectroscopy of these samples confirmed the formation of graphene. The morphology of the graphene is described. For both faces, the underlying substrate morphology was significantly modified during graphene formation; surface steps were up to 15 nm high and the uni-form step morphology was sometimes lost. Mobilities and sheet carrier concentrations derived from Hall Effect measurements on large area (16 mm square) and small area (2 and 10 m square) samples are presented and shown to compare favorably to recent reports.

Epitaxial layers were grown on 4° off-axis 4H-SiC substrates by hot-wall chemical vapor deposition. The reduced off-cut angle resulted in lower basal plane dislocation (BPD) densities. The dependence of BPD reduction on growth conditions was investigated using ultraviolet photoluminescence (UVPL) imaging. With this method, it was found that the dislocations were converting to threading edge dislocations throughout the thickness of the film. A high (≥ 97%) conversion efficiency was found for all films grown with this orientation. A conversion of 100% was achieved for several films without pre-growth treatments or growth interrupts.

Conversion of basal plane dislocations (BPD) to threading edge dislocations (TED) in 8° off-cut 4H-SiC within an n+ buffer layer would eliminate the nucleation site for Shockley-type stacking faults in active device regions grown on such buffer layers. To that end, the propagation and conversion of BPDs through in situ growth interrupts is monitored using ultraviolet photoluminescence (UVPL) wafer mapping. The optimized growth interrupt scheme lasts for 45 minutes with a propane mass flow of 10 sccm at growth temperature. This scheme has shown a conversion efficiency of up to 99% for samples with electron (hole) concentrations < 5x1014 cm-3 (8x1015 cm-3). Samples subjected to a 45 or 90 minute interrupt under 10 sccm of propane, regardless of conversion efficiency, exhibit a “slit” in the surface morphology associated with each BPD and oriented perpendicular to the off-cut and BPD propagation direction. Repetition of the optimal interrupt sequence with a 5 μm epilayer spacer grown between the two interrupts resulted in the same conversion efficiency as a single optimal growth interrupt. Incorporation of the optimal interrupt into an n+ layer is more complicated as attempts to do so in layers doped with nitrogen to 2x1018, 2x1017 and 2x1016 cm-3 resulted in conversion efficiencies of ~6%.

This work reports 4H-SiC bipolar junction transistor (BJT) results based upon our first intentionally graded base BJT wafer with both base and emitter epi-layers continuously grown in the same reactor. The 4H-SiC BJTs were designed to improve the common emitter current gain through the built-in electrical fields originating from the grading of the base doping. Continuously-grown epi-layers are also believed to be the key to increasing carrier lifetime and high current gains. The 4H-SiC BJT wafer was grown in an Aixtron/Epigress VP508, a horizontal hot-wall chemical vapor deposition reactor using standard silane/propane chemistry and nitrogen and aluminum dopants. High performance 4H-SiC BJTs based on this initial non-optimized graded base doping have been demonstrated, including a 4H-SiC BJT with a DC current gain of ~33, specific on-resistance of 2.9 mcm2, and blocking voltage VCEO of over 1000 V.

X-ray diffraction (XRD) rocking curves were mapped across 4H-SiC, 3-inch, 8° off-cut substrates prior to and after epitaxial growth, where a pattern of slightly higher defectivity region was clearly seen. This same pattern was apparent in both cross-polarization images of the epiwafers and microwave photoconductivity decay (μ-PCD) lifetime maps of the epilayers, where the latter shows the lifetime in the high defectivity regions had drastically decreased. Within the short lifetime regions, electron trap concentrations were similar to that as in the long lifetime regions as determined by deep level transient spectroscopy; however, the extended defect density was significantly higher. Consequently, high spatial resolution XRD can be a valuable tool in preselecting substrates for epitaxial growth to produce low defect density material with long injected carrier lifetimes.

The evolution of basal plane dislocations (BPDs) in 4H-SiC epitaxy during its growth is investigated by using two types of interrupted growth in conjunction with ultraviolet photoluminescence (UVPL) imaging of the dislocations. For the first, each epitaxial growth was stopped after 10-20 μm and a UVPL map was collected. For the second, changing the gas flow interrupted the growth and the BPDs were imaged at the end. The first sequence made it possible to track the formation of half-loop arrays and show that they arise from BPDs that glide perpendicular to the offcut direction. For both types, each interruption causes between 30 – 50% of the BPDs to be converted to threading edge dislocations (TEDs). This result suggests that using interrupted growth may be an alternate method to producing epitaxial layers with low BPD concentration.

This paper reports a 4H-SiC single photo avalanche diode (SPAD) operating at the solar blind wavelength of 280 nm. The SPAD has an avalanche breakdown voltage of 114V. At 90% and 95% of the breakdown voltage, the SPAD shows a low dark current of 57.2fA and 159fA, respectively. The quantum efficiency of 29.8% at 280nm and <0.007% at 400nm indicates a high UV-to-visible rejection ratio of >4300. Single photon counting measurement at 280nm shows that a single photon detection efficiency of 2.83% with a low dark count rate of 22kHz is achieved at the avalanche breakdown voltage of 116.8V.

Hydrogen etching of 4H-SiC has been performed in a hot-wall chemical vapor deposition reactor to reduce surface damage and to create a bilayer-stepped surface morphology, optimal for initiation of growth on 4H-SiC substrates offcut 4° and 8° towards the <11-20> direction. To understand how step bunching evolves during the ramp to growth temperature, samples were etched ending at temperatures from 1400 to 1580°C under 0, 2 or 10 sccm of propane (C3H8) addition to hydrogen. Initial exploratory growth of 5 μm thick epilayers on the 4° etched surfaces are also discussed. Atomic force microscopy (AFM) and Nomarski microscopy were employed to investigate changes in the surface morphology. The 8° substrates subjected to H2-C3H8 etching up to growth temperature routinely exhibited bilayer steps. However, when the 4° substrates were etched with a 10 sccm C3H8 flow, considerable step bunching was observed. At 1450°C, with a 10 sccm of C3H8 flow (partial pressure is 1.25x10-5 bar), step bunching started with the formation of ribbon-like steps. Progression to higher temperature etches have shown the coalescence of the ribbons into larger macro-steps up to 30 nm in height. Etching 4° substrates under 2 sccm of C3H8 (partial pressure is 2.5x10-6 bar) or in pure H2 up to 1500°C results in minimal step bunching.

A set of three 4H-SiC wafers with manufacturer specified micropipe density of 0-5 cm-2 were characterized by x-ray diffraction (XRD) maps before and after final chemical-mechanical polish. After final polish, the wafers were also investigated with atomic force microscopy, radius of curvature measurements and cross-polarization (x-pol) mapping. It was found that there was largely a lack of correlation between the XRD and x-pol maps, which strongly suggests that x-pol is insensitive to crystalline imperfections to which XRD is sensitive.

Real-time analysis of downstream nitrogen process-gas flows during 4H-SiC growth is reported. A Hiden Analytical HPR-20 quadrupole mass-spectrometer (QMS) was used to measure the process gas composition in the gas-stream of a hot-wall chemical vapor deposition (CVD) reactor. Using the 28 amu peak, it was found that the nitrogen partial pressure measured by the mass spectrometer directly correlates to the expected partial pressure of nitrogen in the process cell based on input flows. Two staircase doping samples were grown to track doping variations. The nitrogen mass flow was varied and corresponded to doping levels ranging from 1x1015 cm-3 to 8x1018 cm-3. Electron and nitrogen concentrations in the epilayers were measured by capacitancevoltage (CV) profiling and secondary ion mass spectrometry (SIMS), respectively. These efforts show real-time QMS monitoring is effective during growth for determining relative changes in nitrogen concentration in the gas flow, and thus, the level of nitrogen incorporation into the growing layer.

Through the use of specially-prepared on-axis SiC substrates with patterned mesa tops completely free of atomic-scale surface steps, we have previously reported the growth of highquality GaN heteroepitaxial films with greatly reduced threading dislocation densities on the order of 107/cm2. In these films, we reported a defect substructure in which lateral a-type dislocations are present in the nucleation layer but do not bow into threading dislocations during the subsequent GaN growth. This study focuses further on the role of SiC substrate surface steps in the generation of misfit, a-type, and threading dislocations at the heteroepitaxial interface. By using weak-beam imaging (both to eliminate Moiré effects and to observe narrow dislocation images) from plan-view transmission electron microscopy (TEM), we identify dislocations generated on stepped and unstepped mesas and compare their geometries. We observe that misfit dislocations nucleated on an unstepped SiC mesa are confined to one set of a-type Burgers vectors of the form g=1/3 [2110] _ _ , straight and well-ordered so that they are less likely to interact with each other. On the other hand, misfit dislocation structures on a stepped SiC mesa surface are not nearly as well-ordered, having bowed structure with threading dislocations that appear to nucleate at SiC surface steps.

Silicon carbide (SiC) has become the substrate of choice for III-N epilayers applied to electronic devices due to the lack of a native III-N substrate. This is particularly true for high power applications, since the thermal conductivity of the substrate enhances device performance. Although the GaN lattice match is slightly better for SiC than for sapphire, the dislocation densities that result are still very high (generally in the high 108 cm-2 range) and often deleterious to device performance. Screw-component dislocations are especially critical since they serve as leakage paths in vertically conducting III-N devices. In this paper efforts to reduce the extended defect density in III-N films grown on SiC will be reviewed. Details on recent efforts to use step-free SiC mesa surfaces arrayed on commercial 4HSiC substrates will then be highlighted showing dramatic reductions in extended defect densities and the virtual elimination of critical defects for vertically conducting devices. In these experiments, SiC surfaces that are homoepitaxially grown step-free or of very low step density have been used as growth templates for thin (<3 μm) GaN films deposited on a novel 1000 Å AlN nucleation layer characterized by a total dislocation density two orders of magnitude lower than the previous state-of-the-art, and with no evidence of screw-component dislocations.