73 results on '"low-power CMOS"'
Search Results
2. 0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator
- Author
-
Fabian Khateb, Montree Kumngern, Tomasz Kulej, and Rajeev Kumar Ranjan
- Subjects
Differential difference transconductance amplifier (DDTA) ,shadow filter ,shadow oscillator ,analog filter ,low-voltage ,low-power CMOS ,Electrical engineering. Electronics. Nuclear engineering ,TK1-9971 - Abstract
This paper presents new applications of low-voltage and low-power multiple-input multiple-output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application’s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage- and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using $0.18\mu \text{m}$ TSMC CMOS technology.
- Published
- 2023
- Full Text
- View/download PDF
3. 0.5-V Nano-Power Voltage-Mode First-Order Universal Filter Based on Multiple-Input OTA
- Author
-
Fabian Khateb, Montree Kumngern, and Tomasz Kulej
- Subjects
Analog filter ,operational transconductance amplifier ,analog circuit ,low-voltage ,low-power CMOS ,Electrical engineering. Electronics. Nuclear engineering ,TK1-9971 - Abstract
This paper presents a new application of the multiple-input operational transconductance amplifier (MI-OTA). The MI-OTA has been used to realize a first-order universal filter which shows that the first-order transfer functions such as low-pass, high-pass, and all-pass filters can be obtained easily from a single topology by applying the input signal to the appropriate terminals. Moreover, both non-inverting and inverting transfer functions of all filtering functions can be obtained. The pole frequency of all filters can also be controlled electronically. The first-order all-pass filters have been selected to realize high-quality band-pass filter. For low-voltage supply operation and extremely low power consumption, the proposed MI-OTA is realized by the multiple-input bulk-driven MOS transistor technique with transistors operating in subthreshold voltage region. The circuit has been simulated using the $0.18 \mu \text{m}$ TSMC CMOS technology with 0.5 V of supply voltage and it consumes 29.77 nW of power for 10 nA nominal setting current. The post-layout simulation results show that the applications of MI-OTA agree well with theory.
- Published
- 2023
- Full Text
- View/download PDF
4. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Author
-
Winai Jaikla, Surasak Sangyaem, Piya Supavarasuwat, Fabian Khateb, Shahram Minaei, Tomasz Kulej, and Peerawut Suwanjan
- Subjects
First-order filter ,second-generation voltage conveyor ,low-voltage ,low-power CMOS ,Electrical engineering. Electronics. Nuclear engineering ,TK1-9971 - Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed first-order filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII’s current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase all-pass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The $0.18\mu \text{m}$ TSMC CMOS structure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage $V_{inpp}=300$ mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter is simulated and experimentally tested using a commercially available AD844 IC-based VCII with ±5 V power supply.
- Published
- 2023
- Full Text
- View/download PDF
5. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Author
-
Montree Kumngern, Tomasz Kulej, and Fabian Khateb
- Subjects
Operational transconductance amplifier (OTA) ,bulk-driven ,band-pass filter ,low-voltage ,low-power CMOS ,Electrical engineering. Electronics. Nuclear engineering ,TK1-9971 - Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage ( $\text{V}_{\mathrm {DD}}$ ) as the threshold voltage ( $\text{V}_{\mathrm {TH}}$ ) of a single MOS transistor, i.e., $\text{V}_{\mathrm {DD}}$ = $\text{V}_{\mathrm {TH}}$ = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75° phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF’s gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is −53.56 dB, the input integrated input-referred voltage noise is $17.9 \mu \text{V}_{\mathrm {rms}}$ , the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using $0.18 \mu \text{m}$ CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
- Full Text
- View/download PDF
6. Large Scale Fabrication of Graphene Based Nano‐Electromechanical (NEM) Contact Switches with Sub‐0.5 Volt Actuation
- Author
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Jothiramalingam Kulothungan and Karthi Kandhasamy
- Subjects
contact failures ,low‐power CMOS ,nano‐electromechanical (NEM) contact switches ,pull‐in voltage deviation ,Physics ,QC1-999 - Abstract
Abstract Nano‐electromechanical (NEM) contact switches are extensively studied to suppress the limitations of conventional complementary metal‐oxide‐semiconductor (CMOS) transistors. The attributes of NEM contact switches includes reduced power consumption, reduced off‐state leakage current, and increased on‐state current and sub‐thermal switching. However, unacceptably high pull‐in voltage and low contact lifetime posed a significant challenge for the use of NEM contact switches in energy efficient CMOS applications. Here, graphene‐based electro‐statically actuated NEM contact switches with ultra‐low pull‐in voltage and significant improvement in the contact lifetime are demonstrated. This is achieved by using the graphene on gold electrode as a contact material. The graphene NEM contact switches with graphene as a contact material exhibit an ultra‐low pull‐in voltage of < 0.5 V and high contact lifetime of more than 1.5× 106 cycles. The switches also show an excellent switching performance with high on/off ratio of ≈108, an extremely low off‐state current of ≈100 fA, and small hysteresis window of < 0.1 V.
- Published
- 2023
- Full Text
- View/download PDF
7. Buried Metal Silicon-on-Insulator Junctionless Transistor for Low Power CMOS Logic Circuits.
- Author
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Tiple, Kaustubh K. and Patil, Ganesh C.
- Abstract
This paper deals with an innovative structure of silicon-on-insulator junctionless transistor (SOIJLT) by incorporating a buried metal layer of proper work-function which creates the Schottky junction between device layer and the buried metal layer. The buried metal layer results in perfect volume inversion in OFF-state due to which in comparison to SOIJLT, the off-state current (I
OFF ) of the proposed buried metal SOIJLT (BMSOIJLT) is significantly reduced. In addition, the short-channel effects such as subthreshold swing (SS) and the drain-induced barrier lowering (DIBL) in the proposed BMSOIJLT are reduced by 40% and 30% respectively over the SOIJLT device. The CMOS digital logic circuits such as inverter, NAND gate and the NOR gate have also been implemented using the mixed-mode device/circuit simulations. Despite due to lower ON-state drive current (ION ) and the parasitic capacitances in the proposed BMSOIJLT, the propagation delay in SOIJLT and the proposed BMSOIJLT based logic gates is comparable. Moreover, due to significant reduction in IOFF the static power dissipation in the proposed BMSOIJLT based logic gates is significantly low. [ABSTRACT FROM AUTHOR]- Published
- 2023
- Full Text
- View/download PDF
8. Electronically Tunable Universal Filter and Quadrature Oscillator Using Low-Voltage Differential Difference Transconductance Amplifiers
- Author
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Montree Kumngern, Pichai Suksaibul, Fabian Khateb, and Tomasz Kulej
- Subjects
Universal filter ,quadrature oscillator ,differential difference transconductance amplifier ,low-voltage ,low-power CMOS ,Electrical engineering. Electronics. Nuclear engineering ,TK1-9971 - Abstract
This paper presents a new electronically tunable universal filter and quadrature oscillator for low frequency biomedical and biosensor applications employing low-voltage differential difference transconductance amplifier (DDTA). The DDTA CMOS structure uses 0.5 V of supply voltage and consumes 277 nW of power. Unlike the previous universal filters, the proposed filter provides many transfer functions of the standard five transfer functions such as low-pass, high-pass, band-pass, band-stop and all-pass with both unity and controlled voltage gains as well as both inverting and non-inverting transfer functions. The natural frequency and the voltage gain of the five standard transfer functions can be controlled electronically. For the band-pass filter, the third intermodulation distortion (IMD3) was 0.37% for 20 mVpp input signal while the output integrated noise was 61.37 $\mu \text{V}$ . The dynamic range (DR) was 53.27 dB for 1% IMD3. The quadrature oscillator has electronically and orthogonal control of the condition and frequency of oscillation. The proposed circuit and its applications were designed and verified via Cadence simulator tool using 0.13 $\mu \text{m}$ UMC CMOS technology. Further, the circuit was evaluated by PSPICE simulation and experiment test using commercial OTA LM13700.
- Published
- 2022
- Full Text
- View/download PDF
9. All-2D-Materials Subthreshold-Free Field-Effect Transistor with Near-Ideal Switching Slope.
- Author
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Hu J, Li H, Chen A, Zhang Y, Wang H, Fu Y, Zhou X, Loh KP, Kang Y, Chai J, Wang C, Zhou J, Miao J, Zhao Y, Zhong S, Zhao R, Liu K, Xu Y, and Yu B
- Abstract
The Boltzmann Tyranny, set by thermionic statistics, dictates the lower limit of switching slope (SS) of a MOSFET to be 60 mV/dec, the fundamental barrier for low-dissipative electronics. The large SS leads to nonscalable voltage, significant leakage, and power consumption, particularly at short channels, making transistor scaling an intimidating challenge. In recent decades, an array of steep-slope transistors has been proposed; none is close to an ideal switch with ultimately abrupt switching (SS ∼ 0 mV/dec) between the binary logic states. We demonstrated an all-2D-materials van-der-Waals-heterostructure (vdW)-based FET that exhibits ultrasteep switching (0.33 mV/dec), a large on/off current ratio (∼10
7 ), and an ultralow off current (∼0.1 pA). The "Subthreshold-Free" operation achieved by the collective behavior of functional materials enables FET switching directly from the OFF-state to the ON-state with entirely eliminated subthreshold region, behaving as the ideal logic switch. Two-inch wafer-scale device fabrication is demonstrated. Boosted by device innovation and emerging materials, the research presents an advancement in achieving the "beyond-Boltzmann" transistors, overcoming one of the CMOS electronics' most infamous technology barriers that have plagued the research community for decades.- Published
- 2024
- Full Text
- View/download PDF
10. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Author
-
Jaikla, Winai, Sangyaem, Surasak, Supavarasuwat, Piya, Khateb, Fabian, Minaei, Shahram, Kulej, Tomasz, Suwanjan, Peerawut, Jaikla, Winai, Sangyaem, Surasak, Supavarasuwat, Piya, Khateb, Fabian, Minaei, Shahram, Kulej, Tomasz, and Suwanjan, Peerawut
- Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed firstorder filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase allpass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18 mu mTSMCCMOSstructure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage V-inpp =300mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter i
- Published
- 2023
11. 0.5-V Nano-Power Voltage-Mode First-Order Universal Filter Based on Multiple-Input OTA
- Author
-
Khateb, Fabian, Kumngern, Montree, Kulej, Tomasz, Khateb, Fabian, Kumngern, Montree, and Kulej, Tomasz
- Abstract
This paper presents a new application of the multiple-input operational transconductance amplifier (MI-OTA). The MI-OTA has been used to realize a first-order universal filter which shows that the first-order transfer functions such as low-pass, high-pass, and all-pass filters can be obtained easily from a single topology by applying the input signal to the appropriate terminals. Moreover, both non-inverting and inverting transfer functions of all filtering functions can be obtained. The pole frequency of all filters can also be controlled electronically. The first-order all-pass filters have been selected to realize high-quality band-pass filter. For low-voltage supply operation and extremely low power consumption, the proposed MI-OTA is realized by the multiple-input bulk-driven MOS transistor technique with transistors operating in subthreshold voltage region. The circuit has been simulated using the $0.18 \mu \text{m}$ TSMC CMOS technology with 0.5 V of supply voltage and it consumes 29.77 nW of power for 10 nA nominal setting current. The post-layout simulation results show that the applications of MI-OTA agree well with theory.
- Published
- 2023
12. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Author
-
Kumngern, Montree, Kulej, Tomasz, Khateb, Fabian, Kumngern, Montree, Kulej, Tomasz, and Khateb, Fabian
- Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage (V-DD) as the threshold voltage (V-TH) of a single MOS transistor, i.e., V-DD = V-TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75 degrees phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 mu V-rms, the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 mu m CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
13. 0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator
- Author
-
Khateb, Fabian, Kumngern, Montree, Kulej, Tomasz, Kumar Ranjan, Rajeev, Khateb, Fabian, Kumngern, Montree, Kulej, Tomasz, and Kumar Ranjan, Rajeev
- Abstract
This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.
- Published
- 2023
14. 0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator
- Abstract
This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.
- Published
- 2023
15. 0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator
- Abstract
This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.
- Published
- 2023
16. 0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator
- Abstract
This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.
- Published
- 2023
17. 0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator
- Abstract
This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.
- Published
- 2023
18. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed firstorder filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase allpass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18 mu mTSMCCMOSstructure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage V-inpp =300mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter i
- Published
- 2023
19. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage (V-DD) as the threshold voltage (V-TH) of a single MOS transistor, i.e., V-DD = V-TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75 degrees phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 mu V-rms, the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 mu m CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
20. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed firstorder filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase allpass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18 mu mTSMCCMOSstructure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage V-inpp =300mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter i
- Published
- 2023
21. 0.5-V Nano-Power Voltage-Mode First-Order Universal Filter Based on Multiple-Input OTA
- Abstract
This paper presents a new application of the multiple-input operational transconductance amplifier (MI-OTA). The MI-OTA has been used to realize a first-order universal filter which shows that the first-order transfer functions such as low-pass, high-pass, and all-pass filters can be obtained easily from a single topology by applying the input signal to the appropriate terminals. Moreover, both non-inverting and inverting transfer functions of all filtering functions can be obtained. The pole frequency of all filters can also be controlled electronically. The first-order all-pass filters have been selected to realize high-quality band-pass filter. For low-voltage supply operation and extremely low power consumption, the proposed MI-OTA is realized by the multiple-input bulk-driven MOS transistor technique with transistors operating in subthreshold voltage region. The circuit has been simulated using the $0.18 \mu \text{m}$ TSMC CMOS technology with 0.5 V of supply voltage and it consumes 29.77 nW of power for 10 nA nominal setting current. The post-layout simulation results show that the applications of MI-OTA agree well with theory.
- Published
- 2023
22. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed firstorder filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase allpass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18 mu mTSMCCMOSstructure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage V-inpp =300mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter i
- Published
- 2023
23. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage (V-DD) as the threshold voltage (V-TH) of a single MOS transistor, i.e., V-DD = V-TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75 degrees phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 mu V-rms, the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 mu m CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
24. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage (V-DD) as the threshold voltage (V-TH) of a single MOS transistor, i.e., V-DD = V-TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75 degrees phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 mu V-rms, the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 mu m CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
25. 0.5-V Nano-Power Voltage-Mode First-Order Universal Filter Based on Multiple-Input OTA
- Abstract
This paper presents a new application of the multiple-input operational transconductance amplifier (MI-OTA). The MI-OTA has been used to realize a first-order universal filter which shows that the first-order transfer functions such as low-pass, high-pass, and all-pass filters can be obtained easily from a single topology by applying the input signal to the appropriate terminals. Moreover, both non-inverting and inverting transfer functions of all filtering functions can be obtained. The pole frequency of all filters can also be controlled electronically. The first-order all-pass filters have been selected to realize high-quality band-pass filter. For low-voltage supply operation and extremely low power consumption, the proposed MI-OTA is realized by the multiple-input bulk-driven MOS transistor technique with transistors operating in subthreshold voltage region. The circuit has been simulated using the $0.18 \mu \text{m}$ TSMC CMOS technology with 0.5 V of supply voltage and it consumes 29.77 nW of power for 10 nA nominal setting current. The post-layout simulation results show that the applications of MI-OTA agree well with theory.
- Published
- 2023
26. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed firstorder filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase allpass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18 mu mTSMCCMOSstructure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage V-inpp =300mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter i
- Published
- 2023
27. 0.5-V Nano-Power Voltage-Mode First-Order Universal Filter Based on Multiple-Input OTA
- Abstract
This paper presents a new application of the multiple-input operational transconductance amplifier (MI-OTA). The MI-OTA has been used to realize a first-order universal filter which shows that the first-order transfer functions such as low-pass, high-pass, and all-pass filters can be obtained easily from a single topology by applying the input signal to the appropriate terminals. Moreover, both non-inverting and inverting transfer functions of all filtering functions can be obtained. The pole frequency of all filters can also be controlled electronically. The first-order all-pass filters have been selected to realize high-quality band-pass filter. For low-voltage supply operation and extremely low power consumption, the proposed MI-OTA is realized by the multiple-input bulk-driven MOS transistor technique with transistors operating in subthreshold voltage region. The circuit has been simulated using the $0.18 \mu \text{m}$ TSMC CMOS technology with 0.5 V of supply voltage and it consumes 29.77 nW of power for 10 nA nominal setting current. The post-layout simulation results show that the applications of MI-OTA agree well with theory.
- Published
- 2023
28. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage (V-DD) as the threshold voltage (V-TH) of a single MOS transistor, i.e., V-DD = V-TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75 degrees phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 mu V-rms, the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 mu m CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
29. Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification
- Abstract
In this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed firstorder filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase allpass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18 mu mTSMCCMOSstructure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage V-inpp =300mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter i
- Published
- 2023
30. 0.5-V Nano-Power Voltage-Mode First-Order Universal Filter Based on Multiple-Input OTA
- Abstract
This paper presents a new application of the multiple-input operational transconductance amplifier (MI-OTA). The MI-OTA has been used to realize a first-order universal filter which shows that the first-order transfer functions such as low-pass, high-pass, and all-pass filters can be obtained easily from a single topology by applying the input signal to the appropriate terminals. Moreover, both non-inverting and inverting transfer functions of all filtering functions can be obtained. The pole frequency of all filters can also be controlled electronically. The first-order all-pass filters have been selected to realize high-quality band-pass filter. For low-voltage supply operation and extremely low power consumption, the proposed MI-OTA is realized by the multiple-input bulk-driven MOS transistor technique with transistors operating in subthreshold voltage region. The circuit has been simulated using the $0.18 \mu \text{m}$ TSMC CMOS technology with 0.5 V of supply voltage and it consumes 29.77 nW of power for 10 nA nominal setting current. The post-layout simulation results show that the applications of MI-OTA agree well with theory.
- Published
- 2023
31. 31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
- Abstract
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage (V-DD) as the threshold voltage (V-TH) of a single MOS transistor, i.e., V-DD = V-TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75 degrees phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 mu V-rms, the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 mu m CMOS technology from TSMC. The simulation results agree with the presented theory.
- Published
- 2023
32. A 0.5-V Bulk-Driven Active Voltage Attenuator.
- Author
-
Vlassis, Spyridon, Souliotis, George, Khateb, Fabian, and Kulej, Tomasz
- Subjects
- *
DIFFERENTIAL amplifiers , *POWER resources , *ELECTRIC potential , *LOW voltage systems , *VOLTAGE-controlled oscillators - Abstract
In this work, a novel differential active voltage attenuator that is capable of operating under low supply voltage and power consumption is presented. The proposed attenuator is based on bulk-driven MOS devices. Thanks to the use of the fully balanced differential structure, the attenuator demonstrates improved common-mode rejection capability. The attenuator has been fabricated using 180-nm TSMC CMOS technology with 0.5 V power supply and 0.366 µW power consumption. The experimental results give a voltage attenuation around − 6 dB, rail-to-rail input common-mode range and common-mode rejection ratio around 27.8 dB. As an application example, a fully balanced differential amplifier is designed and simulated. The simulated and measurement results agree with the theory and confirm the robustness of the design. [ABSTRACT FROM AUTHOR]
- Published
- 2019
- Full Text
- View/download PDF
33. Using the Gate-Diffusion Input Technique for Low-Power Programmable Logic Array Design
- Author
-
Chiu, Shou-Hung, Wei, Kai-Cheng, Juang, Jengnan, editor, and Huang, Yi-Cheng, editor
- Published
- 2013
- Full Text
- View/download PDF
34. Short-Range Quality-Factor Modulation (SQuirM) for Low Power High Speed Inductive Data Transfer.
- Author
-
Schormans, Matthew, Jiang, Dai, Valente, Virgilio, and Demosthenous, Andreas
- Subjects
- *
BRAIN-computer interfaces , *WIRELESS communications , *ARTIFICIAL implants , *BIOTELEMETRY , *MEDICAL equipment , *TELEMETRY - Abstract
Wireless data telemetry for implantable medical devices (IMDs) has, in general, been limited to a few Mbps, and used for applications such as transmitting recordings from an implanted monitoring device, or uploading commands to an implanted stimulator. However, modern neural interfaces need to record high resolution potentials from hundreds of neurons; this requires much higher data rates. While fast wireless communication is possible using existing standards such as WiFi, power consumption demands are far too high for IMDs. Short range inductive link based telemetry, in particular impulse-based systems such as pulse-harmonic modulation (PHM), have demonstrated transfer speeds of up to 20 Mbps with a small power budget. However, these systems require complex and precise circuits, making them potentially susceptible to inter-symbol-interference. This work presents a new method named Short-range Quality-factor Modulation (SQuirM), which retains the low power consumption and high data rate of PHM, while improving the resilience of the system and simplifying the circuit design. Transmitter and receiver circuits were fabricated using 0.35 ${\mu }m$ CMOS. The circuits were capable of reliably transceiving data at speeds of up to 50.4 Mbps, with a BER of $< 4.5 \times 10^{-10}$ , and a transmitter energy consumption of 8.11 pJ/b. [ABSTRACT FROM AUTHOR]
- Published
- 2019
- Full Text
- View/download PDF
35. Electronically Tunable Universal Filter and Quadrature Oscillator Using Low-Voltage Differential Difference Transconductance Amplifiers
- Author
-
Kumngern, Montree, Suksaibul, Pichai, Khateb, Fabian, Kulej, Tomasz, Kumngern, Montree, Suksaibul, Pichai, Khateb, Fabian, and Kulej, Tomasz
- Abstract
This paper presents a new electronically tunable universal filter and quadrature oscillator for low frequency biomedical and biosensor applications employing low-voltage differential difference transconductance amplifier (DDTA). The DDTACMOS structure uses 0.5V of supply voltage and consumes 277 nW of power. Unlike the previous universal filters, the proposed filter provides many transfer functions of the standard five transfer functions such as low-pass, high-pass, band-pass, band-stop and all-pass with both unity and controlled voltage gains as well as both inverting and non-inverting transfer functions. The natural frequency and the voltage gain of the five standard transfer functions can be controlled electronically. For the band-pass filter, the third intermodulation distortion (IMD3) was 0.37% for 20 mV(pp) input signal while the output integrated noise was 61.37 mu V. The dynamic range (DR) was 53.27 dB for 1% IMD3. The quadrature oscillator has electronically and orthogonal control of the condition and frequency of oscillation. The proposed circuit and its applications were designed and verified via Cadence simulator tool using 0.13 mu m UMC CMOS technology. Further, the circuit was evaluated by PSPICE simulation and experiment test using commercial OTA LM13700.
- Published
- 2022
36. Electronically Tunable Universal Filter and Quadrature Oscillator Using Low-Voltage Differential Difference Transconductance Amplifiers
- Abstract
This paper presents a new electronically tunable universal filter and quadrature oscillator for low frequency biomedical and biosensor applications employing low-voltage differential difference transconductance amplifier (DDTA). The DDTACMOS structure uses 0.5V of supply voltage and consumes 277 nW of power. Unlike the previous universal filters, the proposed filter provides many transfer functions of the standard five transfer functions such as low-pass, high-pass, band-pass, band-stop and all-pass with both unity and controlled voltage gains as well as both inverting and non-inverting transfer functions. The natural frequency and the voltage gain of the five standard transfer functions can be controlled electronically. For the band-pass filter, the third intermodulation distortion (IMD3) was 0.37% for 20 mV(pp) input signal while the output integrated noise was 61.37 mu V. The dynamic range (DR) was 53.27 dB for 1% IMD3. The quadrature oscillator has electronically and orthogonal control of the condition and frequency of oscillation. The proposed circuit and its applications were designed and verified via Cadence simulator tool using 0.13 mu m UMC CMOS technology. Further, the circuit was evaluated by PSPICE simulation and experiment test using commercial OTA LM13700.
- Published
- 2022
37. Electronically Tunable Universal Filter and Quadrature Oscillator Using Low-Voltage Differential Difference Transconductance Amplifiers
- Abstract
This paper presents a new electronically tunable universal filter and quadrature oscillator for low frequency biomedical and biosensor applications employing low-voltage differential difference transconductance amplifier (DDTA). The DDTACMOS structure uses 0.5V of supply voltage and consumes 277 nW of power. Unlike the previous universal filters, the proposed filter provides many transfer functions of the standard five transfer functions such as low-pass, high-pass, band-pass, band-stop and all-pass with both unity and controlled voltage gains as well as both inverting and non-inverting transfer functions. The natural frequency and the voltage gain of the five standard transfer functions can be controlled electronically. For the band-pass filter, the third intermodulation distortion (IMD3) was 0.37% for 20 mV(pp) input signal while the output integrated noise was 61.37 mu V. The dynamic range (DR) was 53.27 dB for 1% IMD3. The quadrature oscillator has electronically and orthogonal control of the condition and frequency of oscillation. The proposed circuit and its applications were designed and verified via Cadence simulator tool using 0.13 mu m UMC CMOS technology. Further, the circuit was evaluated by PSPICE simulation and experiment test using commercial OTA LM13700.
- Published
- 2022
38. Electronically Tunable Universal Filter and Quadrature Oscillator Using Low-Voltage Differential Difference Transconductance Amplifiers
- Abstract
This paper presents a new electronically tunable universal filter and quadrature oscillator for low frequency biomedical and biosensor applications employing low-voltage differential difference transconductance amplifier (DDTA). The DDTACMOS structure uses 0.5V of supply voltage and consumes 277 nW of power. Unlike the previous universal filters, the proposed filter provides many transfer functions of the standard five transfer functions such as low-pass, high-pass, band-pass, band-stop and all-pass with both unity and controlled voltage gains as well as both inverting and non-inverting transfer functions. The natural frequency and the voltage gain of the five standard transfer functions can be controlled electronically. For the band-pass filter, the third intermodulation distortion (IMD3) was 0.37% for 20 mV(pp) input signal while the output integrated noise was 61.37 mu V. The dynamic range (DR) was 53.27 dB for 1% IMD3. The quadrature oscillator has electronically and orthogonal control of the condition and frequency of oscillation. The proposed circuit and its applications were designed and verified via Cadence simulator tool using 0.13 mu m UMC CMOS technology. Further, the circuit was evaluated by PSPICE simulation and experiment test using commercial OTA LM13700.
- Published
- 2022
39. Novel low-cost and fault-tolerant reversible logic adders.
- Author
-
Valinataj, Mojtaba, Mirshekar, Mahboobeh, and Jazayeri, Hamid
- Subjects
- *
FAULT-tolerant control systems , *FAULT-tolerant computing , *LOGIC circuits , *ADDERS (Digital electronics) , *BINARY codes - Abstract
In recent years, reversible logic circuits have received considerable attention due to their diverse applications in various fields. As the computing systems are susceptible to different environmental effects which can impact their intended operations, having the fault-tolerance capability is of great importance. In this paper, at first, a novel reversible gate is presented to achieve a parity preserving full adder which serves as the main building block of different adders. Further on, by using the proposed full adder and new arrangements of other reversible gates, some new low-cost fault-tolerant adders including binary coded decimal, carry skip and carry look-ahead architectures are presented. The new adders are highly efficient in the quantum cost, total logical calculation and transistor count compared to the existing designs. In addition, regarding other factors including the number of gates, garbage outputs and maximum delay, they are the best or among the favorite parity preserving reversible adders. [ABSTRACT FROM AUTHOR]
- Published
- 2016
- Full Text
- View/download PDF
40. 80 dB tuning range transimpedance amplifier exploiting the Switched-Resistor approach.
- Author
-
Centurelli, Francesco, Fava, Alessandro, Scotti, Giuseppe, and Trifiletti, Alessandro
- Subjects
- *
VOLTAGE-controlled oscillators , *MONTE Carlo method , *PSYCHOLOGICAL feedback , *COMMERCIAL art - Abstract
This paper presents the design of a low-noise, low-power transimpedance amplifier (TIA) for biomedical applications. The proposed TIA exploits for the first time in the literature a Switched–Resistor (SR) as the feedback element in order to achieve a digitally tunable transimpedance gain with an extremely large tuning range (higher than 80 dB) and a maximum value as high as 10 GΩ. Another important feature which comes with the adoption of the SR technique is that the output voltage is already sampled with the SR clock signal and this simplifies the design of the following digitizer block. The circuit has been designed in a commercial 130 nm CMOS technology and simulation results show a minimum IRCSN (input-referred current spectrum noise) of 1.67 fA/√Hz and a total power consumption of 0.9 μW with a 0.6 V supply voltage. Extensive parametric and Monte Carlo simulations have confirmed a good robustness against PVT and mismatch variations. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
41. Transistor- and Circuit-Design Optimization for Low-Power CMOS.
- Author
-
Mi-Chang Chang, Chih-Sheng Chang, Chih-Ping Chao, Ken-Ichi Goto, Meikei Leong, Lee-Chung Lu, and Diaz, Carlos H.
- Subjects
- *
ELECTRIC power , *TRANSISTOR circuits , *ELECTRONIC circuits , *COMPLEMENTARY metal oxide semiconductors , *ELECTRONIC circuit design , *SYSTEMS design , *SYSTEM analysis , *EMBEDDED computer systems , *SEMICONDUCTORS - Abstract
CMOS-technology scaling has moved to a power-constrained condition regardless of the application segments. Power management in advanced CMOS technology drives the need to conciliate scaling-driven fundamental material limitations with product and application evolution requirements. Flexible CMOS technologies and tighter interaction between process development and circuit/system design are needed to efficiently realize systems on a chip. This paper reviews issues associated with transistor scaling and co-optimization for power-management circuit-design schemes for active- and leakage-power control. This paper also addresses the derived trends and implications on 110 and analog-transistor scaling. [ABSTRACT FROM AUTHOR]
- Published
- 2008
- Full Text
- View/download PDF
42. 11 nW Signal Acquisition Platform for Remote Biosensing
- Author
-
Alberto Gancedo, Omer Can Akgun, and Wouter A. Serdijn
- Subjects
Signal processing ,inductive link ,ultra-low energy ,time-mode operation ,business.industry ,Computer science ,Noise (signal processing) ,020208 electrical & electronic engineering ,Electrical engineering ,02 engineering and technology ,Sense (electronics) ,Signal ,020202 computer hardware & architecture ,Sampling (signal processing) ,Modulation ,0202 electrical engineering, electronic engineering, information engineering ,Harmonic ,EEG ,business ,Communication channel ,low-power CMOS - Abstract
This paper presents the design of an extremely low-energy biosensing platform that utilizes voltage to time conversion and time-mode signal processing to sense and accommodate electrophysiological biosignals that will be later sent remotely using a simple and low power communication scheme. The electrode input is fed to a chain of monostable multivibrators used as analog-to-time converters, which create time pulses whose widths are proportional to the input signal. These pulses are transmitted to an external receiver by means of single-pulse harmonic modulation as the communication scheme, at a carrier frequency of 10 MHz. The platform is designed to be implemented in a standard 0.18μm IC process with an energy dissipation per sample per channel of 42.72 pJ, including communication, operating from a supply voltage of 0.6V with an input referred noise of 12.3 μVrms. The resulting SNR for OSR=256 is 35.19 dB, and the system’s power consumption at a sampling and communication rate of 256 Hz is 10.94 nW.
- Published
- 2019
- Full Text
- View/download PDF
43. 11 nW Signal Acquisition Platform for Remote Biosensing
- Author
-
Gancedo Reguilon, Alberto (author), Akgün, O.C. (author), Serdijn, W.A. (author), Gancedo Reguilon, Alberto (author), Akgün, O.C. (author), and Serdijn, W.A. (author)
- Abstract
This paper presents the design of an extremely low-energy biosensing platform that utilizes voltage to time conversion and time-mode signal processing to sense and accommodate electrophysiological biosignals that will be later sent remotely using a simple and low power communication scheme. The electrode input is fed to a chain of monostable multivibrators used as analog-to-time converters, which create time pulses whose widths are proportional to the input signal. These pulses are transmitted to an external receiver by means of single-pulse harmonic modulation as the communication scheme, at a carrier frequency of 10 MHz. The platform is designed to be implemented in a standard 0.18μm IC process with an energy dissipation per sample per channel of 42.72 pJ, including communication, operating from a supply voltage of 0.6V with an input referred noise of 12.3 μVrms. The resulting SNR for OSR=256 is 35.19 dB, and the system’s power consumption at a sampling and communication rate of 256 Hz is 10.94 nW., Bio-Electronics, application
- Published
- 2019
- Full Text
- View/download PDF
44. Energy-Efficient Wireless Transceivers Powered by Radio Frequency Energy Harvesting
- Author
-
Karami, Mohammadamin
- Subjects
- RF Energy Harvesting, Wireless Transceiver, Low-power CMOS, RF-powered transceiver, CMOS, WuRx, WuTx
- Abstract
Abstract: RF energy harvesting, the process of scavenging energy from ambient electromagnetic waves, is becoming a feasible option for powering low-power electronic devices such as Internet of Things (IoT) devices, biomedical implants, and harsh environment sensors in which traditional wiring solutions or using batteries is costly or infeasible. However, RF energy density is limited because of its fast attenuation over distance and the constraints on the maximum power that can be transmitted over a channel, as set by the regularity bodies. To enable the operation of these nodes solely powered by RF energy with maximum range possible, the first part of this Ph.D work has focused on enhancing the efficiency and sensitivity of an RF Energy Harvester (RFEH) to increase the amount of the harvested energy from the available RF power. The second part is dedicated to lowering the power consumption and the required DC supply voltage of the wireless transceivers to finally arrive at a highly-sensitive RF-powered wireless transceiver. In the first part of this dissertation, first, a systematic methodology is presented for the co-design of a matching network and a rectifier for RFEHs that results in maximum power conversion efficiency (PCE) for a given available power. This method is based on a newly developed rectifier model capable of calculating the CMOS Dickson’s rectifier’s input/output voltages at a given input power developed for low/high input power regimes. The proposed model allows for the co-design of the matching network and rectifier in a fraction of the time that takes for the design of a RFEH using previously developed models that rely on the knowledge of rectifier’s input voltage levels, where a computationally extensive iterative design procedure must be performed because of the interdependency of the rectifier’s input voltage, the input power, and the matching network’s and rectifier’s parameters. Second, a highly-efficient RFEH that utilizes an extra matching network to produce a passively-amplified adaptive compensation voltage is presented. The compensation voltage produced on the gate of the transistors reduces the transistors’ conduction loss by increasing the gate-source voltage when transistors are on and reduces the leakage current by producing a negative gate-source voltage when the transistors are off. This is the first work that produces an adaptive compensation voltage without using active components, resulting in a significantly higher conversion efficiency if passive components of high quality are utilized. For the second part of the dissertation, first, an ultra-low-power low-voltage wakeup transmitter (WuTx) is proposed that is capable of transmitting simultaneously the analog outputs of two sensors using short pulses that modulates their LOW and HIGH time with the analog inputs. The minimalist design of the proposed transmitter significantly reduces the overall power consumption by avoiding power-hungry data converters for sensor readout circuitry and modulation, short pulses at the output that enable the power amplifier for only a short time, during transmission along with operation in the subthreshold region. Second, to achieve the primary goal of the dissertation, a fully RF-powered wireless transceiver that integrates an efficient RFEH, a wake-up receiver (WuRx), and a wake-up transmitter (WuTx) on a single CMOS chip is introduced. The capability of the WuRx to operate without using a power management unit (PMU) enhances the sensitivity and overall conversion efficiency of the RFEH system. Utilizing an ultra-low-power ultra-low-voltage envelope detector that produces its required signal levels using passive amplification instead of an active low-noise amplifier, the transceiver’s input sensitivity has been improved significantly compared to that of other previously reported RF-powered transceivers. The proposed transmitter consists of a fast start-up oscillator and an efficient class E power amplifier, which can be externally tuned for different output powers.
- Published
- 2021
45. The Application of an Ultrathin ALD HfSiON Cap Layer on SiON Dielectrics for Ni-FUSI CMOS Technology Targeting at Low-Power Applications.
- Author
-
Chang, S. Z., Yu, H. Y., Veloso, A., Lauwers, A., Delabie, A., Everaert, J.-l., Kerner, C., Absil, P., Hoffmann, T., and Biesemans, S.
- Subjects
SILICIDES ,DIELECTRICS ,COMPLEMENTARY metal oxide semiconductors ,LOW voltage systems ,CAPACITANCE meters - Abstract
In this letter, we report that the application of a thin HfSiON cap layer (2-10 cycles via atomic layer deposition) on SiON host dielectrics in phase-controlled Ni-fully-silicide (FUSI) CMOS technology is effective to modulate the device V
t and reduce the gate leakage while maintaining a similar gate capacitance equivalent thickness and a long channel device mobility (at an Eeff of 0.8 MV/cm). High-Vt ring oscillator with a delay of 17 ps has been demonstrated, with a much-reduced static power (~40 times) as compared to the Ni-FUSI device using the pure SiON dielectrics. It is proposed that the phase-controlled Ni-FUSI technology using the SiON dielectrics capped with thin HfSiON is promising for the 45-nm and beyond low-power CMOS applications. [ABSTRACT FROM AUTHOR]- Published
- 2007
- Full Text
- View/download PDF
46. A 0.8 V CMOS amplifier design
- Author
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Zhang, C., Srivastava, A., and Ajmera, P. K.
- Published
- 2006
- Full Text
- View/download PDF
47. A low-power CMOS super-regenerative receiver at 1 GHz
- Author
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Catherine Dehollain, A. Vouilloz, and Michel Declercq
- Subjects
application specific integrated circuits ,Engineering ,low-noise amplifier ,100 kHz ,0.35 micron ,low-power CMOS receiver ,1.2 mW ,Sawtooth wave ,Noise figure ,envelope detector ,super-regenerative receiver ,1 GHz ,sample/hold function ,radio receivers ,Low-power electronics ,baseband amplifier ,sawtooth quench signal ,UHF integrated circuits ,Center frequency ,Electrical and Electronic Engineering ,microwave receivers ,CMOS analogue integrated circuits ,low-power CMOS ,Physics ,AGC circuit ,business.industry ,ASIC ,Amplifier ,Electrical engineering ,14.7 dB ,power consumption ,field effect MMIC ,low-voltage operation ,500 kHz ,Low-noise amplifier ,LNA ,1.5 V ,CMOS ,sample and hold circuits ,Baseband ,super-regenerative oscillator ,low-power electronics ,sample/hold capability ,business ,die surface ,Envelope detector ,AGC circuitry - Abstract
A low-power and low-voltage super-regenerative receiver operating at 1 GHz and implemented in a 0.35 /spl mu/m CMOS process is described. The receiver includes a LNA, a super-regenerative oscillator, an envelope detector, AGC circuitry with sample/hold capability and a baseband amplifier. The die-surface is equal to 0.25 mm/sup 2/. An overall noise figure of 14.7 dB is achieved. The power consumption is less than 1.2 mW at V/sub DD/=1.5 V. A 100 kHz saw tooth quench signal has been used to achieve an interferer rejection of -35.9 dB at 500 kHz from the center frequency.
- Published
- 2001
- Full Text
- View/download PDF
48. A low-power CMOS 0.13 µm Charge-Sensitive Preamplifier for GEM detectors
- Author
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PEZZOTTA, ALESSANDRO, COSTANTINI, ANDREA, DE MATTEIS, MARCELLO, D'Amico, S, GORINI, GIUSEPPE, Murtas, F, BASCHIROTTO, ANDREA, Pezzotta, A, Costantini, A, DE MATTEIS, M, D'Amico, S, Gorini, G, Murtas, F, and Baschirotto, A
- Subjects
trends ,equivalent noise charge ,gas electron multiplier detector ,CMOS ,Capacitance ,Detector ,CMOS technology ,preamplifier ,electric sensing device ,front-end ,Miller operational amplifier ,electron multiplier ,Stability analysi ,Power demand ,charge-sensitive ,readout ,charge-sensitive preamplifier ,GEM detector ,CMOS integrated circuit ,Noise ,low-power electronic ,ize 0.13 µm ,low-power CMOS - Abstract
In this paper a Charge-Sensitive Preamplifier (CSP) for GEM (Gas Electron Multiplier) detectors readout is presented. The CSP is responsible for signal acquisition and the conversion of the input charge into a voltage signal. The design has been realized in 0.13 mu m CMOS technology. It has been demonstrated through a detailed analysis that this is the best CMOS technology to be used in this case, as regards power consumption, intrinsic gain, noise and radiation hardness. The aim is to reduce the power consumption while maintaining other performance at the state-of-the-art. The preamplifier is composed by a three-stage nested Miller Operational Amplifier, with a feed-forward compensation. The system is able to manage a 15 pF detector capacitance. The global power consumption is 1.1 mW and the Equivalent Noise Charge is 418 e(-)
- Published
- 2013
49. Técnicas de baixo consumo para módulos de hardware de codificação de vídeo H.264
- Author
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Walter, Fábio Leandro and Bampi, Sergio
- Subjects
Low-power CMOS ,VLSI architecture ,Clock gating ,Vídeo digital ,Video digital [Codificacao] ,Intra-only decoder - Abstract
Este trabalho trata da aplicação de técnicas de minimização de consumo de potência para blocos digitais para o algoritmo de SAD e o decodificador H.264/AVC Intra-Only. Na descrição de hardware são acrescidas as técnicas de paralelismo e pipeline. Na síntese física e lógica, incluem-se as técnicas de inativação do relógio ( clock gating), múltiplas tensões de threshold, diferentes tecnologias e diferentes tensões de alimentação. A síntese é feita nas ferramentas da CadenceTM com exploração arquitetural e apresenta uma menor energia por operação, quando exigido desempenho equivalente (isoperformance ) para SAD, em baixa frequência, alto paralelismo e, principalmente, com um estágio de pipeline. Além disso, tecnologias CMOS mais avançadas diminuem o consumo de potência dinâmica e, em alguns casos, também diminuem a potência estática por gate equivalente, se utilizadas células High-VT e tensão de alimentação a menor possível. Outro fator a ser destacado é o uso do clock gating que no caso das arquiteturas de SAD, em vez de diminuir, aumenta o consumo de potência dinâmica. Neste trabalho foi realizada a síntese do decodificador Intra-Only. O decodificador com clock gating apresenta um menor consumo de potência, mostrando um caso em que esta técnica é benéfica. Além disso, a utilização de uma tecnologia CMOS 65 nm e, consequentemente, tensão de alimentação menor, levou a uma sensível diminuição no consumo de potência em relação a outros trabalhos similares. This work presents low-power techniques applications to digital blocks in the SAD algorithm and in the Intra-Only H.264/AVC decoder. In the hardware description, we add parallelism and pipeline techniques. In the logical and physical synthesis exploration, includes the clock gating, multiple threshold voltage, different technologies and multiple supply voltage. The synthesis are done in the CadenceTM tools and show a smaller energy per operation in isoperformance for SAD at low frequency, high parallelism and, mainly, with one pipeline stage. In addition to that, more advanced CMOS technologies decrease the dynamic power consumption and, also, decrease the static power for equivalent gates, if using High-VT cells and lowest possible power supply. Another factor is the clock gating use that in the SAD architecture, instead of decreasing, increases the dynamic power consumption. In this work the design of an Intra-Only H.264/AVC Decoder was performed. This design with clock gating presents lower power consumption, showing a case in which this technique is beneficial in terms of dynamic power. Besides that, the 65 nm CMOS technology uses a lower power supply, resulting in lower power consumption in comparison to other related works.
- Published
- 2011
50. A low-power CMOS 0.13 µm Charge-Sensitive Preamplifier for GEM detectors
- Author
-
Pezzotta, A, Costantini, A, DE MATTEIS, M, D'Amico, S, Gorini, G, Murtas, F, Baschirotto, A, PEZZOTTA, ALESSANDRO, COSTANTINI, ANDREA, DE MATTEIS, MARCELLO, GORINI, GIUSEPPE, BASCHIROTTO, ANDREA, Pezzotta, A, Costantini, A, DE MATTEIS, M, D'Amico, S, Gorini, G, Murtas, F, Baschirotto, A, PEZZOTTA, ALESSANDRO, COSTANTINI, ANDREA, DE MATTEIS, MARCELLO, GORINI, GIUSEPPE, and BASCHIROTTO, ANDREA
- Abstract
In this paper a Charge-Sensitive Preamplifier (CSP) for GEM (Gas Electron Multiplier) detectors readout is presented. The CSP is responsible for signal acquisition and the conversion of the input charge into a voltage signal. The design has been realized in 0.13 mu m CMOS technology. It has been demonstrated through a detailed analysis that this is the best CMOS technology to be used in this case, as regards power consumption, intrinsic gain, noise and radiation hardness. The aim is to reduce the power consumption while maintaining other performance at the state-of-the-art. The preamplifier is composed by a three-stage nested Miller Operational Amplifier, with a feed-forward compensation. The system is able to manage a 15 pF detector capacitance. The global power consumption is 1.1 mW and the Equivalent Noise Charge is 418 e(-)
- Published
- 2013
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