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Localized lattice distortions in GaN substrates can serve as nucleation sites for epitaxial macro-steps and macro-terraces. These detrimental macro-scale features give rise to optically hazy homoepitaxial GaN surfaces. After nucleating, these macro-features grow laterally along the surface and coalesce, leading to significant coverage of the wafer surface. Dot-core GaN substrates consisting of a periodic array of cores were used as a defect-engineered system, where dislocations are intentionally concentrated at the cores. The high density of threading dislocations at the cores induced localized lattice distortions. These distortions are associated predominantly with lattice tilt on the order of hundreds of arcsec across ∼0.5 mm laterally along the wafer surface. The resulting macro-features that nucleated at these localized distorted sites were made up of macro-terraces with lengths ranging ∼30–∼150 μm and macro-step heights ranging ∼200–∼400 nm. Another source of localized distortion was threading screw dislocations or GaN nanopipes that resulted in spiral growth and hillock formation. Based on x-ray topography and optical microscopy measurements, we speculate that the coalescence of hillocks evolves into macro-terraces and macro-steps. While previous studies focused on the substrate miscut as a means to control macro-feature formation, we show that localized lattice tilt from defects is another important contributor to macro-feature formation.

In light of the importance of selective area doping in GaN to enable planar process technology, and to avoid the complications from the etch/regrowth process, ion implantation is the recognizable alternative. Annealing to activate dopant species and repair the damage to a crystal poses a challenge for GaN since the material will decompose to Ga + N2 at atmospheric pressure and relevant temperatures. In this research, in situ high- and low-temperature epitaxial and ex situ sputtered AlN caps were examined in different stacking arrangements to study the optimum conditions for Mg ion implantation and activation. Concurrently, a matrix of different implantation doses was also investigated to better understand the dose-dependent activation. Each sample has a unique cap stack and four different implant doses, including an unimplanted reference quadrant. The results show that poorer quality cap films enable nitrogen to leave the crystal during annealing and leave nitrogen vacancies behind. Furthermore, a high dose is needed at the surface to facilitate ohmic contact formation. The results suggest that in situ epitaxial-grown AlN caps are more suitable for GaN activation annealing, and high-temperature thin caps provide the best barrier to prevent crystal disintegration. We reveal a timely strategy for preserving the quality of GaN crystal structure during the electrical activation of the ion-implanted Mg atoms. This work provides valuable information that bridges the gap between device processing and electrical characterization of GaN devices, presenting a clear path towards achieving an electrical activation of implanted Mg while maintaining the integrity of the crystalline structure of GaN.

We report on high-quality n-Al0.87Ga0.13N-A0.64Ga0.36N heterostructures over single crystal AlN. For these pseudomorphic heterostructures, high-resolution X-ray and X-ray Topographic analysis was used to establish a threading dislocation density of 7 × 103 cm−2. Using reverse composition graded n+-Al x Ga1-x N contact layers, we obtained linear ohmic contacts with 4.3 Ω mm specific resistance. A critical breakdown field >11 MV cm−1 was also measured. In combination with the channel resistance of 2400 Ω sq−1, these translate to a Baliga’s Figure of Merit of 2.27 GW cm−2. This, to the best of our knowledge is the highest reported value for extreme bandgap AlGaN heterostructures.

The ultrawide band gap, high breakdown electric field, and large-area affordable substrates make β-Ga2O3 promising for applications of next-generation power electronics, while its thermal conductiv...

The structural evolution before and after annealing of c-plane dot-core GaN substrates under growth-like conditions was studied using monochromatic X-ray topography. The anneal was performed at 1050 °C for 10 hours in a MOCVD growth chamber under conditions optimized for the growth of GaN drift layers but without the group-III alkyl. This replicates the thermal environment the substrates experiences during the growth of > 2 kV PN diodes. In the current literature, fundamental understanding of the defect structure of dot-core GaN substrates – and its direct impact on device performance – is limited. X-ray topography provides a nondestructive method for studying the structural nature of defects which can then be used to understand the impact of defects on device performance. The measurements were performed at the 1-BM beamline of the Advanced Photon Source, Argonne National Laboratory using an X-ray energy of 8.05 keV to measure the (1124) GaN reflection to generate single exposure images (images exposed at a specific ω angular position along the X-ray rocking curve) as well as rocked images (a composite image exposed at many positions along the rocking curve). The step size for the rocked images was 0.008°. The rocked images showed butterfly-shaped diffraction lines centered at each core – indicative of localized distortions due to a high density of defects aggregated at each core. Furthermore, the single exposure images revealed that in the regions between the cores, the lattice is less misoriented than at the cores. The defects present at the cores induce severe lattice tilt emanating radially from the cores, which suggests that these relatively high tilt regions (cores) would be detrimental to device performance. Before annealing, it was observed that adjacent low tilt regions were tilted with respect to each other. The radius of (lattice) curvature of the substrate before annealing was 17 ± 1 m, which indicates that globally throughout the entire substrate there was a high amount of lattice tilt misorientation. After annealing, the substrate flattens – the radius of curvature increased to 27 ± 2 m and an increase in diffracted area between adjacent “low tilt” areas also increased, which is evidence of both local and global structural reconfiguration of the lattice towards a smaller degree of misorientation due to the anneal. Figure 1

Lead halide perovskites have attracted increasing interest for their exciting potential in diverse optoelectronic devices. However, their charge transport properties remain elusive, plagued by the issues of excessive contact resistance and large hysteresis in ambient conditions. Here we report a van der Waals integration approach for creating high-performance contacts on monocrystalline halide perovskite thin films with minimum interfacial damage and an atomically clean interface. Compared to the deposited contacts, our van der Waals contacts exhibit two to three orders of magnitude lower contact resistance, enabling systematic transport studies in a wide temperature range. We report a Hall mobility exceeding 2,000 cm2 V–1 s–1 at around 80 K, an ultralow bimolecular recombination coefficient of 3.5 × 10–15 cm3 s–1 and a photocurrent gain >106 in the perovskite thin films. Furthermore, magnetotransport studies reveal a quantum-interference-induced weak localization behaviour with a phase coherence length up to 49 nm at 3.5 K. Our results lay the foundation for exploring new physics in this class of ‘soft-lattice’ materials. The realization of high-quality van der Waals contacts on monocrystalline halide perovskite thin films enables the probing of their long-range carrier and photocarrier transport properties.

Despite the exceptional thermal and mechanical functionalities of diamond, its superlative properties are highly subject to the presence of point defects, dislocations, and interfaces. In this study, polycrystalline diamond is ion implanted with C3+, N3+, and O3+ ions at an energy of 16.5 MeV, producing an amorphous layer at the projected range and a damaged crystalline region between the surface and amorphous layer. Using time-domain thermoreflectance in combination with thermal penetration depth calculations based upon the multilayer heat diffusion equation, it is determined that reductions in the thermal conductivity can span nearly two orders of magnitude while still maintaining a polycrystalline structure within the regions thermally probed. Dynamical diffraction simulations of high-resolution x-ray diffraction measurements demonstrate the formation of a strained layer localized at the end of range, with much lower levels of strain near the surface. Furthermore, within the polycrystalline region above the amorphous layer, the average number of displacements-per-atom from the ion irradiation is found to be 1 % , with mass impurity concentrations much less than 1%. These low defect concentrations within the thermally probed region demonstrate the remarkably large impact that dilute levels of defects from the ion implantation can have on the thermal conductivity of diamond.

Gallium nitride (GaN) has emerged as a quintessential wide band-gap semiconductor for an array of high-power and high-frequency electronic devices. The phonon thermal resistances that arise in GaN thin films can result in detrimental performances in these applications. In this work, we report on the thermal conductivity of submicrometer and micrometer thick homoepitaxial GaN films grown via two different techniques (metal-organic chemical vapor deposition and molecular beam epitaxy) and measured via two different techniques (time domain thermoreflectance and steady-state thermoreflectance). When unintentionally doped, these homoepitaxial GaN films possess higher thermal conductivities than other heteroepitaxially grown GaN films of equivalent thicknesses reported in the literature. When doped, the thermal conductivities of the GaN films decrease substantially due to phonon-dopant scattering, which reveals that the major source of phonon thermal resistance in homoepitaxially grown GaN films can arise from doping. Our temperature-dependent thermal conductivity measurements reveal that below 200 K, scattering with the defects and GaN/GaN interface limits the thermal transport of the unintentionally doped homoepitaxial GaN films. Further, we demonstrate the ability to achieve the highest reported thermal boundary conductance at metal/GaN interfaces through in situ deposition of aluminum in ultrahigh vacuum during molecular beam epitaxy growth of the GaN films. Our results inform the development of low thermal resistance GaN films and interfaces by furthering the understanding of phonon scattering processes that impact the thermal transport in homoepitaxially grown GaN.

The study of interfaces for both epitaxial and wafer-bonded systems draws from materials science, electrical engineering, and mechanical engineering and involves advanced materials characterization techniques. Low temperature wafer bonding has been leveraged to produce a wide array of materials combinations, most notably silicon-on-insulator structures. However, bonded interfaces can impact the electrical or thermal transport across such interfaces. In this presentation, we provide a few examples in semiconductor-based systems to address the ability to study and modify different, technologically important, interface combinations as a function of processing, such as annealing. The materials combinations primarily involve wide bandgap materials combinations including GaN|Si to b-Ga2O3 | SiC as well as bonding to single crystal diamond. In addition, we describe the role of the relative lattice orientation across semiconductor-semiconductor interfaces on transport properties and polarization engineering to producing high performance heterointerfaces. Our main goal is to be able to study and engineer the interfaces to optimize properties and ultimately, device performance.

In this work, the effects of the substrate defects on the reverse leakage behavior of vertical GaN Schottky and p-i-n diodes are investigated. A direct connection between the reverse leakage behavior of GaN based vertical devices and the defect characteristics of the substrate was achieved. The difference in the leakage current can be as high as 6 orders of magnitude for vertical GaN p-i-n diodes at -200V, using HVPE substrate with inhomogeneous defect distributions (with dot-cores). For comparison, using HVPE substrate with uniform defect distribution (no cores), the p-i-n diodes show much more uniform leakage behavior at -200V, varying within only an order of magnitude. The wafers with inhomogeneous defect distribution possess periodically patterned core-centers with higher defect density (up to 108 cm-2) than regions in between cores, which have very low defect concentrations (as low as 104 cm-2). The full width at 0.01 maximum of the triple axis rocking curves (GaN (0004)) shows a large variation ranging from 60 to 930 arcsec. In comparison, wafers without the periodic cores have a uniform defect density (~106 cm-2) and show a small variation in the rocking curve FW0.01M, ranging only from 70 to 280 arcsec. For Schottky diodes fabricated on substrate with cores, positioning the devices away from the core-centers results in a reduction of the reverse bias leakage by 2-4 orders of magnitude at -10 V. Similar trend are also observed in the p-i-n diodes, with device further away from the core-centers showing lower leakage. The devices in the low defect concentration region (> 200 um away from core centers) on the wafer with cores outperform the devices from the wafer without cores, showing up to 2 orders of magnitude lower leakage current at -200 V. The results from this study show that the substrate defect density and distribution play an important role on the device leakage current and avoiding highly defective regions on the substrate will improve the performance of vertical GaN devices.

Vertical GaN power devices have emerged to become promising candidates for next-generation high power applications due to superior material properties such as high breakdown voltage, low on-resistance, and high mobility compared to devices based on Si and SiC. GaN-based p-n junction switching devices enable higher voltage power with significantly higher efficiencies with added advantages of reduced size and weight systems. A technological limitation of GaN, however, has been the inability to achieve high p-type doping in a planar, vertical device. Here, we will focus on recent developments to achieve high p-type efficiency though ion implantation, novel high temperature annealing schemes, and the importance of defects and morphology in native substrates and epitaxial layers GaN epitaxial layers for subsequent p-type ion implantation can be grown on sapphire substrates but vertical devices are optimal when using GaN homoepitaxial structures. Unlike most other semiconductor substrates, GaN substrates are not grown from the melt. Hydride vapor phase epitaxy or ammonothermal growth are predominantly used to produce substrates and these substrates will experience higher temperatures during subsequent epitaxy and ion implant activation annealing than occurs during substrate formation. In both types of substrates, the threading dislocation distribution can vary by orders of magnitude – these variations correlate well with leakage currents in vertical devices. The activation of the implanted p-type dopants requires high temperature annealing. For most semiconductors, an annealing temperature of ~ 2/3 the melting point leads to a high activation fraction (> 95%) of the implanted species. The implantation process introduces large concentrations of native defects as well as the p-type implant (typically Mg), so it is necessary to remove the defects and for the dopants to locate on substitutional sites (Ga sites for Mg). We demonstrate how the formation of inverted domain defects at temperatures below 1400 °C correlate with Mg-compound formation, whereas annealing temperatures 1400 °C and above do not lead to the formation of such compounds but rather high Mg activation efficiencies. These recent developments, partly through the ARPA-E PNDIODES program as well as international efforts, have brought understanding of the key processing steps and substrate requirements to achieve high activation efficiency p-type doping for planar, vertical device structures in a scalable framework.

The development of electronic devices, especially those that involve heterogeneous integration of materials, has led to increased challenges in addressing their thermal operational temperature demands. The heat flow in these systems is significantly influenced or even dominated by thermal boundary resistance at the interface between dissimilar materials. However, controlling and tuning heat transport across an interface and in the adjacent materials has so far drawn limited attention. In this work, we grow chemical vapor-deposited diamond on silicon substrates by graphoepitaxy and experimentally demonstrate tunable thermal transport across diamond membranes and diamond-silicon interfaces. We observed the highest diamond-silicon thermal boundary conductance (TBC) measured to date and increased diamond thermal conductivity due to strong grain texturing in the diamond near the interface. Additionally, nonequilibrium molecular dynamics simulations and a Landauer approach are used to understand the diamond-silicon TBC. These findings pave the way for tuning or increasing thermal conductance in heterogeneously integrated electronics that involve polycrystalline materials and will impact applications including electronics thermal management and diamond growth.

Post-implantation damage and defect characterization of multicycle rapid thermal annealing (MRTA) activated Mg+ implanted (0001) GaN on (110) sapphire substrate was investigated using high resolution X-ray scattering and transmission electron microscope techniques. The initial implant-induced isolated defects produced a pseudomorphic strain that matches the calculated recoil damage profile in the GaN - along the [0001] direction. Triple axis X-ray diffraction showed removal of the implant-induced elastic strain during two different MRTA annealing processes. An improvement in crystalline quality after the different MRTA processes was also noted, indicating that the MRTA processes can reduce crystalline strain and defects in as-grown material. For the different MRTA processes, an improvement in electrical conductivity was correlated with a lower (0004) triple axis rocking curve width and with a reduced presence of extended defects observed from electron microscopy measurements. The extended defects were identified to be circular defects with an observable screw component. The defect density was on the order of 1010 cm−2. While both MRTA processes led to a high activation efficiency, a higher residue defect density was correlated with a greater X-ray scattering rocking curve width of the symmetric (0004) reflection, which was further correlated with a lower hole mobility (20 cm2/V⋅s vs 40 cm2/V⋅s).

In this work, the effects of the substrate defect density and distribution on the reverse leakage behavior of GaN vertical Schottky diodes and p–i–n diodes are investigated. A direct connection between the reverse leakage behavior of GaN based vertical devices and the dislocation density of the underlying material was determined. The difference in the leakage current for devices on different locations of the wafer can be as high as 6 orders of magnitude (for p–i–n diodes) at −200V, for HVPE substrate with inhomogeneous but predictable defect distributions (GaN substrates with dot-core inversion domain features). For comparison, using HVPE substrates with uniform defect distribution (but with no cores), the p–i–n diodes show much more uniform leakage behavior, varying within only an order of magnitude, and that range fell within the much greater range of that for the inhomogeneous substrates. The substrates with inhomogeneous defect distribution proved to be useful to show the direct correlation. The topography measurements confirmed that the wafers with inhomogeneous defect distribution possess periodically patterned core-centers with higher defect density and larger lattice distortions surrounded by other regions, which have very low defect concentrations. Devices located away from the defective core-centers result in a reduction of the reverse bias leakage by over two orders of magnitude at −10 V for Schottky diodes. Similar trends are also observed in the p–i–n diodes; the devices close to the core centers show the highest reverse leakage (>0.01 A cm−2 at −200V). Devices further away from the core-centers (lower dislocation density) show lower reverse leakage current. Moreover, the p–i–n diodes on regions more than 300 μm away from the core-centers show the best leakage behavior (−7 A cm−2 at −200V) of all the devices, outperforming the devices on the substrates with uniform defect distribution (∼10−6 A cm−2 at −200V). The results from this study show that the substrate defect density and distribution play important roles in the device leakage current. X-ray topography is extremely effective for studying defect characteristics underneath individual devices. The use of the wafers with inhomogeneous, but predictable defect density clearly demonstrated the importance of low defect densities for high device performance.

The ultrawide band gap, high breakdown electric field, and large-area affordable substrates make β-Ga

A unified understanding of interfacial thermal transport is missing due to the complicated nature of interfaces which involves complex factors such as interfacial bonding, interfacial mixing, surface chemistry, crystal orientation, roughness, contamination, and interfacial disorder. This is especially true for metal nonmetal interfaces which incorporate multiple fundamental heat transport mechanisms such as elastic and inelastic phonon scattering as well as electron phonon coupling in the metal and across the interface. All these factors jointly affect thermal boundary conductance (TBC). As a result, the experimentally measured interfaces may not be the same as the ideally modelled interfaces, thus obfuscating any conclusions drawn from experimental and modeling comparisons. This work provides a systematic study of interfacial thermal conductance across well controlled and ultraclean epitaxial (111) Al parallel (0001) sapphire interfaces, known as harmonic matched interface. A comparison with thermal models such as atomistic Green s function (AGF) and a nonequilibrium Landauer approach shows that elastic phonon scattering dominates the interfacial thermal transport of Al sapphire interface. By scaling the TBC with the Al heat capacity, a nearly constant transmission coefficient is observed, indicating that the phonons on the Al side limits the Al sapphire TBC. This nearly constant transmission coefficient validates the assumptions in AGF and nonequilibrium Landauer calculations. Our work not only provides a benchmark for interfacial thermal conductance across metal nonmetal interfaces and enables a quantitative study of TBC to validate theoretical thermal carrier transport mechanisms, but also acts as a reference when studying how other factors impact TBC.

Diamond seeds were assessed for their role in the heterogeneous nucleation for diamond films deposited on silicon using chemical vapor deposition. Two diamond seed sizes – 4 nm and 20 nm – were studied. The study revealed that the larger seed size, even when with a smaller seed density, produces a larger grain size near the interface region, and led to a higher in-plane thermal conductivity as measured by Raman thermography. By fine control of the seed size and density, thermal conductivity near the nucleation region can therefore be improved. This demonstrates that the seeding condition is critical to diamond film growth for thermal applications in electronic devices.

In this work, synchrotron monochromatic X-ray topography was employed to study the structural characteristics of as-received c-plane dot-core GaN substrates and then to investigate the structural evolution with annealing under growth-like conditions at 1050 °C for 10 h. Single exposure X-ray topography images were obtained using the (1124) GaN asymmetric reflection. These images were superimposed to quantify the lattice distortions in regions near the dot-cores and in the regions between these defects. The results show that different dot-core substrates from the same vendor exhibit different defect distribution, lattice distortions around the cores, and different radii of lattice curvature, ranging from 7 m to 25 m. Annealing under growth-like conditions reduces both the global and local lattice distortions. Globally, the radius of curvature across the wafer increased from 17 m to 27 m after annealing. The local radius of curvature across the highly distorted core regions also increased from 0.47 ± 0.04 m to 0.9 ± 0.2 m after annealing. An increase in the radius of curvature is an indication of stress reduction. The lattice tilt around the cores varies from 0.01°−0.02°. The lattice planes around the centers of cores are highly distorted, and the magnitude of the tilt generally decreases radially away from the core center. After annealing, these local distortions decreased as well. A general core model was built based on these experimental results, providing a fundamental structural picture of dot-core regions, which has been lacking in the current literature.

In this study, thermal and structural characteristics of direct wafer bonded (0001) GaN on (001) Si were examined as a continuation of a previous effort1. EVG® ComBond® equipment was used for bonding under high vacuum (~10-8 mtorr) at room temperature by bombarding the GaN and Si surfaces with an Ar ion beam to remove unwanted native surface oxides.1,2 The samples are placed face-to-face and pressure is applied to initiate the bond. The [1010] GaN edge was aligned parallel to the Si [110] edge. An X-ray diffraction reciprocal space map of the (004) Si and (0004) GaN revealed that there is a ~0.2° tilt between the GaN and Si layers. Bombardment of the bonded surface causes an amorphous region at the interface that has been seen in many other bonded systems.3-5 High resolution transmission electron microscopy revealed a ~2 nm amorphous region at the bonded interface, which resides mostly in the Si as confirmed by energy dispersive x-ray spectroscopy. This is consistent with SRIM6 simulations that predict a shallower damage profile in GaN as compared to Si. The thermal boundary resistance of the GaN|Si interface was measured to be 3.9 m2K/GW,1 an interfacial thermal resistance lower than any of the current state-of-the-art GaN-based heterojunctions, including GaN|Si,3 GaN|SiC,4 and GaN|diamond.5 Subsequent annealing is expected to alter the thermal properties as the bonded interface is allowed to recrystallize10. The intermediate steps of the recrystallization at the bonded interface were examined using TEM to give insight on the interface recovery and reconfiguration mechanism of this ion bombarded GaN|Si interface. Dragoi, et al., ECS Trans., 86(5), 23 (2018) Flötgen, et al., ECS Trans., 64(5), 103 (2014) E. Liao, et al., ECS Trans., 86(5), 55 (2018) Xu, et al., Ceramics International, 45, 6552 (2019) Mu, et al., Appl. Surf. Sci., 416, 1007 (2017) F. Ziegler, et al., The Stopping and Range of Ions in Solids vol 1 (Oxford, Pergamon), (1985) Yates, et al., ASME InterPACK (2015) Cho, et al., Phys. Rev. B, 89, 115301 (2014) Sun, et al., APL, 106(11), 111906 (2015) Mu, F. et al., (2019). ACS applied materials & interfaces, 11(36), 33428-33434. Figure 1

We report on the effects of substrate temperature (1073 K ≤ Ts ≤ 1373 K) and deposition time t (= 3 ~ 30 min.) on the crystallinity of Ta2C/Al2O3(0001) thin films grown via ultra-high vacuum direct current magnetron sputtering of TaC target in 20 mTorr (2.7 Pa) pure Ar atmospheres. Using X-ray diffraction and transmission electron microscopy, we determine that the layers are 0001-oriented, trigonal-structured α-Ta2C at all Ts. With increasing Ts, we obtain smoother and thinner layers with enhanced out-of-plane coherency and decreasing unit cell volume. Interestingly, the Ta2C 0001 texture improves with increasing Ts up to 1273 K above which the layers are relatively more polycrystalline. At Ts = 1373 K, during early stages of deposition, the Ta2C layers grow heteroepitaxially on Al2O3(0001) with ( 0001 ) T a 2 C ∥ ( 0001 ) A l 2 O 3 and [ 10 1 ¯ 0 ] T a 2 C ∥ [ 11 2 ¯ 0 ] A l 2 O 3 . With increasing t, we observe the formation of anti-phase domains and misoriented grains resulting in polycrystalline layers. We attribute the observed enhancement in 0001 texture to increased surface adatom mobilities and the development of polycrystallinity to reduced incorporation of C in the lattice with increasing Ts. We expect that our results help develop methods for the synthesis of high-quality Ta2C thin films.

Wide bandgap materials are suitable for high power and high temperature applications. However, these materials, and metal layers that are part of device structures must effectively transport heat from the active device regions. Structural defects, chemical defects, and interface properties can degrade thermal transport, but relatively little attention has been paid to the precise nature of these defects and how they impact thermal transport. Electron microscopy and x-ray scattering based techniques are employed to provide insight into the defects present in these materials. When these techniques are integrated with thermal transport measurements and theoretical insights gained from molecular dynamics simulations, a much better understanding of thermal transport in wide bandgap materials can be realized. Examples of how defects impact transport for diamond boundary interfaces, AlN layers, and GaN heterostructures will be presented.

Fundamental theories predict that reductions in thermal conductivity from point and extended defects can arise due to phonon scattering with localized strain fields. To experimentally determine how these strain fields impact phonon scattering mechanisms, we employ ion irradiation as a controlled means of introducing strain and assorted defects into the lattice. In particular, we observe the reduction in thermal conductivity of intrinsic natural silicon after self-irradiation with two different silicon isotopes, $^{28}\mathrm{Si}^{+}$ and $^{29}\mathrm{Si}^{+}$. Irradiating with an isotope with a nearly identical atomic mass as the majority of the host lattice produces a damage profile lacking mass impurities and allows us to assess the role of phonon scattering with local strain fields on the thermal conductivity. Our results demonstrate that point defects will decrease the thermal conductivity more so than spatially extended defect structures assuming the same volumetric defect concentrations due to the larger strain per defect that arises in spatially separated point defects. With thermal conductivity models using density functional theory, we show that for a given defect concentration, the type of defect (i.e., point vs extended) plays a negligible role in reducing the thermal conductivity compared to the strain per defect in a given volume.

We report on the effects of low ethylene (C2H4) partial pressures (6.7 × 10−5 ≤ Pc ≤ 6.7 × 10−2 Pa) on the composition and microstructure of Ta–C thin films grown on MgO(001) substrates via ultra-high vacuum dc magnetron sputtering of a TaC compound target using 2.7 Pa argon/ethylene gas discharges at 1123 K. The as-deposited layer crystallinity and composition are determined using a combination of X-ray diffraction, transmission electron microscopy coupled with X-ray energy dispersive spectroscopy, and X-ray photoelectron spectroscopy. We find that the layers sputter-deposited in pure Ar (i.e., Pc = 0) and Ar/C2H4 gas mixtures with Pc = 6.7 × 10−5 Pa are polycrystalline trigonal-structured Ta2C (a = 0.310 nm and c = 0.492 nm). At Pc = 6.7 × 10−4 Pa, we obtain cubic, 002-textured TaC0.76 (a = 0.442 nm) porous thin film with facetted surface. Interestingly, we also observe 111-oriented twins due to four crystals rotated with respect to each other. Film grown at higher Pc = 6.7 × 10−2 Pa is relatively dense with smoother surface and composed of a two-phase mixture of nanocrystalline TaC and amorphous carbon. Our results demonstrate compositional and microstructural tunability during sputter-deposition of transition-metal carbide thin films using small amounts of the reactive gas.

Understanding the impact of lattice imperfections on nanoscale thermal transport is crucial for diverse applications ranging from thermal management to energy conversion. Grain boundaries (GBs) are ubiquitous defects in polycrystalline materials, which scatter phonons and reduce thermal conductivity. Historically, their impact on heat conduction has been studied indirectly through spatially-averaged measurements, that provide little information about phonon transport near a single GB. Here, using spatially-resolved time-domain thermoreflectance (TDTR) measurements in combination with electron backscatter diffraction (EBSD), we make localized measurements of thermal conductivity within few \mu m of individual GBs in boron-doped polycrystalline diamond. We observe strongly suppressed thermal transport near GBs, a reduction in conductivity from ~1000 W/m-K at the center of large grains to ~400 W/m-K in the immediate vicinity of GBs. Furthermore, we show that this reduction in conductivity is measured up to ~10 \mu m away from a GB. A theoretical model is proposed that captures the local reduction in phonon mean-free-paths due to strongly diffuse phonon scattering at the disordered grain boundaries. Our results provide a new framework for understanding phonon-defect interactions in nanomaterials, with implications for the use of high thermal conductivity polycrystalline materials as heat sinks in electronics thermal management., Comment: This document is the unedited Author's version of a submitted work that was subsequently accepted for publication in Nano Letters, copyright American Chemical Society after peer review. To access the final edited and published work see this URL: https://pubs.acs.org/doi/10.1021/acs.nanolett.8b00534. Version 2: Updates Supplementary Figs S1 and S3. The journal published version is correct