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Silicon nitride films were deposited at 100℃ by using the catalytic chemical vapor deposition technique. The source gas mixing ratio, R N = [NH₃] / [SiH₄], was varied from 10 to 30, and the hydrogen dilution ratio, R H = [H₂] / [SiH₄], was varied from 20 to 100. The breakdown field strength reached a maximum value at R N = 20 and R H = 20, whereas the resistivity decreased in the same sample. The relative permittivity had a positive correlation with the breakdown field strength. The capacitance-voltage threshold curve showed an asymmetric hysteresis loop, which became more squared as R H increased. The width of the hysteresis window showed a negative correlation with the slope of the transition region, implying that the combined effect of R N and R H overides the interface defects while creating charge storage sites in the bulk region.

This is the author's version of a work that was accepted for publication in Thin Solid Films. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definative version wass subsequently published in Thin Solid Films, 2015. 576: 55-60. DOI:10.1016/j.tsf.2014.11.019.

Vacuum growth of thin films via chemical vapor deposition (CVD) methods has been extensively used in modern semiconductor and flat panel display industries. The CVD processes have a wide range of variation and are categorized according to their working conditions, power sources, precursor materials, and so forth. Basic components and process steps common to all CVD branches are discussed. In addition, characteristics and applications of two major CVD techniques - LPCVD and PECVD - are reviewed briefly.

Various configurations of the multi-layer of yttria-stabilized zirconia (YSZ) and gadolinia-doped ceria (GDC) are successfully fabricated through a novel method by means of pulsed laser deposition (PLD) utilizing a split target. By controlling the deposition conditions like the laser frequency and target configuration, YSZ/GDC multi-layers of different periodicities and YSZ/GDC thickness ratios can be easily and simply realized. The multi-layer fabricated by the proposed method exhibits nearly identical physical and electrical properties to those of the multi-layer films by the conventional layer-by-layer deposition method. The present study provides a facile and effective fabrication method for the design and application of multi-layered structure.

The influence of the filament configuration in a low-temperature catalytic chemical vapor deposition system on the substrate temperature and thickness uniformity was investigated for application to the silicon-based thin-film transistor backplane on flexible substrates. Serial and parallel arrangements of the filament were attempted. In the serial connection, the self-heating of the substrate was suppressed as the total length of the filament decreased for a given filament temperature. The areal distribution of the film thickness was affected more by the shape of the reactor than by the filament arrangement, whereas the variation of the breakdown field strength and resistivity showed little correlation with the filament of the chamber geometry. On the contrary, in the parallel connection, the thickness distribution was influenced more by the location of the filaments than by the reactor shape. The 56 mm interfilament spacing resulted in the highest deposition rate, and the film thickness decreased radiall...

Pulsed laser deposition (PLD) was attempted for lithium conducting electrolyte layers of Li7La3Zr2O12 on a porous membrane of anodized aluminum oxide. Al-doping made it possible to obtain dense PLD targets with the cubic garnet phase structure successfully using a solid-state reaction and sintering at 1100°C. Substrate heating during deposition led to homogeneous film morphology, but caused formation of La2ZrO7 impurity phase. Aluminum migration from the substrate to the film surface was observed when the sample was annealed at 700°C. The aluminum migration seemed to be facilitated by the lithium in the environment of the PLD chamber.

Nanocrystalline Silicon (nc-Si) films were deposited by catalytic chemical vapor deposition (Cat-CVD) at a low substrate temperature (100 °C) for use as an active layer in bottom-gate thin-film transistors (TFTs). Hydrogen dilution technique was attempted to increase the crystalline volume fraction (Xc). The hydrogen dilution ratio, RH = [H2]/[SiH4], was varied from 44 to 74. In order to obtain nc-Si film with a high XC, a thin incubation layer and a fast deposition rate simultaneously, we varied RH and pressure as the deposition proceeded. When the pressure was set to 50 mTorr during the initial stage and changed to 60 mTorr for the rest of the deposition, the incubation layer thickness was suppressed to 4 nm.

Thin film dual select diodes (TF-DSDs) were fabricated at a low temperature (180 oC) for applications to pixel switching devices for flexible displays. The Silicon-rich silicon nitride (SRSN) films were prepared by catalytic chemical vapor deposition (Cat-CVD) technique. Composition of the source gas mixture affected directly the photoluminescence spectra and the current-voltage characteristics of the SRSN films. We observed non-linear, asymmetric current-voltage characteristics that can be tuned by controlling the film deposition parameters.

The electrical properties of silicon nanocrystals (Si NCs) embedded in silicon-rich silicon nitride (SRSN) films were investigated by fabricating metal-insulator-semiconductor capacitor structures to utilize the Si NCs as charge storage nodes. The Si NCs embedded in SRSN films were prepared by catalytic chemical vapor deposition technique at substrate temperatures below 200 °. The counterclockwise hysteresis loops were observed in capacitance-voltage (C-V) characteristics. A memory window of 13 V was observed in the sweep voltage range of ±12 V.

We studied the effect of in-situ hydrogen annealing on dielectric SiNx films at a low-temperature (150 oC) by Cat-CVD. The in-situ hydrogen annealing was performed without a vacuum breaking. After in-situ annealing, furnace annealing was performed for 2hours below 150 oC. The C-V, and I-V characteristics were measured by MIS structure. The high hydrogen ratio sample showed better dielectric properties improvement by annealing. SiNx films dielectric properties were extremely improved by in-situ hydrogen annealing and furnace annealing. Breakdown field was 6 MV/cm. C-V hysteresis window was reduced from 15 V to 1 V. The on/off ratio of TFT was 105. The Mobility was 0.23. We successfully fabricated dielectric SiNx films at the low temperature, and also a-Si TFTs at the same temperature by Cat-CVD.

Double-walled carbon nanotubes (DWCNTs) with high purity were produced by the catalytic decomposition of tetrahydrofuran (THF) using a Fe-Mo/MgO catalyst at 800°C. The as-synthesized DWCNTs typically have catalytic impurities and amorphous carbon, which were removed by a two-step purification process consisting of acid treatment and oxidation. In the acid treatment, metallic catalysts were removed in HCl at room temperature for 5 hr with magnetic stirring. Subsequently, the oxidation, using air at 380°C for 5 hr in the a vertical-type furnace, was used to remove the amorphous carbon particles. The DWCNT suspension was prepared by dispersing the purified DWCNTs in the aqueous sodium dodecyl sulfate solution with horn-type sonication. This was then air-sprayed on ITO glass to fabricate DWCNT field emitters. The field emission properties of DWCNT films related to transmittance were studied. This study provides the possibility of the application of large-area transparent CNT field emission cathodes. (Received October 8, 2010)

Silicon nitride (SiN(x)) films for a gate dielectric layer of thin film transistors were deposited by catalytic chemical vapor deposition at a low temperature (< or = 200 degrees C). A mixture of SiH4, NH3 and H2 was used as a source gas. Metal-insulator-semiconductor (MIS) capacitor structures were fabricated for current-voltage (I-V) and capacitance-voltage (C-V) measurements. The breakdown voltage characteristics of the SiN(x) films were improved by the increase of NH3/SiH4 and H2/SiH4 mixing ratios and substrate temperatures. H2 treatment was attempted to improve the breakdown voltage further. A breakdown voltage as high as 6.6 MV/cm was obtained after H2 annealing at 180 degrees C. The defect states inside the SiN(x) films were analyzed by photoluminescence spectra. Silicon dangling bonds (2.5 eV) and nitrogen dangling bonds (3.1 eV) were observed. These defect states inside the SiN(x) films disappeared after H2 annealing. Flat band voltage shifts were observed in C-V curves, and their magnitudes decreased as the defect states inside the SiN(x) films decreased.

Thin film transistors having nanocrystalline silicon as an active layer were fabricated by catalytic-CVD at a low process temperature (≤ 200 °C). The tri-layer of the bottom-gate TFT was deposited continuously inside the Cat-CVD reactor. In order to improve the quality of the gate dielectric layer an in-situ hydrogen annealing step was introduced in between the silicon nitride and the nanocrystalline silicon deposition steps. The in-situ hydrogen annealing was effective in reducing the hysteresis in the C–V characteristics and in enhancing the breakdown voltage by decreasing the defects inside the SiN x film.

The solid phase compositions and dielectric properties of silicon nitride (SiNx) films prepared using the plasma enhanced chemical vapor deposition (PECVD) technique at a low temperature (200°C) we...

Since the visible photoluminescence (PL) from porous silicon was reported [1], investigation of light-emission diodes (LEDs) using silicon (Si) quantum dots (QDs) has been investigated. Many researchers have studied luminescence from Si QDs embedded in silicon oxide or nitride films [2-4]. However, these materials have demerit that the high operation voltage was required because of using insulator. Silicon carbide film has lower resistivity than the silicon oxide or nitride film. The silicon carbide films have an advantage in manufacture of p-i-n LEDs because those were easily able to dope. In this work, we studied electrical properties of the silicon rich silicon carbide (SRSC) films deposited by catalytic chemical vapor deposition (Cat-CVD) technique. A mixture of SiH4, CH4 and H2 gas was employed as the source gas in deposition process. Atomic composition of SRSC films and formation of Si QDs in SRSC films depended on control of SiH4/CH3 mixture ratios. The each different tunneling behavior was observed in currentvoltage (I-V) curve of two samples prepared at different SiH4/CH3 mixture ratios. The PL spectra of two samples were also each different. These results were analyzed with relating formation of Si QDs in SRSC films. Figure 1 shows I-V characteristics of the SRSC films deposited at two different SiH4/CH3 mixture ratios. The SiH4/CH4 mixture ratios were 10 and 1 in figure 1(a) and figure 1(b), respectively. In figure 1(a), the experimental data were fitted well with the Fowler-Nordheim equation expressed as follows [5]: ( ) V b aV IFN / exp 2 − = (1)

The dielectric property has great influence on characteristics of bottom-gate nanocrystalline silicon thin film transistor at low process temperature ({less than or equal to} 200°). For improving the quality of the gate dielectric layer, in-situ hydrogen annealing step in the silicon nitride deposition process was attempted in low process temperature by catalytic CVD system. The in-situ hydrogen annealing was effective in advanced field effect mobility and capacitance-voltage characteristic by decreasing the defects inside the SiNx film.

Si/SiC composite films, namely, Si nanocrystals in a-SiC matrix material, were deposited by using Cat-CVD. Photoluminescence characteristics of a-SiC thin films prepared with various gas ratio R=[CH4]/[SiH4] were investigated. Fourier-transform infrared spectroscopy (FTIR) and x-ray photoelectron spectroscopy (XPS) measurements composition ratio of a-SiC films. It shows different composition ratio between R > 10 and R < 10. Photoluminescence (PL) intensity was changed before and after thermal annealing at various temperatures. The PL intensity was increased after annealing peak position was shift short wavelength range.

The charge and discharge properties of NiSi nanodots in the gate oxide of MOS and MOSFET devices were investigated in order to utilize as the charge-storage nodes in a nonvolatile floating-gate memory. NiSi nanodots were formed by sputtering Ni and successive exposing to SiH"4 gas. The memory characteristics of MOS and MOSFET devices which contain the NiSi nanodots in the gate oxide were obtained through the capacitance-voltage measurements and the transient threshold voltage shift measurements. The window of threshold voltage shift was achieved to be 2.5V when the gate bias voltages of +/-20V were applied for 1s and 500ms, respectively. The retention time of MOSFET memory-cell was estimated to be about 10 years.

The digital gas-feeding method was used in this study, with Si"2H"6 as the source gas, in a low-pressure chemical-vapor deposition system, to grow Si nanoclusters with high densities and uniform sizes. The densities of the Si nanoclusters rose to 7x10^1^1cm^-^2, and their sizes slightly changed at about 7nm based on the frequency of gas-pulse feeding in the digital process. MOSFETs containing Si nanoclusters as a floating gate in the gate stack were fabricated, and the various nonvolatile-memory characteristics of MOSFET were investigated. The total threshold voltage shift of 3.7V was achieved, and the program/erase times were found to be [email protected]/50ms when the program/erase voltages were +18/-20V, respectively. The charge-storage memory window was extrapolated over 1year to be 1.5V in the retention measurements of the fabricated Si nanocluster floating-gate memory device.

We have studied nonvolatile memory properties of MOSFETs with double-stacked Si nanoclusters in the oxide-gate stacks. We formed Si nanoclusters of a uniform size distribution on a 5 nm-thick tunneling oxide layer, followed by a 10 nm-thick intermediate oxide and a second layer of Si nanoclusters by using LPCVD system. We then investigated the memory characteristics of the MOSFET and observed that the charge retention time of a double-stacked Si nanocluster MOSFET was longer than that of a single-layer device. We also found that the double-stacked Si nanocluster MOSFET is suitable for use as a dual-bit memory.

Due to high sensitivity to process parameters, plasma processes should be tightly controlled. For plasma control, a predictive model was constructed using a neural network and optical emission spectroscopy (OES). Principal component analysis (PCA) was used to reduce OES dimensionality. This approach was applied to an oxide plasma etching conducted in a CHF3∕CF4 magnetically enhanced reactive ion plasma. The etch process was systematically characterized by means of a statistical experimental design. Three etch outputs (etch rate, profile angle, and etch rate nonuniformity) were modeled using three different approaches, including conventional, OES, and PCA-OES models. For all etch outputs, OES models demonstrated improved predictions over the conventional or PCA-OES models. Compared to conventional models, OES models yielded an improvement of more than 25% in modeling profile angle and etch rate nonuniformtiy. More than 40% improvement over PCA-OES model was achieved in modeling etch rate and profile angle....

Using a wavelet, a profile nonuniformity was characterized and applied to a tungsten etching conducted in a SF 6 helicon plasma. The profile nonuniformity was examined as a function of process parameters, including radio frequency source power, bias power, SF 6 flow rate, and substrate temperature. It was correlated to the etch rate nonuniformity or the fluorine radical measured by an optical emission spectroscopy. The profile nonuniformity increased with increasing all parameters but the source power. Etch mechanisms were estimated by investigating the nonuniformity dependency on ion or radical density distribution.

Refractive index of silicon nitride film deposited in a plasma enhanced chemical deposition system is modeled by using neural network. The deposition process was characterized with a full factorial experiment. Additional 12 experiments were conducted to test model appropriateness. Predicted model behaviors were in good agreement with actual measurements. Deposition mechanisms were qualitatively examined especially with respect to the pressure. Possible interactions between the pressure and other factors (SiH4, NH3, radio frequency (RF) power, and substrate temperature) were examined on the basis of SiH/NH bond ratio. The refractive index increased with increasing either SiH4 flow rate or RF power. In contrast, the refractive index decreased with increasing NH3 flow rate. Little interactions between the pressure and RF power were observed. Pressure effect on the refractive index was quite different depending on the level of SiH4 flow rate or substrate temperature. In general, increasing the pressure increased the refractive index. Meanwhile, the refractive index was insensitive to parameter variations at relatively high pressures. The most complex interaction occurred as the pressure interacted with the temperature. Useful clues to control the refractive index were revealed from the predictive model.

Using a neural network, a refractive index (RI) of silicon nitride film was predicted as a function of process parameters, including radio frequency (RF) power, pressure, substrate temperature, and SiH/sub 4/, NH/sub 3/, and N/sub 2/ flow rates. The film was deposited by a plasma-enhanced chemical vapor deposition (PECVD) system. The PECVD process was characterized by a 2/sup 6-1/ fractional factorial experiment. Particular emphasis was placed on examining temperature effects at low pressure. Model prediction accuracy was optimized as a function of training factors. Predicted parameter effects were experimentally validated. Plots generated from an optimized model were used to qualitatively estimate deposition mechanisms. It is noticeable that under various plasma conditions, the RI varied little with the temperature. The temperature effect was extremely sensitive to the pressure level. Enhanced ion bombardment at high temperatures yielded a Si-rich film. Effect of each gas was little affected by the temperature. The SiH/sub 4/ flow rate played the most significant role in determining the RI at low pressure.

A low temperature doping technique to be applied in poly‐Si TFT's on plastic substrates was investigated. Heavily‐doped amorphous silicon layers were deposited on poly‐Si and the dopant atoms were driven in by subsequent excimer laser annealing. The entire process was carried out under a substrate temperature of 120 Ĉ, and a sheet resistance of as low as 300 O/sq. was obtained.

Non-photolithographic organic thin film transistors (OTFTs) were fabricated using pentacene and SiN x films on p-Si (1 0 0) at room temperature to investigate both the effects of their device structure (two different types of OTFTs, top-electrode and bottom-electrode) and the pentacene film deposition-rate on their current–voltage characteristics. OTFTs of the top-electrode type were prepared by thermal evaporation at various deposition rates of 1, 3, 5 and 7 A/s. The top-electrode OTFTs exhibited 40 times higher amount of currents than the bottom-electrode OTFTs at the same bias conditions. An optimum OTFT was obtained using 5 A/s and exhibited the saturation current, I D of approximately 4 μA at a gate bias of −40 V along with the field effect mobility of ∼0.046 cm 2 /V s and the on/off current ratio of ∼10 5 .

Novel process architectures are proposed for fabricating large-area high-resolution TFT-LCDs with a minimal number of process steps. A low contact resistance between Al bus lines and the transparent conductive oxide layer, necessary for large-area panels, is obtained by inducing a self-formed inter-metallic compound layer at the interface without using any additional buffer or capping layers. For enhanced brightness and resolution, a new TFT array structure integrated on a color-filter substrate, referred to as an Array on Color Filter (AOC) structure, has been developed. Good-quality TFTs were successfully constructed on the newly developed color filter for AOC within a sufficiently wide process margin. By adopting these novel technologies, a 15.0-in. XGA prototype panel was fabricated and shows good display performance. Thus, these novel technologies have improved cost efficiency and productivity for TFT-LCD manufacturing, and can be applied to the development of TFT-LCDs of extended display area and enhanced resolution, benefiting from the low resistance bus lines, the high aperture ratio, and reduction in total process steps.

We observed a wide range of photoluminescence (PL) energy variation from silicon nanocrystals prepared at a low temperature (⩽200 °C). The size of the silicon nanocrystals was controlled by varying the NH3/SiH4 mixture ratio. The PL peaks consist of three compounds: nanocrystalline silicon, amorphous silicon and nitrogen dangling bond. The luminescence from the silicon nanocrystals was dominant, and its wavelength varied from 510 to 710 nm as the subgrain size changed from 3.5 to 5 nm.

Nanocrystalline silicon (nc-Si) thin films that are deposited at low-temperatures (

Silicon-rich silicon nitride films with embedded silicon nanocrystals (Si NCs) were fabricated successfully on plastic substrates at a low temperature by catalytic chemical vapor deposition. A mixture of SiH 4 , NH 3 and H 2 was used as a source gas. Formation of the silicon nanocrystals was analyzed by photoluminescence spectra and was confirmed by transmission electron microscopy. The formation of Si NCs required an H 2 /SiH 4 mixture ratio that was higher than four.

Polycrystalline silicon (poly-Si) films were prepared directly at a low temperature (

We deposited amorphous silicon (a-Si) films below 150 °C with a custom-designed catalytic chemical vapor deposition (Cat-CVD) system. The hydrogen content of the films was controlled at less than 1.5 at. %. Excimer laser crystallization was performed without the preliminary dehydrogenation process. Crystallization occurred at a laser energy density above 70 mJ/cm2. Thin-film transistors (TFTs) were fabricated while the entire process temperatures were maintained at below 200 °C. We obtained a field-effect mobility of higher than 100 cm2/(V s) and a sub-threshold slope of 116 mV/dec. The a-Si film prepared by a low temperature Cat-CVD is a promising candidate for polycrystalline silicon TFTs of the active matrix display.

We attempted to fabricate multi-layer, thin film structures by catalytic chemical vapor deposition (Cat-CVD) at a low temperature (200 degrees C). A 5-10-nm-thick nanocrystalline silicon (nc-Si) layer was positioned asymmetrically between two silicon nitride (SINx) layers. The compositions of the SiNx layers were varied between silicon-rich and nitrogen-rich. Each layer was deposited continuously in the Cat-CVD chamber without post-annealing. High-resolution transmission electron microscopy (HRTEM) revealed that the nc-Si layer grew in columns on the surface of the bottom SiNx layer, and the columnar structure extended up to a few nanometers of the top SiNx layer. In photoluminescence (PL) spectra, the overall intensity increased with the thickness of the nc-Si layer, but the primary peak position changed more sensitively relative to the composition of the SiNx layers. Capacitance-voltage (C-V) hysteresis was observed only when 10-nm-thick nc-Si layers were inserted between the nitrogen-rich silicon nitride (NRSN) layers. Under a bias voltage of 5 V, the current in the sample with a 10-nm-thick nc-Si layer was higher by at least two orders of magnitude than that in the sample with a 5-nm-thick nc-Si layer. The I-V curve was fitted well using both the Fowler-Nordheim and the Poole-Frenkel models for electric fields of magnitudes greater than 1.1 MV/cm, thereby implying that both mechanisms contribute to the increase in the leakage current.

Nanocrystalline silicon (nc-Si) films were synthesized by catalytic chemical vapor deposition at a low substrate temperature (100 degrees C) for use as an active layer in bottom-gate thin-film transistors. The hydrogen-dilution technique was employed to increase the crystalline volume fraction of the synthesized films. The incubation layer thickness was estimated to be 5.1 nm for a hydrogen-dilution ratio, R(H) (= [H2]/[SiH4]), of 54. When R(H) was increased from 64 to 74, the deposition rate decreased from 20 to 0.5 nm/min. In order to achieve a high deposition rate and high crystallinity near the interface region, we modulated R(H) through the film thickness. We also fabricated metal-insulator-semiconductor-insulator-semiconductor diodes from multilayer structures consisting of an nc-Si layer sandwiched between two silicon nitride layers. By analyzing the capacitance-voltage characteristics of these diodes, we found that the hysteresis and rectifying behavior of these diodes were affected by the the nc-Si layer thickness.

Thin-film transistor liquid crystal display (TFT-LCD) panels of a high transmittance structure were fabricated by using a low-/spl kappa/ dielectric film as a passivation layer. The low-dielectric films were successfully deposited and patterned using a conventional plasma-enhanced chemical vapor deposition (PECVD) and plasma-assisted etching techniques. The interface between the a-Si channel and the overlaying passivation was modified by appropriate plasma treatment prior to the low-/spl kappa/ deposition. TFTs having the a-Si:C:O:H passivation showed a transfer characteristics similar to that of conventional TFTs. The high transmittance panel showed brightness approximately 30% higher than that of a standard panel without degrading other display characteristics, such as crosstalk.

The reaction sintering of equimolar mixtures of ZnO and Al{sub 2}O{sub 3} powders was investigated as a function of primary processing parameters such as the temperature, heating rate, green density, and particle size. The powder mixtures were prepared by two different methods. In one method, the ZnO and Al{sub 2}O{sub 3} powders were ball-milled. In the other method, the ZnO powder was chemically precipitated onto the Al{sub 2}O{sub 3} particles dispersed in a solution of zinc chloride. The sintering characteristics of the compacted powders prepared by each method were compared with those for a pre-reacted single-phase powder of zinc aluminate, ZnAl{sub 2}O{sub 4}. The chemical reaction between ZnO and Al{sub 2}O{sub 3} occurred prior to densification of the powder compact and was accompanied by fairly large expansion. The mixing procedure had a significant effect on the densification rate during reaction sintering. The densification rate of the compact formed from the ball-milled powder was strongly inhibited compared to that for the single-phase ZnAl{sub 2}O{sub 4} powder. However, the densification rate of the compact formed from the chemically precipitated mixture was almost identical to that for the ZnAl{sub 2}O{sub 4} powder. The difference in sintering between the ball-milled mixture and the chemicallymore » precipitated mixture is interpreted in terms of differences i the microstructural uniformity of the initial powder compacts resulting from the different preparation procedures.« less

Doping of polysilicon (poly-Si) films was performed at a low temperature (4 Ω/sq., which were considered to be sufficient to form good source-drain contacts. Also, a sheet resistance value that is as low as 300 Ω/sq. was demonstrated. It was found that the laser energy used for dopant activation was the major parameter to control the sheet resistance of the poly-Si films. The lowest attainable sheet resistance was not affected much by the ion dose, as long as the initial dose is higher than 1015 cm−2. The plasma immersion method was shown to be a good alternative to the ion shower, as the doping could be performed in a relatively short time without causing a structural damage to the poly-Si film.

Application of nanocrystalline silicon (nc-Si) and silicon nitride (SiNx) thin films on plastic substrates is one of the key technologies for flexible display devices and wearable electronics. The fabrication of electronic circuitry on flexible substrates often requires a thin film deposition technique that requires a processing temperature substantially lower than the glass transition point of the substrate material. The catalytic chemical vapor deposition (Cat-CVD) technique is one of the best candidates to obtain electronic quality inorganic films at low temperatures: a thin (0.4 – 0.7 mm in diameter) filament is the only component that is heated, saving the substrate from the direct heating, and the source gas is dissociated to energetic radicals upon contact with the filament, boosting the source-to-film conversion efficiency. The configuration of the filament can be varied in numerous ways to accommodate specific needs for various films. The distance between the filament and the substrate, the number of segments, the type of connections between segments (serial or parallel), the inter-filament spacing, and the total length of the filament have been changed to grow nc-Si and SiNxfilms at temperatures below 100ºC. All these parameters, however, not only affect the process temperature, but also the thermal profile on the substrate surface. In this study, influence of the thermal profile, resulting from various filament configurations, on the uniformity of the film across the substrate was investigated in terms of thickness and electrical properties. Figure 1 shows a schematic diagram of the showerhead-filament assembly of a Cat-CVD system. For a parallel arrangement of the filaments, a pair of molybdenum fixtures is attached to the electrical feed-through where the power is supplied to heat the filaments. The spacing between the filaments can be adjusted at an 8 mm interval. For a serial arrangement, insulating pillars, as many as eight, can be mounted around the showerhead. The filament may extend from one feed-through to the other in an arbitrary geometrical pattern, using these pillars as a mechanical support. The parallel arrangement was more advantageous than the serial arrangement in minimizing the self-heating of the substrate by the radiative heat from the filament. When only two pieces of filament was used with an inter-filament spacing of 56 mm and a filament-substrate distance of 5 cm, the process temperature was lowered to 100°C and the resulting films showed a good thickness uniformity and adhesion. As shown in Figure 2, a 2-D cross-sectional simulation with two point heat sources revealed that the temperature profile on the substrate surface had two maxima when the filament-substrate spacing was smaller than 1.7 cm. Beyond this distance the temperature profile behaved as if there was a single heat source at the center. When the filament-substrate spacing was larger than 8.5 cm, the temperature across the 100 mm-diameter substrate became uniform. On the 100 mm-diameter circular substrate, the thickness was measured at a 10 mm interval to investigate the uniformity across the substrate. The 56 mm inter-filament spacing led to the lowest standard deviation, and the thickness was uniform in the area between the filaments. Resistivity of nc-Si and breakdown field strength of SiNx, however, showed little correlation with the filament configuration. The standard deviation showed the lowest value for the inter-filament spacing of 56 mm, but contour plots for the resistivity and the breakdown field strength appeared to be more affected by the asymmetry of the reactor shape than by the geometry of the filament arrangement.

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