143 results on '"Travaly, Y."'
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2. Selective self-assembled monolayer coating to enable Cu-to-Cu connection in dual damascene vias
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3. Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration
4. Variation in process conditions of porogen-based low- k films: A method to improve performance without changing existing process steps in a sub-100 nm Cu damascene integration route
5. Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures
6. Air gap formation by UV-assisted decomposition of CVD material
7. Stress corrosion of organosilicate glass films in aqueous environments: Role of pH
8. Extent of plasma damage to porous organosilicate films characterized with nanoindentation, x-ray reflectivity, and surface acoustic waves
9. Thermomechanical properties of thin organosilicate glass films treated with ultraviolet-assisted cure
10. Materials characterization of WN xC y, WN x and WC x films for advanced barriers
11. Surface properties restoration and passivation of high porosity ultra low- k dielectric ( k ∼ 2.3) after direct-CMP
12. Short-ranged structural rearrangement and enhancement of mechanical properties of organosilicate glasses induced by ultraviolet radiation
13. A theoretical and experimental study of atomic-layer-deposited films onto porous dielectric substrates
14. A novel approach to resistivity and interconnect modeling
15. Nucleation, growth, and aggregation of gold on polyimide surfaces
16. Challenges in the implementation of low-k dielectrics in the back-end of line
17. Characterization of atomic layer deposited nanoscale structure on dense dielectric substrates by X-ray reflectivity
18. Study of thermal stability of nickel silicide by X-ray reflectivity
19. Challenges for structural stability of ultra-low- k-based interconnects
20. Impact of material/process interactions on the properties of a porous CVD-O 3 low-k dielectric film
21. The impact of the density and type of reactive sites on the characteristics of the atomic layer deposited WNxCy films.
22. Interface characterization of nanoscale laminate structures on dense dielectric substrates by x-ray reflectivity.
23. The impact of the density and type of reactive sites on the characteristics of the atomic layer deposited W[N.sub.x][C.sub.y] films
24. Damage reduction and sealing of low-k films by combined He and NH3 plasma treatment
25. Materials characterization of WNxCy, WNx and WCx films for advanced barriers
26. The impact of the density and type of reactive sites on the characteristics of the atomic layer deposited WNxCy films
27. Study of thermal stability of nickel silicide by X-ray reflectivity
28. Integration challenges of Cu pillars with extreme wafer thinning for 3D stacking and packaging
29. Enabling Cu-Cu connection in (dual) damascene interconnects by selective deposition of two different SAM molecules
30. Implementation of an industry compliant, 5×50μm, via-middle TSV technology on 300mm wafers
31. Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance
32. A novel concept for ultra-low capacitance via-last TSV
33. Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance
34. Temperature dependent electrical characteristics of through-si-via (TSV) interconnections
35. Variation in process conditions of porogen-based low-k films: A method to improve performance without changing existing process steps in a sub-100nm Cu damascene integration route
36. 3D stacked ICs using Cu TSVs and Die to Wafer Hybrid Collective bonding
37. Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping
38. 3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV)
39. Time and temperature dependence of early stage Stress-Induced-Voiding in Cu/low-k interconnects
40. Key factors to sustain the extension of a MHM-based integration scheme to medium and high porosity PECVD low-k materials
41. Calculation of C 1s core-level shifts in poly(ethylene terephthalate) and comparison with x-ray photoelectron spectroscopy
42. Preface
43. Materials characterization of WNxCy, WNx and WCx films for advanced barriers
44. Surface properties restoration and passivation of high porosity ultra low-k dielectric (k∼2.3) after direct-CMP
45. The critical role of the metal / porous low-k interface in post direct CMP defectivity generation and resulting ULK surface and bulk hydrophilisation
46. Damage Reduction and Sealing of Low-k Films by Combined He and NH[sub 3] Plasma Treatment
47. Erratum: Damage Reduction and Sealing of Low-k Films by Combined He and NH3 Plasma Treatment [Electrochem. Solid-State Lett., 10, G76 (2007)]
48. Minimizing plasma damage and in situ sealing of ultralow-k dielectric films by using oxygen free fluorocarbon plasmas
49. Processing damage and electrical performance of porous dielectrics in narrow spaced interconnects
50. Integration of TSVs, wafer thinning and backside passivation on full 300mm CMOS wafers for 3D applications.
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