156 results on '"Seo, Jae Hwa"'
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2. Displacement damage effect of proton irradiation on vertical β-Ga2O3 and SiC Schottky barrier diodes (SBDs)
3. Analysis and Optimization for Characteristics of Vertical GaN Junctionless MOSFETs Depending on Specifications of GaN Substrates
4. Simulation of CMOS logic inverter based on vertically stacked polycrystalline silicon nanosheet gate-all-around MOSFET and its electrical characteristics
5. Total Ionizing Dose (TID) Effects on the 1.2 kV SiC MOSFETs under Proton Irradiation
6. Degeneration Mechanism of 30 Mev and 100 Mev Proton Irradiation Effects on 1.2 Kv Sic Mosfets
7. Low voltage operation of GaN vertical nanowire MOSFET
8. Normally-off AlGaN/GaN-based MOS-HEMT with self-terminating TMAH wet recess etching
9. TMAH-based wet surface pre-treatment for reduction of leakage current in AlGaN/GaN MIS-HEMTs
10. Design optimization of vertical nanowire tunneling field-effect transistor based on AlGaSb/InGaAs heterojunction layer
11. Effects of sidewall MOS channel on performance of AlGaN/GaN FinFET
12. Design and analysis of Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET)
13. Bulk-fin field-effect transistor-based capacitorless dynamic random-access memory and its immunity to the work-function variation effect
14. Honokiol inhibits epithelial–mesenchymal transition and hepatic fibrosis via activation of Ecadherin/GSK3β/JNK and inhibition of AKT/ERK/p38/β‐catenin/TMPRSS4 signaling axis.
15. Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon
16. Design of a Capacitorless DRAM Based on a Polycrystalline-Silicon Dual-Gate MOSFET with a Fin-Shaped Structure
17. InGaAs/InP heterojunction-channel tunneling field-effect transistor for ultra-low operating and standby power application below supply voltage of 0.5 V
18. Simulation study on effect of drain underlap in gate-all-around tunneling field-effect transistors
19. Power Cycling Test Failure Analysis of SiC MOSFET Devices
20. Fabrication and Performances of Recessed Gate AlGaN/GaN MOSFETs with Si₃N₄/TiO₂ Stacked Dual Gate Dielectric
21. Design of a recessed-gate GaN-based MOSFET using a dual gate dielectric for high-power applications
22. Analysis for DC and RF Characteristics Recessed-Gate GaN MOSFET Using Stacked TiO2/Si3N4 Dual-Layer Insulator
23. Design and Analysis of DC/DC Boost Converter Vertical GaN Power Device based on Epitaxially Grown GaN-on-sapphire
24. Electrical Performances of GaN-based Vertical Trench MOSFETs with Cylindrical and Hexagonal Structure
25. Effect of Work-function Variation on Transfer Characteristics and Memory Performances for Gate-all-around JLFET based Capacitorless DRAM
26. Design optimization of vertical double-gate tunneling field-effect transistors
27. Polycrystalline-Silicon-MOSFET-Based Capacitorless DRAM With Grain Boundaries and Its Performances
28. Design of Capacitorless DRAM Based on Polycrystalline Silicon Nanotube Structure
29. Design Optimization of AlN/GaN-Based Double-Heterojunction Fin-Type High Electron Mobility Transistors for High On-State Current
30. Design Optimization and Analysis of InGaAs-Based Junctionless Fin Type Field-Effect Transistors (FinFETs) with LG = 10 nm
31. Enhancement-Mode GaN-Based Junctionless Vertical Surrounding-Gate Transistor with Dual-Material Gate Structure for High-Frequency Applications
32. Design Optimization of InAs-Based Gate-All-Around (GAA) Arch-Shaped Tunneling Field-Effect Transistor (TFET)
33. Fabrication of AlGaN/GaN Fin-Type HEMT Using a Novel T-Gate Process for Improved Radio-Frequency Performance
34. Capacitorless One-Transistor Dynamic Random-Access Memory Based on Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor with Si/SiGe Heterojunction and Underlap Structure for Improvement of Sensing Margin and Retention Time
35. Design Optimization and Analysis of InGaAs/InAs/InGaAs Heterojunction-Based Electron Hole Bilayer Tunneling FETs
36. Design Optimization of InGaAs/GaAsSb-Based P-Type Gate-All-Around Arch-Shaped Tunneling Field-Effect Transistor
37. Characterization of a Capacitorless DRAM Cell for Cryogenic Memory Applications
38. A polycrystalline-silicon dual-gate MOSFET-based 1T-DRAM using grain boundary-induced variable resistance
39. Fabrication and Characterization of a Thin-Body Poly-Si 1T DRAM With Charge-Trap Effect
40. Performance enhancement of AlGaN/GaN nanochannel omega-FinFET
41. A Novel Analysis of ${L}_{\text{gd}}$ Dependent-1/${f}$ Noise in In0.08Al0.92N/GaN
42. Simulation of One-Transistor Dynamic Random-Access Memory Based on Symmetric Double-Gate Si Junctionless Transistor
43. Design Optimization of Ge/GaAs-Based Heterojunction Gate-All-Around (GAA) Arch-Shaped Tunneling Field-Effect Transistor (A-TFET)
44. Performance comparison between p–i–n and p–n junction tunneling field-effect transistors
45. Capacitorless one-transistor dynamic random-access memory based on asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor with n-doped boosting layer and drain-underlap structure
46. Design optimization InGaAs/GaAsSb-based heterojunction Gate-all-around (GAA) arch-shaped tunneling field-effect transistor (A-TFET)
47. Electrical Performances of InN/GaN Tunneling Field-Effect Transistor
48. Design Optimization and Analysis of InGaAs-Based Gate-All-Around (GAA) Junctionless Field-Effect Transistor (JLFET)
49. Effect of Electric Fringe-Field on Low-Power and Radio-Frequency Performances of Sub-10 nm Junctionless Transistors with Hetero-Dielectric Spacer Structure
50. GaN-Based Junctionless Field-Effect Transistor with Hetero-Gate Dielectric for Enhancement of Direct Current and Radio Frequency Performance
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