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33 results on '"Reliable RF and Mixed-signal Systems (RMS )"'

1. mm-Wave Through-Load Element for On-Wafer Measurement Applications

Author

Sylvie Lepilliet, Philippe Ferrari, Loic Vincent, Christophe Gaquiere, Olivier Occello, Emmanuel Pistono, Abdelhalim A. Saadi, Marc Margalef-Rovira, Vanessa Avramovic, Manuel J. Barragan, Sylvain Bourdel, Puissance - IEMN (PUISSANCE - IEMN), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), NXP Semiconductors [France], Plateforme de Caractérisation Multi-Physiques - IEMN (PCMP - IEMN), Centre Interuniversitaire de Micro-Electronique (CIME), Institut National Polytechnique de Grenoble (INPG), Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), PCMP CHOP, European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), and Reliable RF and Mixed-signal Systems (RMS )

Subjects
Through-load, transfer-switch millimeter-wave, attenuator, 02 engineering and technology, BiCMOS, law.invention, law, 0202 electrical engineering, electronic engineering, information engineering, Insertion loss, slow-wave, Electrical and Electronic Engineering, Physics, Attenuator (electronics), on-wafer, business.industry, 020208 electrical & electronic engineering, Bandwidth (signal processing), Transistor, Electrical engineering, Transfer switch, 3-dB coupler, [SPI.TRON]Engineering Sciences [physics]/Electronics, Return loss, business, Voltage
Abstract

This paper presents an innovative Through-Load element aimed at characterization applications at mm-wave frequencies. The proposed structure can behave as a Through connection or as a 50- $\Omega $ load depending on a DC control voltage. Among other potential applications, this system can be used to implement a transfer switch or an attenuator. A demonstrator was fabricated and measured in the STM 55-nm BiCMOS technology. Over a wide bandwidth, from 55 GHz up to 170 GHz, experimental measurements demonstrate a maximum 1.6-dB of insertion loss when behaving as a Through connection and a minimum 14-dB of insertion loss when behaving as a 50- $\Omega $ load. In both cases, the return loss is better than 10 dB. The insertion loss at 90 GHz is 0.6 dB for the Through connection and 20 dB for the 50- $\Omega $ load connection.

Published
2021

2. Towards a Digital Twin model for Building Energy Management: Case of Morocco

Author

Abdelali Agouzoul, Mohamed Tabaa, Badr Chegari, Karim Alami, Abbas Dandache, Emmanuel Simeu, Laboratoire Pluridisciplinaire de Recherche et Innovation (LPRI), Ecole Marocaine des Sciences de l'Ingénieur (EMSI), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Génie Informatique, de Production et de Maintenance (LGIPM), and Université de Lorraine (UL)

Subjects
IoT, Architectural engineering, energy management, smart cities, Computer science, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], 02 engineering and technology, Standard of living, 7. Clean energy, Globalization, digital twin, Urbanization, building, 11. Sustainability, 0202 electrical engineering, electronic engineering, information engineering, Production (economics), General Environmental Science, 020206 networking & telecommunications, Energy consumption, Energy conservation, Identification (information), PACS 8542, Work (electrical), General Earth and Planetary Sciences, 020201 artificial intelligence & image processing, industry of the future
Abstract

International audience; During successive industrial revolutions, the objective has not only been for industry to improve and satisfy its direct needs, it has also been to improve society’s standard of living and make life easier for the consumer. Therefore, economic growth should always go hand in hand with each industrial revolution. The medical industry, energy conservation and, in particular, production technologies will be transformed through new value chain models. Globalization, urbanization, demographic change and energy transformation are the transforming forces estimating the technological impetus for a better identification of solutions for a world on the move. In recent years, successive revolutions have made remarkable contributions to a person’s quality of life, safety, industrial economy, comfort and health. This work aims at improving the energy consumption of buildings. To achieve this goal, we have created a Digital Twin that accurately reflects the behavior and characteristics of a future or existing building. To reproduce a copy of the future or existing building, we chose to use the Autodesk REVIT solution to meet several constraints. These have a significant influence on the energy behavior of the building.

Published
2021

3. A Nonintrusive Machine Learning-Based Test Methodology for Millimeter-Wave Integrated Circuits

Author

Estelle Lauga-Larroze, Florent Cilici, Loic Vincent, Salvador Mir, Manuel J. Barragan, Sylvain Bourdel, Gildas Leger, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC), Centre Interuniversitaire de Micro-Electronique (CIME), and Institut National Polytechnique de Grenoble (INPG)

Subjects
BIST, Test strategy, Computer science, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, Integrated circuit, Machine learning, computer.software_genre, law.invention, law, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Leverage (statistics), [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Electrical and Electronic Engineering, Index Terms-mm-wave IC test, Electronic circuit, machine learning-based test, Radiation, non-intrusive test, business.industry, Design-for- Test, 020206 networking & telecommunications, Test method, Condensed Matter Physics, PACS 8542, CMOS, Built-in self-test, process monitor circuits, Device under test, Artificial intelligence, business, computer
Abstract

International audience; In this article, we leverage the power of machine learning algorithms to propose a test methodology for millimeter-wave (mm-wave) integrated circuits. The proposed test strategy is based on identifying the main process degradation mechanisms in a particular device under test (DUT) and then designing dedicated process monitor circuits to characterize this degradation and infer the DUT performance. The resulting process monitors do not load or couple to any of the DUT nodes, and the methodology can be adapted to any mm-wave device without complex codesign. The proposed test methodology is illustrated on a set of 21 fabricated samples of a 65-GHz PA designed in STMicroelectronics 55-nm CMOS technology.

Published
2020

4. Visual Perceptual Quality Assessment Based on Blind Machine Learning Techniques

Author

Ghislain Takam Tchendjou, Emmanuel Simeu, BEN TITO, Laurence, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
Databases, Factual, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], Normal Distribution, convolutional neural network, visual perception, TP1-1185, 02 engineering and technology, Biochemistry, Article, Analytical Chemistry, Machine Learning, non-distortion-specific, 0202 electrical engineering, electronic engineering, information engineering, Image Processing, Computer-Assisted, Electrical and Electronic Engineering, Instrumentation, blind image quality assessment, regression technique, deep learning, ILBQA, FPGA implementation, Chemical technology, 020206 networking & telecommunications, Atomic and Molecular Physics, and Optics, [INFO.INFO-OH] Computer Science [cs]/Other [cs.OH], PACS 8542, 020201 artificial intelligence & image processing, Neural Networks, Computer
Abstract

This paper presents the construction of a new objective method for estimation of visual perceiving quality. The proposal provides an assessment of image quality without the need for a reference image or a specific distortion assumption. Two main processes have been used to build our models: The first one uses deep learning with a convolutional neural network process, without any preprocessing. The second objective visual quality is computed by pooling several image features extracted from different concepts: the natural scene statistic in the spatial domain, the gradient magnitude, the Laplacian of Gaussian, as well as the spectral and spatial entropies. The features extracted from the image file are used as the input of machine learning techniques to build the models that are used to estimate the visual quality level of any image. For the machine learning training phase, two main processes are proposed: The first proposed process consists of a direct learning using all the selected features in only one training phase, named direct learning blind visual quality assessment DLBQA. The second process is an indirect learning and consists of two training phases, named indirect learning blind visual quality assessment ILBQA. This second process includes an additional phase of construction of intermediary metrics used for the construction of the prediction model. The produced models are evaluated on many benchmarks image databases as TID2013, LIVE, and LIVE in the wild image quality challenge. The experimental results demonstrate that the proposed models produce the best visual perception quality prediction, compared to the state-of-the-art models. The proposed models have been implemented on an FPGA platform to demonstrate the feasibility of integrating the proposed solution on an image sensor.

Published
2021

5. Integrated Wideband Millimeter-Wave Bias-Tee – Application to Distributed Amplifier Biasing

Author

Jean-Daniel Arnould, Mohamad El Chaar, Florence Podevin, Antonio Augusto Lisboa de Souza, Manuel J. Barragan, Sylvain Bourdel, Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Universidade Federal da Paraiba (UFPB), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
Physics, business.industry, Bandwidth (signal processing), Electrical engineering, Distributed amplifier, Hardware_PERFORMANCEANDRELIABILITY, Integrated circuit, law.invention, Bias tee, CMOS, Parasitic capacitance, law, PACS 85.42, Broadband, Hardware_INTEGRATEDCIRCUITS, Wideband, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, ComputingMilieux_MISCELLANEOUS
Abstract

A wideband fully-integrated bias-tee well suited for millimeter waves is presented. Compared to conventional bias-tees, where RF-choke is optimized on the basis of its inductance value, here, the proposed RF-choke takes advantage of its low parasitic capacitance as one of the design parameters. While enabling wideband operation, in particular towards lower frequencies, this bias-tee enables ease-of-implementation, robustness against resonance, efficient power delivery to the intended wideband circuit and contributes to circuit area reduction on integrated circuit (IC) implementation. As a proof-of-concept, a wideband CMOS distributed amplifier (DA) with a lower-corner frequency (F lower ) of 5 GHz and an upper-corner frequency (F upper ) close to 100 GHz is implemented in STMicroelectronics’ 55-nm technology with the proposed bias-tee connected to its artificial drain line. The implemented bias-tee enabled a bandwidth close to 100 GHz and its RF-choke required a surface area of 82 µm x 82 µm. When integrated along with the DA, the overall chip area remained the same (0.89 mm2). Post-layout simulations showed a DC power overhead (due to inclusion of the on-chip bias-tee) limited to 17% of the DA-only consumption.

Published
2021

6. Mm-wave single-pole double-throw switches: HBT-vs MOSFET-based designs

Author

Loic Vincent, Philippe Ferrari, A. A. Lisboa de Souza, M. Margalef-Rovira, C. Gaquiere, Emmanuel Pistono, Manuel J. Barragan, Florence Podevin, Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), Puissance - IEMN (PUISSANCE - IEMN), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Universidade Federal da Paraiba (UFPB), Centre Interuniversitaire de Micro-Electronique (CIME), Institut National Polytechnique de Grenoble (INPG), Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Division of Graduate Education, DGE, European Commission, EC, TARANTO, Electronic Components and Systems for European Leadership, ECSEL, European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Federal University of Paraíba (UFPB), and Reliable RF and Mixed-signal Systems (RMS )

Subjects
Physics, BiCMOS, mm-Wave, business.industry, Heterojunction bipolar transistor, Bandwidth (signal processing), Bicmos technology, SPDT, [SPI]Engineering Sciences [physics], S-CPW, HBT, MOSFET, Return loss, Insertion loss, Optoelectronics, slow-wave, Center frequency, business
Abstract

International audience; This paper aims to compare the performance of HBT-based and MOSFET-based mm-Wave SPDT switches in a single BiCMOS technology. To the best of authors' knowledge, a direct comparison of this function in the same integrated process has never been reported before. Measurement results on two 50-GHz integrated SPDTs reveal that the HBT-based SPDT switch yields 1.7 dB of insertion loss and 14 dB of isolation in its central frequency, with a bandwidth covering the 30-80 GHz frequency range when considering a return loss greater than 10 dB. On the other hand, the MOSFET-based SPDT switch yields 2.1 dB of insertion loss and 12 dB of isolation at center frequency and a bandwidth covering the 33-80 GHz frequency range.

Published
2021

7. Analysis and mitigation of timing inaccuracies in high-frequency on-chip sinusoidal signal generators based on harmonic cancellation

Author

Manuel J. Barragan, Ankush Mamgain, Salvador Mir, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
Signal generator, Noise (signal processing), Computer science, Silicon on insulator, Linearity, Integrated circuit, law.invention, Harmonic analysis, law, PACS 85.42, Limit (music), Electronic engineering, Key (cryptography), [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract

On-chip sinusoidal signal generators are a key element for enabling a wide variety of DfT and BIST applications for AMS-RF integrated circuits. Harmonic cancellation techniques have been recently proposed for the efficient implementation of high-quality embedded sinusoidal signal generators. However, harmonic cancellation techniques, based on phase-shifting and combining a set of periodic signals, rely on precise and accurate phase-shift control which makes them very sensitive to timing issues due to mismatch, noise, etc. Timing issues can severely limit the performance of these generators especially in high-frequency applications where precise timing becomes challenging. In this paper, we analyze the effects of timing inaccuracies on high-speed harmonic cancellation generators and we propose circuit techniques for mitigating them. Electrical simulation results on a 1.45 GHz sinusoidal signal generator implemented in ST 28 nm FDSOI technology are provided to validate our proposals.

Published
2021

8. Multi-objective optimization of building energy performance and indoor thermal comfort by combining artificial neural networks and metaheuristic algorithms

Author

Mohamed Tabaa, Fouad Moutaouakkil, Badr Chegari, Hicham Medromi, Emmanuel Simeu, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Ecole Marocaine des Sciences de l'Ingénieur (EMSI), Ecole Nationale Supérieure d'Electricité et de Mécanique [Casablanca] (ENSEM), and Université Hassan II [Casablanca] (UH2MC)

Subjects
Mathematical optimization, [SPI.GCIV.CD]Engineering Sciences [physics]/Civil Engineering/Construction durable, Artificial neural network, Computer science, 020209 energy, Mechanical Engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 0211 other engineering and technologies, Particle swarm optimization, 02 engineering and technology, Building and Construction, TRNSYS, 7. Clean energy, Multi-objective optimization, 021105 building & construction, Genetic algorithm, 0202 electrical engineering, electronic engineering, information engineering, Feedforward neural network, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Building envelope, Civil and Structural Engineering, Efficient energy use, [SPI.GCIV.EC]Engineering Sciences [physics]/Civil Engineering/Eco-conception
Abstract

International audience; During the last few years, multi-objective optimization processes have become one of the main challenges for energy efficiency in buildings. In this work, a new efficient multi-objective optimization method, based on the Building Performance Optimization (BPO) technique, has been developed to improve the indoor thermal comfort and energy performance of residential buildings, i.e. a Moroccan ground floor + first floor (GFFF) house located in Marrakech region (5th climatic zone according to the Thermal Building Code in Morocco). The most influential design variables have been well explored in order to find the optimal trade-off between these two objectives. Indeed, this technique is based on the integration of Artificial Neural Networks (ANNs), in particular Multilayer Feedforward Neural Networks (MFNN), coupled with the most commonly used metaheuristic algorithms, i.e. Nondominated Sorting Genetic Algorithm (NSGA-II), Multi-Objective Particle Swarm Optimization (MOPSO) and Multi-Objective Genetic Algorithm (MOGA), in order to minimize computation time as much as possible. The TRNSYS software was used to establish the various dynamic thermal simulations required to create the database, from which the ANNs were able to set up their learning. The results show that this methodology is being used successfully, leading to different proposed solutions in terms of building envelope design. However, only the solutions using MOPSO are finally retained, as they have shown the greatest desired performance compared to the others. Thus, the thermal needs, particularly those for heating and cooling, have been significantly reduced to 74.52% of the total, while improving the indoor thermal comfort by 4.32% compared to the base design. Finally, we strongly recommend this methodology to the different actors in this field, including designers, engineers, architects, engineering offices, etc., when several objectives need to be contrasted while simultaneously considering several design variables.

Published
2021

9. Estimation of Oxide Breakdown Voltage During a CDM Event Using Very Fast Transmission Line Pulse and Transmission Line Pulse Measurements

Author

Emmanuel Simeu, Jean-Daniel Arnould, Chloe Troussier, Johan Bourgeat, Blaise Jacquier, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), STMicroelectronics [Crolles] (ST-CROLLES), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA)

Subjects
010302 applied physics, oxide breakdown, Materials science, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], Transistor, CDM, ESD, 020206 networking & telecommunications, 02 engineering and technology, VF-TLP, 01 natural sciences, law.invention, Electric power transmission, Reliability (semiconductor), law, PACS 85.42, Logic gate, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Breakdown voltage, Event (particle physics), Transmission-line pulse, Voltage
Abstract

International audience; Using TLP (Transmission Line Pulse) and VF-TLP (Very Fast Transmission Line Pulse) to emulate a fast transient stress, a study of oxide reliability during a CDM (Charged Devise Model) event was done to establish an empirical law between the time to breakdown and the voltage applied to the gate. A wide array of transistors in different configurations was tested to reflect real situation during a CDM event.

Published
2021

10. Automated Analog Fault Simulators: Application to Failure Analysis

Author

Melis, Tommaso, BEN TITO, Laurence, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
PACS 85.42, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2021

11. Strategies for Reduced-code Static Testing of SAR ADCs

Author

Silveira feitoza, Renato, STAR, ABES, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Université Grenoble Alpes [2020-....], Manuel Barragán Asian, Salvador Mir, Reliable RF and Mixed-signal Systems (RMS ), and Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )

Subjects
Design-For-Test, CAN à approximations successives, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Test de linéarité statique, Analog-To-Digital converters, Successive-Approximation ADCs, Conception pour le test, Built-In self-Test, Test de linéarité en code réduit, Static linearity test, Reduced-Code linearity testing, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Convertisseurs analogiques-Numériques, Auto-Test intégré
Abstract

Characterizing the static linearity performance is one of the key tasks in the test of an Analog-to-Digital converter (ADC). Normally, the static linearity performance figures are measured during the production phase, and the standard methodologies in the industry require the collection of a large amount of data since each code needs to be measured a few times to average the effect of noise. Reduced-code techniques for ADC static linearity test have the potential to drastically reduce the number of necessary measurements for a complete static linearity characterization. These techniques take advantage of the repetitive operation of certain families of converters such as pipeline, successive-approximation registers (SARs), cyclic, etc. In this thesis, novel reduced-code techniques for static linearity test of SAR ADCs are presented. They are based on the on-chip generation and measurement of the transitions of the internal digital-to-analog converter (DAC) of the ADC. This allows inferring the complete transfer function of the ADC by measuring only a carefully selected subset of the total set of codes, greatly reducing the global test time. Moreover, the inherent simplification of static linearity tests provided by reduced-code techniques may open the door to a full built-in self-test (BIST) implementation. This way, tester requirements can be relaxed and test cost may be further contained by moving static linearity test resources to the device under test itself. The proposed test methodology does not require a test stimulus, and it is shown that the necessary measurements can be easily extracted by reconfiguring portions of the SAR into a low-resolution incremental converter., La caractérisation de la performance de linéarité statique est l'une des tâches clés dans le test d'un convertisseur analogique-numérique (CAN). Normalement, les chiffres de la performance de linéarité statique sont mesurés pendant la phase de production, et les méthodologies standard dans l'industrie exigent l'extraction d'une grande quantité de données puisque chaque code doit être mesuré plusieurs fois pour faire la moyenne de l'effet du bruit. Les techniques à code réduit pour le test de linéarité statique des CANs ont le potentiel de réduire considérablement le nombre de mesures nécessaires pour une caractérisation complète de la linéarité statique. Ces techniques exploitent du fonctionnement répétitif de certaines familles de convertisseurs comme les pipelines, les registres à approximation successive (SAR), les cycliques, etc. Dans cette thèse, des nouvelles techniques à code réduit pour le test de linéarité statique des ADCs SAR sont présentées. Elles sont basées sur la génération et la mesure sur puce des transitions du convertisseur numérique-analogique (CNA) interne du CAN. Cela permet de déduire la fonction de transfert complète du CAN en ne mesurant qu'un sous-ensemble soigneusement sélectionné de l'ensemble des codes, ce qui réduit considérablement le temps de test global. De plus, la simplification inhérente des tests de linéarité statique fournie par les techniques à code réduit peut ouvrir la porte à une mise en œuvre complète de l'auto-test intégré (BIST). De cette façon, les exigences du testeur peuvent être relâchées et le coût du test peut être davantage contenu en déplaçant les ressources du test de linéarité statique vers le dispositif testé lui-même. La méthodologie de test proposée ne nécessite pas de stimulus de test, et il est démontré que les mesures nécessaires peuvent être facilement extraites en reconfigurant des parties du SAR en un convertisseur incrémental à faible résolution.

Published
2021

12. ESD mm-wave-circuit protection: 3-dB couplers

Author

Géraldine Pelletier, Christophe Gaquiere, Johan Bourgeat, Jean-Marc Duchamp, Sylvie Lepilliet, Vanessa Avramovic, Philippe Ferrari, Marc Margalef-Rovira, Manuel J. Barragan, Sylvain Bourdel, Emmanuel Pistono, Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Plateforme de Caractérisation Multi-Physiques - IEMN (PCMP - IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), STMicroelectronics [Crolles] (ST-CROLLES), Laboratoire de Génie Electrique de Grenoble (G2ELab ), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Puissance - IEMN (PUISSANCE - IEMN), European Union through Toward Advanced BiCMOS NanoTechnology Platforms for RF Applications TARANTO (Grant Number: ECSEL JU GA 737454), General Directorate for Enterprises DGA France, PCMP CHOP, Laboratoire commun STMicroelectronics-IEMN T1, European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), and Reliable RF and Mixed-signal Systems (TIMA-RMS)

Subjects
ESD protection, BiCMOS, 01 natural sciences, 7. Clean energy, 0103 physical sciences, couplers, Insertion loss, slow-wave, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 010302 applied physics, Physics, Electrostatic discharge, business.industry, Attenuation, CMOS, Electrical engineering, mmwave, Electronic, Optical and Magnetic Materials, Human-body model, PACS 8542, Return loss, Node (circuits), business
Abstract

International audience; This article presents an innovative architecture for the implementation of an electrostatic discharge (ESD) protection for millimeter-wave (mm-wave) devices. The proposed architecture is based on the use of 3-dB couplers, whose coupled outputs have been shorted to the ground node. In order to reduce the physical dimensions of the 3-dB coupler and to reach the high coupling required for this application, the Coupled Slow wave CoPlanar Waveguides (CS-CPWs) architecture was favored. The demonstrator of the proposed system was fabricated in the STMicroelectronics 55-nm bipolar-cmos (BiCMOS) technology, demonstrating a return loss greater than 10 dB across the 50-160-GHz frequency range, an attenuation greater than 18 dB below 5 GHz, and a minimum insertion loss at 90 GHz of 0.55 dB. To prove the performance of the proposed solution, human body model (HBM) and charge device model (CDM) events were simulated at the input of the 3-dB coupler, showing that the proposed architecture effectively protects against these events while minimally impacting the RF path.

Published
2021

13. Detection, Location and Concealment of Defective Pixels in Image Sensors

Author

Emmanuel Simeu, Ghislain Takam Tchendjou, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
defective pixel detection, Computer science, Physics::Instrumentation and Detectors, diagnosis, ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION, 01 natural sciences, Image (mathematics), Defective pixel, Software, 0103 physical sciences, Computer Science::Multimedia, Computer Science (miscellaneous), self-healing, 0601 history and archaeology, Computer vision, Image sensor, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Block (data storage), 010302 applied physics, 060102 archaeology, Pixel, neighborhood analysis, business.industry, Process (computing), 06 humanities and the arts, computer.file_format, image correction, Computer Science Applications, Human-Computer Interaction, PACS 8542, Computer Science::Computer Vision and Pattern Recognition, Artificial intelligence, Image file formats, business, online-test, computer, Information Systems
Abstract

This paper presents the construction process of defective pixel detection and concealment methods, for image sensor online diagnosis and self-healing. The proposed process is based on pixel neighborhood analysis using only simple arithmetic operations on the image files. This leads to an optimization of the processing speed of the produced image. A first step in the process is to identify and locate the defective pixels on the image. Three defective pixel detection algorithms are proposed. The first one uses the distance between the pixel under test and its neighboring pixels. The second method is based on the median value of the pixel block around each pixel. The third method uses an evaluation and analysis of the local dispersion parameters in the image. The concealment of detected defective pixels is the second step of the self-healing process of image sensor. It consists of substituting the defective value by the median value of the neighborhood pixel block. In the study and learning phase, distorted images obtained by injecting random disturbances into healthy reference images are used to evaluate the defective pixel detection and concealment methods. The set of $1 176$ distorted images is constructed using 196 reference images with six types of defects, based on typical failure mechanism of image sensors. The proposed methods are compared to different state-of-the-art defective pixel detection and correction methods, in both software and $FPGA$ F P G A implementations. The experimental results undoubtedly demonstrate that the new methods proposed in this paper perform the best results compared to the state-of-the-art.

Published
2021

14. Analog and Mixed Signal Diagnosis Flow Using Fault Isolation Techniques and Simulation

Author

Tommaso Melis, Emmanuel Simeu, Etienne Auvray, STMicroelectronics [Grenoble] (ST-GRENOBLE), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and BEN TITO, Laurence

Subjects
diagnosis, Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, customer return, Mixed-signal integrated circuit, Fault detection and isolation, Flow (mathematics), Control theory, PACS 85.42, SoC, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, fault simulation, ComputingMilieux_MISCELLANEOUS, emission microscopy
Abstract

Getting accurate fault isolation during failure analysis is mandatory for success of Physical Failure Analysis (PFA) in critical applications. Unfortunately, achieving such accuracy is becoming more and more difficult with today’s diagnosis tools and actual process node such as BCD9 and FinFET 7 nm, compromising the success of subsequent PFA done on defective SoCs. Electrical simulation is used to reproduce emission microscopy, in our previous work and, in this paper, we demonstrate the possibility of using fault simulation tools with the results of electrical test and fault isolation techniques to provide diagnosis with accurate candidates for physical analysis. The experimental results of the presented flow, from several cases of application, show the validity of this approach.

Published
2020

15. Guest Editorial Special Issue on the IEEE International NEWCAS Conference 2020

Author

David, J.P., Barragan, Manuel J., David, Jean-Pierre, École Polytechnique de Montréal (EPM), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
[SPI]Engineering Sciences [physics], business.industry, Computer science, 020208 electrical & electronic engineering, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Electrical and Electronic Engineering, Telecommunications, business, ComputingMilieux_MISCELLANEOUS, Selection (genetic algorithm)
Abstract

This Special Issue is a selection of the best articles presented at the 18th IEEE International NEWCAS Conference (NEWCAS) 2020 that was held in Montreal, Canada, on June 16–19, 2020. As an Interregional flagship conference of the IEEE Circuits and Systems Society (CASS), this conference covers a wide spectrum of topics, research, and practice in the fields of circuits and systems, and offers an international forum for exchanging ideas and results.

Published
2021

16. A fully-integrated high-isolation transfer switch for G-band in-situ reflectometer applications

Author

W. Aouimeur, Estelle Lauga-Larroze, Daniel Gloria, Jean-Daniel Arnould, Marc Margalef-Rovira, Issa Alaji, Christophe Gaquiere, Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), STMicroelectronics [Crolles] (ST-CROLLES), Puissance - IEMN (PUISSANCE - IEMN), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), This work is supported by the project ANR-14-CE260027-BISCIG of the French National Research Agency (ANR). The authors wish to acknowledge Jose Moron Guerra from Asygn Grenoble, Alexandre Silligaris from CEA-Leti Grenoble and Sylvie Lepilliet from IEMN for their help in design and characterization., PCMP CHOP, Laboratoire commun STMicroelectronics-IEMN T1, ANR-14-CE26-0027,BISCIG,Caractérisation totalement intégrée en bande G(2014), Reliable RF and Mixed-signal Systems (RMS ), and Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA)

Subjects
business.industry, Computer science, 020208 electrical & electronic engineering, Overhead (engineering), Electrical engineering, 020206 networking & telecommunications, Topology (electrical circuits), 02 engineering and technology, Transfer switch, BiCMOS, CMOS, Built-in self-test, G band, 0202 electrical engineering, electronic engineering, information engineering, Insertion loss, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business
Abstract

International audience; This paper describes two fully-integrated transfer switches designed for in-situ reflectometers and Built-In Self-Test applications (BIST) in the 140 to 220 GHz band (G-band). The proposed switches were designed in the STMicroelectronics 55-nm BiCMOS technology using the Single-Shunt and the Double-Shunt topology, respectively. In the 140 to 195 GHz frequency range, the Double-Shunt Transfer Switch shows an isolation between 27 and 46 dB, and an insertion loss between 5 and 7 dB. Compared to the Single-Shunt Transfer Switch, the double shunt switch presents a much better isolation while having a quite comparable insertion loss and area overhead. To the best of our knowledge, the proposed switches are the first fully integrated transfer switches in BiCMOS or CMOS technologies.

Published
2020

17. A Non-Closed-Form Mathematical Model for Uniform and Non-Uniform Distributed Amplifiers

Author

Antonio Augusto Lisboa de Souza, Manuel J. Barragan, Sylvain Bourdel, Florence Podevin, Mohamad El Chaar, Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
computational modeling, bandwidth, Power gain, Computer science, 020208 electrical & electronic engineering, Bandwidth (signal processing), Semiconductor device modeling, Distributed amplifier, distributed amplifier, analytical model, 020206 networking & telecommunications, Context (language use), gain, 02 engineering and technology, BiCMOS, Artificial transmission line, CMOS, PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, semiconductor device modeling, mathematical model
Abstract

International audience; A non-closed-form general mathematical model for CMOS distributed amplifier (DA) for broadband applications is presented. Contrary to the artificial transmission line (TL) assumption made in the conventional analytical models, the proposed model treats the DA as a discrete set of cells connected together, and hence considers propagation and mismatch between inter-cells. This approach provides designers with a much more accurate first sizing of the DA compared to conventional ways and, as a result, leads to a reduced design time and complexity. The model enables both quantitative and qualitative analysis of a DA, for the purpose of aiding the designers in predicting the relations between DA performance and its multi-design parameters, especially in the context of non-uniform designs. In addition, it is well suited to Computer-Automated Design (CAutoD), to help in achieving designs having a given set of performance goals. The validation of the model is demonstrated on two designs, by a comparison with simulations done in Keysight's ADS tool and using STMicroelectronics' 55-nm SiGe BiCMOS design kit. First design is inspired from an already published non-uniform DA design while second one proposes a 100-GHz bandwidth CMOS uniform DA with 8 dB of power gain, after using it in a CAutoD process.

Published
2020

18. Miniaturization of Transmission Lines: Meandered Slow-wave CPWs

Author

Tadeu Mota-Frutuoso, Emmanuel Pistono, Manuel J. Barragan, Christophe Gaquiere, Marc Margalef-Rovira, Philippe Ferrari, Loic Vincent, Abdelhalim A. Saadi, Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Centre Interuniversitaire de Micro-Electronique (CIME), Institut National Polytechnique de Grenoble (INPG), Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), Puissance - IEMN (PUISSANCE - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), This work has been funded by the European Union (ECSEL JU GA 737454: TowARds Advanced BiCMOS NanoTechnology platforms for RF applicatiOns -Taranto), and the General Directorate for Enterprises (DGE) in France., European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), and Reliable RF and Mixed-signal Systems (RMS )

Subjects
010302 applied physics, Materials science, business.industry, CPW, 020206 networking & telecommunications, Ranging, transmission line, 02 engineering and technology, Dielectric, 01 natural sciences, Microstrip, Electric power transmission, CMOS, Transmission line, Q factor, PACS 85.42, 0103 physical sciences, mm-wave, 0202 electrical engineering, electronic engineering, information engineering, Miniaturization, Optoelectronics, slow-wave, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business
Abstract

International audience; This work presents novel transmission line structures based on Meandered Slow-wave CoPlanar Waveguides (MS-CPWs), aiming to achieve high miniaturization. As a proof-of-concept, these two kinds of transmission lines were designed and fabricated in the AMS 0.35 mu m CMOS technology together with classical straight and meandered microstrip lines. Measurement results from 70 kHz to 100 GHz of the fabricated transmission lines are presented. At 80 GHz, all the considered transmission lines present similar quality factors, ranging between 10 and 14. On the other hand, at this frequency, one of the developed MS-CPW presents an effective dielectric constant of 88, while the meandered microstrip exhibits an equivalent effective dielectric constant of 51, thus leading to higher compactness for the MS-CPW.

Published
2020

19. Analog and mixed-signal circuits simulation for product level EMMI analysis

Author

Paul Armagnat, Tommaso Melis, Etienne Auvray, Emmanuel Simeu, STMicroelectronics [Grenoble] (ST-GRENOBLE), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and BEN TITO, Laurence

Subjects
Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 02 engineering and technology, Fault (power engineering), 01 natural sciences, law.invention, law, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Safety, Risk, Reliability and Quality, ComputingMilieux_MISCELLANEOUS, Electronic circuit, 010302 applied physics, 020208 electrical & electronic engineering, Transistor, Process (computing), Mixed-signal integrated circuit, Replicate, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, PACS 8542, Product (mathematics), PACS 85.42, Mixed signal simulation
Abstract

International audience; The goal of this work is to propose a new flow that integrates the analog and mixed signal simulation of the circuits to replicate the EMMI signals. This supports the fault localization process. We explore the emission typologies of the transistors, focusing the attention on the DMOS structure. First experimental results show the benefits of this approach.

Published
2020

20. Study of Inter-Power Domain Failures during a CDM Event

Author

Troussier, Chloé, Bourgeat, Johan, Simeu, Emmanuel, Arnould, Jean-Daniel, Jimenez, J., Jacquier, B., STMicroelectronics [Crolles] (ST-CROLLES), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA)

Subjects
PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2020

21. Design of mm-wave Reflection-Type Phase Shifters with Oscillation-Based Test capabilities

Author

Margalef-Rovira, Marc, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Université Grenoble Alpes [2020-....], Philippe Ferrari, Emmanuel Pistono, Christophe Gaquière, and Manuel Barragán Asian

Subjects
Coupleur, Technologie BiCMOS, Phase shifter, Varactor, Mm-Wave, BiCMOS technology, Coupler, Déphaseur, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Obt, Bande millimétrique
Abstract

This work focuses on the design of on-silicon mm-wave Reflection-Type Phase Shifters (RTPS) with Oscillation-Based Test (OBT) capabilities. For more consistency, a single technology was considered, the STM 55-nm BiCMOS. First, the theory and practical implementations of 3-dB couplers is discussed. Particular attention is brought to the Coupled Slow-wave CoPlanar Waveguide (CS-CPW) topology, due to its good performance. Using this topology, the measurements of two 3-dB couplers are reported: (i) a 120-GHz, and (ii) a 185-GHz coupler.Next, the existing topologies of integrated varactors are discussed. Measurement results are reported for an Inversion-mode MOS (I-MOS) varactor from 1 up to 325 GHz. Additionally, the Common-Source MOS (CS-MOS) varactor architecture is proposed and measurement results from 1 to 145 GHz for this architecture are reported.Then, the theory of RTPS is presented and CS-CPW-based couplers together with Accumulation-mode MOS (A-MOS), I-MOS and CS-MOS varactors are used for the design of four RTPS. The measurement and simulation results of these RTPS, with central frequencies ranging from 60 to 200 GHz, are presented.Subsequently, the theory and measurement results of the OBT on an integrated 60-GHz RTPS are discussed.Finally, a mm-wave TRL calibration compaction technique is described using machine-learning tools.; Ce travail porte sur la conception de déphaseurs de type réflectif (RTPS) sur silicium à ondes millimétriques avec des moyens de test basé sur l'oscillation (OBT). Pour plus de cohérence, une seule technologie a été utilisée, la BiCMOS STM 55 nm. Tout d'abord, la théorie et les mises en œuvre pratiques des coupleurs 3-dB sont discutées. Une attention particulière est portée à la topologie du guide d'onde coplanaire couplé à ondes lentes (CS-CPW), en raison de ses bonnes performances. En utilisant cette topologie, les mesures de deux coupleurs 3-dB sont rapportées : (i) un coupleur de 120 GHz, et (ii) un coupleur de 185 GHz.Ensuite, les topologies existantes des varactors intégrés sont discutées. Les résultats des mesures sont présentés pour un varactor MOS en mode inversion (I-MOS) de 1 à 325 GHz. En outre, l'architecture de varactor MOS de source commune (CS-MOS) est proposée et les résultats des mesures de 1 à 145 GHz pour cette architecture sont présentés.Puis, la théorie des RTPS est présentée et les coupleurs basés sur CS-CPW ainsi que les varactors MOS en mode d'accumulation (A-MOS), I-MOS et CS-MOS sont utilisés pour la conception de quatre RTPS. Les résultats des mesures et des simulations de ces RTPS, avec des fréquences centrales allant de 60 à 200 GHz, sont présentés.Ensuite, la théorie et les résultats des mesures de l'OBT sur un RTPS intégré de 60 GHz sont discutés.Enfin, une technique de compactage du calibrage TRL des ondes millimétriques est décrite à l'aide d'outils d'apprentissage sur machine.

Published
2020

22. Conception de déphaseurs de type réflectif millimétriques avec des moyens de test basé sur l’oscillation

Author

Margalef-Rovira, Marc, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Université Grenoble Alpes [2020-....], Philippe Ferrari, Emmanuel Pistono, Christophe Gaquière, Manuel Barragán Asian, and STAR, ABES

Subjects
Coupleur, Technologie BiCMOS, Phase shifter, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Varactor, Mm-Wave, BiCMOS technology, Coupler, Déphaseur, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Obt, Bande millimétrique
Abstract

This work focuses on the design of on-silicon mm-wave Reflection-Type Phase Shifters (RTPS) with Oscillation-Based Test (OBT) capabilities. For more consistency, a single technology was considered, the STM 55-nm BiCMOS. First, the theory and practical implementations of 3-dB couplers is discussed. Particular attention is brought to the Coupled Slow-wave CoPlanar Waveguide (CS-CPW) topology, due to its good performance. Using this topology, the measurements of two 3-dB couplers are reported: (i) a 120-GHz, and (ii) a 185-GHz coupler.Next, the existing topologies of integrated varactors are discussed. Measurement results are reported for an Inversion-mode MOS (I-MOS) varactor from 1 up to 325 GHz. Additionally, the Common-Source MOS (CS-MOS) varactor architecture is proposed and measurement results from 1 to 145 GHz for this architecture are reported.Then, the theory of RTPS is presented and CS-CPW-based couplers together with Accumulation-mode MOS (A-MOS), I-MOS and CS-MOS varactors are used for the design of four RTPS. The measurement and simulation results of these RTPS, with central frequencies ranging from 60 to 200 GHz, are presented.Subsequently, the theory and measurement results of the OBT on an integrated 60-GHz RTPS are discussed.Finally, a mm-wave TRL calibration compaction technique is described using machine-learning tools., Ce travail porte sur la conception de déphaseurs de type réflectif (RTPS) sur silicium à ondes millimétriques avec des moyens de test basé sur l'oscillation (OBT). Pour plus de cohérence, une seule technologie a été utilisée, la BiCMOS STM 55 nm. Tout d'abord, la théorie et les mises en œuvre pratiques des coupleurs 3-dB sont discutées. Une attention particulière est portée à la topologie du guide d'onde coplanaire couplé à ondes lentes (CS-CPW), en raison de ses bonnes performances. En utilisant cette topologie, les mesures de deux coupleurs 3-dB sont rapportées : (i) un coupleur de 120 GHz, et (ii) un coupleur de 185 GHz.Ensuite, les topologies existantes des varactors intégrés sont discutées. Les résultats des mesures sont présentés pour un varactor MOS en mode inversion (I-MOS) de 1 à 325 GHz. En outre, l'architecture de varactor MOS de source commune (CS-MOS) est proposée et les résultats des mesures de 1 à 145 GHz pour cette architecture sont présentés.Puis, la théorie des RTPS est présentée et les coupleurs basés sur CS-CPW ainsi que les varactors MOS en mode d'accumulation (A-MOS), I-MOS et CS-MOS sont utilisés pour la conception de quatre RTPS. Les résultats des mesures et des simulations de ces RTPS, avec des fréquences centrales allant de 60 à 200 GHz, sont présentés.Ensuite, la théorie et les résultats des mesures de l'OBT sur un RTPS intégré de 60 GHz sont discutés.Enfin, une technique de compactage du calibrage TRL des ondes millimétriques est décrite à l'aide d'outils d'apprentissage sur machine.

Published
2020

23. A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System

Author

Michele Portolan, Ghislain Takam Tchendjou, Vincent Reynaud, Salvador Mir, Paolo Maistri, Emmanuel Simeu, Manuel J. Barragan, Regis Leveugle, Kalpana Senthamarai Kannan, Lorena Anghel, Renato S. Feitoza, Architectures and Methods for Resilient Systems (TIMA-AMfoRS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Reliable RF and Mixed-signal Systems (TIMA-RMS), SPINtronique et TEchnologie des Composants (SPINTEC), Centre National de la Recherche Scientifique (CNRS)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), Architectures and Methods for Resilient Systems (AMfoRS ), and Reliable RF and Mixed-signal Systems (RMS )

Subjects
010302 applied physics, Authentication, business.industry, Computer science, circuit-aging, Circuit Aging, Mixed signal testing, Embedded Test Instruments, Mixed-signal integrated circuit, 02 engineering and technology, ADCs, 01 natural sciences, automated test environment, 020202 computer hardware & architecture, Secure Access, Software, End-to-end principle, Embedded system, mixed-signal testing, Automated Test Environments, PACS 85.42, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business
Abstract

International audience; The disruptive potential of the IEEE 1687 standard does not come from a single innovation, but rather from its capacity of providing a unified framework where heterogeneous approaches can co-exist and interact. In this Special Session, we will present the complementary research activities performed in the TIMA laboratory covering different aspects of the standard (Mixed-Signal instrument testing, Embedded Aging Monitors and Test Access Securization), and their coordination thanks to the Manager-for SoC Test (MAST) software environment.

Published
2020

24. Automatic Fault Simulators for Diagnosis of Analog Systems

Author

Etienne Auvray, Emmanuel Simeu, Tommaso Melis, STMicroelectronics [Grenoble] (ST-GRENOBLE), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and BEN TITO, Laurence

Subjects
analog circuits, Speedup, Computer science, diagnosis, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, fault isolation, Fault (power engineering), Fault detection and isolation, 03 medical and health sciences, 0302 clinical medicine, Software, 0202 electrical engineering, electronic engineering, information engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, fault simulation, ComputingMilieux_MISCELLANEOUS, Electronic circuit, Analogue electronics, business.industry, 020208 electrical & electronic engineering, Process (computing), Mixed-signal integrated circuit, mixed-signal circuits, failure analysis, PACS 85.42, business, 030217 neurology & neurosurgery, Computer hardware
Abstract

The failure analysis in analog and mixed signal products is mainly based on measurements performed in the laboratory without any simulation support. The fault simulators for analog circuits are starting to be available but are not designed for these needs. This work describes the integration of the simulation into the normal failure analysis flow using test software developed for analog fault simulation. We propose an innovative iterative flow for diagnosis of analog IPs and products. The results show how inserting such tools in the fault isolation step, we speed up the whole analysis process, allowing the diagnosis for analog and mixed-signal circuits

Published
2020

25. mm-Wave Through-Load Switch for in-situ Vector Network Analyzer on a 55-nm BiCMOS Technology

Author

Christophe Gaquiere, Abdelhalim A. Saadi, Philippe Ferrari, Manuel J. Barragan, Sylvain Bourdel, Emmanuel Pistono, Marc Margalef-Rovira, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Puissance - IEMN (PUISSANCE - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), Reliable RF and Mixed-signal Systems (TIMA-RMS), and Laboratoire commun STMicroelectronics-IEMN T1

Subjects
Materials science, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, 7. Clean energy, law.invention, law, 3-dB slow-wave coupler, in-situ reflectometer, mm-wave, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, Insertion loss, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, NMOS logic, Load control switch, business.industry, 020208 electrical & electronic engineering, Bandwidth (signal processing), Transistor, 020206 networking & telecommunications, Biasing, switch, PACS 85.42, Power dividers and directional couplers, Optoelectronics, business, on-wafer calibration, Voltage
Abstract

International audience; In this paper, an innovative millimeter-wave (mm-wave) through-load switch for in-situ reflectometers and on-wafer calibration is proposed. This two-port device can switch between two states: (i) a through connection or (ii) a 50 Ω load for both of its ports. The through-load switch is composed of a 3-dB directional coupler and two nMOS transistors controlled through a biasing voltage applied to their gate. Measurement results of a 120-GHz 3-dB directional coupler are provided up to 145 GHz together with EM simulations and circuit-level simulations up to 220 GHz of the through-load switch. A wide bandwidth is obtained, from 73 GHz to 179 GHz, with limited insertion loss of 2 dB.

Published
2020

26. Static linearity BIST for Vcm-based switching SAR ADCs using a reduced-code measurement technique

Author

Antonio Gines, Renato S. Feitoza, Manuel J. Barragan, Salvador Mir, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo, Reliable RF and Mixed-signal Systems (TIMA-RMS), and Universidad de Sevilla / University of Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC)

Subjects
Computer science, Transistor, Linearity, Successive approximation ADC, Topology (electrical circuits), 02 engineering and technology, Converters, 020202 computer hardware & architecture, law.invention, Linearity test, law, PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Code (cryptography), Hardware_INTEGRATEDCIRCUITS, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Linearity testing
Abstract

International audience; This work presents a reduced-code strategy for the static linearity self-testing of Vcm-based successive-approximation analog to digital converters (SAR ADCs). These techniques take advantage of the repetitive operation of SAR ADCs for reducing the number of necessary measurements for static linearity testing. In this paper we discuss the application of these techniques for the Vcm-based SAR ADC topology and present a practical BIST implementation based on an embedded incremental ADC. Electrical simulation results at transistor level are presented to validate the feasibility of the proposed on-chip reduced-code static linearity test.

Published
2020

27. Highly tunable high-Q inversion-mode MOS varactor in the 1-325-GHz band

Author

Abdelhalim A. Saadi, Manuel J. Barragan, Sylvain Bourdel, Christophe Gaquiere, Emmanuel Pistono, Cedric Durand, Marc Margalef-Rovira, Philippe Ferrari, Daniel Gloria, Loic Vincent, Sylvie Lepilliet, Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Centre Interuniversitaire de Micro-Electronique (CIME), Institut National Polytechnique de Grenoble (INPG), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Puissance - IEMN (PUISSANCE - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), STMicroelectronics [Crolles] (ST-CROLLES), 0.13039/501100011688-European Union through Toward Advanced BiCMOS NanoTechnology Platforms for RF Applications, Taranto (Grant Number: ECSEL JU GA 737454), PCMP CHOP, Laboratoire commun STMicroelectronics-IEMN T1, European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), and Reliable RF and Mixed-signal Systems (RMS )

Subjects
010302 applied physics, Materials science, business.industry, Electrical model, Semiconductor device modeling, 01 natural sciences, Capacitance, Bicmos technology, Electronic, Optical and Magnetic Materials, PACS 8542, CMOS, Logic gate, Q factor, 0103 physical sciences, Optoelectronics, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, Varicap
Abstract

This article presents the design, experimental results, and modeling of an inversion-mode CMOS varactor integrated in the STMicroelectronics 55-nm BiCMOS technology. The device was characterized from 1 to 325 GHz, demonstrating high-quality factor at millimeter-waves. For instance, a quality factor of 7 at around 190 GHz for a tuning ratio ( ${C}_{\text {max}}/{C}_{\text {min}}$ ) greater than 4 was measured. This performance overpasses that of accumulation-mode varactors usually provided in CMOS technologies design kits, for frequencies beyond about 100 GHz. In addition, a small-signal electrical model is provided from 100 to 250 GHz.

Published
2020

28. On-chip reduced-code static linearity test of Vcm -based switching SAR ADCs using an incremental analog-to-digital converter

Author

Renato S. Feitoza, Antonio Gines, Manuel J. Barragan, Salvador Mir, Reliable RF and Mixed-signal Systems (TIMA-RMS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla / University of Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo, Reliable RF and Mixed-signal Systems (RMS ), and Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC)

Subjects
Computer science, 020208 electrical & electronic engineering, Analog-to-digital converter, Successive approximation ADC, Topology (electrical circuits), 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Converters, 020202 computer hardware & architecture, law.invention, Linearity test, law, PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Code (cryptography), Hardware_INTEGRATEDCIRCUITS, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Abstract

International audience; This paper describes a BIST technique for the static linearity test of $V_{cm}$ -based successive-approximation analog-to-digital converters (SAR ADCs). We discuss the application of reduced-code techniques for the $V_{cm}$ -based SAR ADC topology and present a practical on-chip implementation based on an embedded incremental ADC. Simulation results are provided for validating the feasibility and performance of the proposed on-chip reduced-code static linearity test.

Published
2020

29. Parametric faults detection and concealment on imager with FPGA implementation

Author

Ghislain Takam Tchendjou, Emmanuel Simeu, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and BEN TITO, Laurence

Subjects
Computational complexity theory, Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION, image quality assessment, parametric fault, 02 engineering and technology, 01 natural sciences, 010309 optics, Computer Science::Multimedia, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Median filter, Computer vision, Image sensor, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Field-programmable gate array, Parametric statistics, Block (data storage), defective pixel self-healing, image sensor, Pixel, business.industry, 020206 networking & telecommunications, Peak signal-to-noise ratio, FPGA implementation, Computer Science::Computer Vision and Pattern Recognition, PACS 85.42, Artificial intelligence, business
Abstract

International audience; This paper presents an online and integrated solution for self-healing of parametric faults on an image sensor. This self-healing is based on the detection and concealment of the parametric faults in the image sensor. Three detection methods are considered. The first one is based on the distance between the pixel under test and its neighboring pixels, the second method is based on the median of the block of pixels around the pixel under test, and the third method is based on the local dispersion parameters in the image. The concealment method is based on the median filter, which consists of the substitution of the defective value by the median value of the pixel block. The metrics used for comparison of the experimental results are phi-coefficient, peak signal to noise ratio (PSNR) and a full reference image quality assessment method based on machine learning techniques (FrIQA). The detection and concealment processes are implemented on an FPGA platform to evaluate the computational complexity and to confirm the feasibility of integrating the proposed solutions in an image sensor.

Published
2020

30. Design of mm-wave slow-wave coupled coplanar waveguides

Author

Manuel J. Barragan, Sylvain Bourdel, Sylvie Lepilliet, Marc Margalef-Rovira, Jose Lugo-Alvarez, Florence Podevin, Emmanuel Pistono, Loic Vincent, Christophe Gaquiere, Alfredo Bautista, Abdelhalim A. Saadi, Philippe Ferrari, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Advanced Silicon S.A. (AS), Centre Interuniversitaire de Micro-Electronique (CIME), Institut National Polytechnique de Grenoble (INPG), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab ), Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Université Grenoble Alpes (UGA), Puissance - IEMN (PUISSANCE - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), PCMP CHOP, European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), Reliable RF and Mixed-signal Systems (TIMA-RMS), and Laboratoire commun STMicroelectronics-IEMN T1

Subjects
coupling coefficient, Semiconductor device modeling, CMOS/BiCMOS technology, 02 engineering and technology, STRIPS, BiCMOS, Microstrip, law.invention, Optics, slow-wave concept, law, 0202 electrical engineering, electronic engineering, information engineering, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Physics, Radiation, business.industry, Coplanar waveguide, 020206 networking & telecommunications, Condensed Matter Physics, PACS 8542, CMOS, Power dividers and directional couplers, business, Coupling coefficient of resonators, directional couplers
Abstract

International audience; This paper focuses on the design of high-performance Coupled Slow-wave CoPlanar Waveguide (CS-CPW) in CMOS technologies for the mm-wave frequency bands. First, the theory as well as the electrical model of the CS-CPW are presented. Next, the analytical approach for the calculation of the model parameters is discussed. Then, by using the developed model, two millimeter-wave backward directional 3-dB couplers are designed in a Bipolar Complementary-Metal-Oxide-Semiconductor (BiCMOS) 55-nm technology for 120 and 185-GHz operation, respectively. Simulation and experimental results demonstrate that the use of the CS-CPW concept leads to state-of-the-art performance, with a good agreement between the analytical model, electromagnetic simulations and measurement results.

Published
2020

31. Local energy self-sufficiency for passive buildings: Case study of a typical Moroccan building

Author

Emmanuel Simeu, Mohamed Tabaa, Fouad Moutaouakkil, Badr Chegari, Hicham Medromi, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Ecole Marocaine des Sciences de l'Ingénieur (EMSI), Ecole Nationale Supérieure d'Electricité et de Mécanique [Casablanca] (ENSEM), and Université Hassan II [Casablanca] (UH2MC)

Subjects
0211 other engineering and technologies, 02 engineering and technology, TRNSYS, 7. Clean energy, 11. Sustainability, 021105 building & construction, Architecture, 021108 energy, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Safety, Risk, Reliability and Quality, Baseline (configuration management), Tertiary sector of the economy, Civil and Structural Engineering, business.industry, Photovoltaic system, Building and Construction, Environmental economics, Renewable energy, PACS 8542, 13. Climate action, Mechanics of Materials, Environmental science, Electricity, business, Energy source, Self-sufficiency
Abstract

International audience; The building sector in Morocco represents about 25% of the country's total energy consumption, including 18% for the residential sector and 7% for the service sector. The integration of renewable energies in the building sector is the subject of a major trend in terms of future projects in Morocco. Today, Morocco is targeting a strategy that will allow it to achieve 50% of its electricity consumption from a renewable, new and clean local energy source. Through this current situation, this article has just made a positive contribution, by studying the impact of the passive part of a typical Moroccan R+1 building, in particular that of thermal insulation, on its energy self-sufficiency in different climates. TRNSYS simulation studio was used to design and develop a platform to calculate this objective in a global and specific way. This platform combines a whole hybrid system, based on two new and clean renewable energy sources (wind turbine and photovoltaic energy), to the building's thermal loads. The results show that the impact of thermal insulation on the building's energy self-sufficiency in all the studied climates is very significant, especially in Ifrane city (Morocco). Given that the energy self-sufficiency in this climate has been improved by 41.28% more than the baseline situation. Finally, we suggest that the Moroccan building thermal code should include the impact of the passive part of the building on its energy self-sufficiency in the form of numerical indicators, in order to encourage people to get involved in this development.

Published
2020

32. Discrete Wavelet Packet Transform-Based Industrial Digital Wireless Communication Systems

Author

Abbas Dandache, Mouhamad Chehaitly, Fabrice Monteiro, Safa Saadaoui, Mohamed Tabaa, Laboratoire Pluridisciplinaire de Recherche et Innovation (LPRI), Ecole Marocaine des Sciences de l'Ingénieur (EMSI), Laboratoire de Génie Informatique, de Production et de Maintenance (LGIPM), Université de Lorraine (UL), Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)

Subjects
Discrete wavelet transform, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Computer science, channel coding, Real-time computing, Big data, 02 engineering and technology, symbols.namesake, Robustness (computer science), 0202 electrical engineering, electronic engineering, information engineering, Fading, industrial internet of things (IIoT), Architecture, industrial channel model, lcsh:T58.5-58.64, business.industry, lcsh:Information technology, 020208 electrical & electronic engineering, 020206 networking & telecommunications, Thresholding, [SPI.TRON]Engineering Sciences [physics]/Electronics, thresholding receiver, discrete wavelet packet transform (DWPT), Gaussian noise, industrial wireless sensor network (IWSN), symbols, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, business, Wireless sensor network, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, Information Systems
Abstract

International audience; The industrial internet of things (IIoT) known as industry 4.0, is the use of internet of things technologies, via the Wireless Sensor Network (WSN), to enhance manufacturing and industrial processes. It incorporates machine learning and big data technologies, to allow machine-to-machine communication that have existed for years in the industrial world. Therefore, it is necessary to propose a robust and functional communication architecture that is based on WSNs, inside factories, in order to show the great interest in the connectivity of things in the industrial environment. In such environment, propagation differs from other conventional indoor mediums, in its large dimensions, and the nature of objects and obstacles inside. Thus, the industrial medium is modeled as a fading channel affected by an impulsive and Gaussian noise. The objective of this paper is to improve robustness and performances of multi-user WSN architecture, based on Discrete Wavelet Transform, under an industrial environment using conventional channel coding and an optimal thresholding receiver.

Published
2019
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33. Fully-differential 4 V-output range 14.5-ENOB step-wise ramp stimulus generator for on-chip static linearity test of ADCs

Author

Guillaume Renaud, Mamadou Diallo, Manuel J. Barragan, Salvador Mir, Reliable RF and Mixed-signal Systems (RMS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)

Subjects
analog, Computer science, Linearity, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Capacitance, 020202 computer hardware & architecture, law.invention, Effective number of bits, Capacitor, PACS 8542, CMOS, Integral nonlinearity, Hardware and Architecture, Control theory, law, Integrator, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Ramp generator, ComputingMilieux_MISCELLANEOUS, Software
Abstract

This paper presents an on-chip stepwise ramp stimulus generator aimed at static linearity test applications for analog-to-digital converters (ADCs). The proposed ramp stimulus generator is based on a simple switched-capacitor integrator with a constant dc input. The integrator has been conveniently modified to produce a very small integration gain proportional to the capacitance difference of two capacitors, in such a way that the resulting stepwise ramp signal at the output has a step size below the least significant bit (LSB) of the target ADC under test. In order to verify the feasibility of the proposed ramp generation technique, this paper details the design and experimental characterization of a proof-of-concept stepwise ramp generator in a 65-nm CMOS technology. Experimental results on 15 fabricated samples show an average linearity of 14.5 effective bits in a differential output range of ±2 V. Moreover, a discrete-time static linearity measurement strategy is proposed and, as a proof-of-concept validation, it is verified on an off-the-shelf 11-bit ADC using the fabricated generator samples. Experimental results show an accuracy of ±0.3 LSB in the measurement of the integral nonlinearity of the ADC under test.

Published
2019

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