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Low-frequency (LF) noise measurements are compared for Schottky-gate AlGaN/GaN heterostructure planar and fin field-effect transistors (FinFETs) as functions of gate voltage and measuring temperature. The noise of each device type is consistent with a carrier number fluctuation model. Similar effective defect-energy Eo distributions are derived for each of the two device architectures from measurements of excess drain-voltage noise-power spectral density vs temperature from 80 to 380 K. Defect- and/or impurity-related peaks are observed in the inferred energy distributions for Eo < 0.2 eV, Eo ≈ 0.45 eV, and Eo > 0.6 eV. Significant contributions to the LF noise are inferred for nitrogen vacancies and ON and FeGa impurity complexes. Ga dangling bonds at fin interfaces with gate metal are likely candidates for enhanced noise observed in FinFETs, relative to planar devices. Reducing the concentrations of these defects and impurity complexes should reduce the LF noise and enhance the performance, reliability, and radiation tolerance of GaN-based high electron mobility transistors. [ABSTRACT FROM AUTHOR]

Grain sizes, impurities, and layer thicknesses in the nm-range affect the heat transport and, hence, hinder proper heat dissipation of GaN-based devices. To obtain a clear picture of heat dissipation, the mechanisms of heat transport must be linked to the structural properties of the nitride-based materials in the device. In this paper, a systematic investigation of the typical layers of GaN high-electron mobility transistor stacks was conducted by time-domain thermoreflectance analysis and Raman measurements. The analyzed layers are the AlN nucleation layer, the Al0.3Ga0.7N transition layer, the AlGaN/AlN superlattice, the C-doped GaN back-barrier, and the uid GaN layer. The results were interpreted using the Born–van Karman model, including the suppression function approach to describe the governing heat transport mechanisms. Investigation of this AlN nucleation layer showed that its phonon scattering is dominated by impurity and grain boundary scattering. The Al0.3Ga0.7N transition layer was shown to have a reduced thermal conductivity not only due to alloy scattering but also because of grain boundary scattering. The AlGaN/AlN superlattice showed a thermal conductivity lower than the Al0.3Ga0.7N transition layer, especially at higher temperatures (7.2 ± 0.2 W/mK vs 14.1 ± 0.4 W/mK at 300 °C). Caused by the enhanced AlGaN/AlN interface density, the thermal conductance was found to be 2 GW/m2 K. The AlGaN/AlN superlattice indicated an anisotropic thermal transport with a factor of ∼1.5. The C-doped GaN layers were analyzed in terms of their size-dictated thermal conductivity, resulting in a reduction of ∼66% from 1 μm to 250 nm at 30 °C. Raman spectroscopy revealed that the thicker the GaN layer, the higher the compressive stress in GaN, which additionally results in a higher thermal transport. The investigations of the heat transport depending on the structural properties enabled an accurate determination of the thermal conductivity of the layer stack. These thermal conductivities served as input parameters for 3D simulation to extract the temperature, in terms of the thermal resistance, of such high-electron mobility transistor stacks. This simulation shows the importance of the GaN layer in terms of thermal management. This work uncovers the thermal transport in GaN-based transistor stacks with the aim to improving the thermal design. [ABSTRACT FROM AUTHOR]

Herein, we report epitaxial growth of p-type Ni doped gallium chromium oxide thin film on Al2O3 substrates and studied its band alignment properties with that of the substrate. Thin films are grown using the magnetron-sputtering technique. Synchrotron-based XRD measurements, performed in the coplanar and non-coplanar geometries, confirm high-quality single domain epitaxial growth of p-type α-GaCrO3:Ni. Pendellosung oscillations around the Bragg peak and transmission electron microscopy reveal the high interfacial quality of p-type α-GaCrO3:Ni films with the substrate. Thin film, thickness ∼200 nm, shows around 70% average transmission. The values of valence band and conduction band offsets are determined to be 2.79 ± 0.2 and 0.51 ± 0.2 eV, respectively, which confirm straddling gap band alignment at the heterojunction. This type of alignment creates a threshold barrier for the selective charge carriers and is useful in enhancing the performance of a wide range of devices, including UV photodetectors, metal oxide semiconductor high electron mobility transistors, and light emitters. [ABSTRACT FROM AUTHOR]

Electronic devices get smaller and smaller in every generation. In micro-/nano-electronic devices such as high electron mobility transistors, heat dissipation has become a crucial design consideration due to the ultrahigh heat flux that has a negative effect on devices' performance and their lifetime. Therefore, thermal transport performance enhancement is required to adapt to the device size reduction. β-Ga2O3 has recently gained significant scientific interest for future power devices because of its inherent material properties such as extremely wide bandgap, outstanding Baliga's figure of merit, large critical electric field, etc. This work aims to use a machine learning approach to search promising substrates or heat sinks for cooling β-Ga2O3, in terms of high interfacial thermal conductance (ITC), from large-scale potential structures taken from existing material databases. With the ITC dataset of 1633 various substrates for β-Ga2O3 calculated by full density functional theory, we trained our recently developed convolutional neural network (CNN) model that utilizes the fused orbital field matrix (OFM) and composition descriptors. Our model proved to be superior in performance to traditional machine learning algorithms such as random forest and gradient boosting. We then deployed the CNN model to predict the ITC of 32 716 structures in contact with β-Ga2O3. The CNN model predicted the top 20 cubic and noncubic substrates with ITC on the same level as density functional theory (DFT) results on β-Ga2O3/YN and β-Ga2O3/MgO interfaces, which has the highest ITC of 1224 and 1211 MW/m2K, respectively, among the DFT-ITC datasets. Phonon density of states, group velocity, and scattering effect on high heat flux transport and consequently increased ITC are also investigated. Moderate to high phonon density of states overlap, high group velocity, and low phonon scattering are required to achieve high ITC. We also found three Magpie descriptors with strong Pearson correlation with ITC, namely, mean atomic number, mean atomic weight, and mean ground state volume per atom. Calculations of such descriptors are computationally efficient, and therefore, these descriptors provide a new route for quickly screening potential substrates from large-scale material pools for high-performance interfacial thermal management of high-electron mobility transistor devices. [ABSTRACT FROM AUTHOR]

This paper provides a comprehensive study of the impact of the gate recess depth (RD) on the GaN-on-Si MOS-HEMTs DC performances. IDS = f(VGS) and IDS = f(VDS) measurements are conducted at 25 and 150 °C, respectively, in forward and blocking modes. The gate recessed depth (50, 150, and 350 nm) is modulated by adjusting the plasma etching time, which is a critical step for improving the dielectric/GaN interface quality and the gate channel electron mobility. Three distinct regions can be defined separately: the bottom, the sidewall, and the corner region being the junction between the two previous regions. To assess the impact of gate recessed depth (RD) on the several mobilities around the gate cavity first, we applied our previous methodology allowing us to extract the bottom (μbot) and the entire sidewall region mobility (μT), without distinction from the corner. The mobility of the transverse region was found surprisingly to increase with deeper RD. To gain insight into the impact of the RD on this transverse section, a new extraction methodology is proposed to extract separately the gate corner (μcorner) and sidewall (μSW) mobility. These extractions show that the corner mobility is found to be reduced compared to the sidewall one (μcorner < μSW) evidencing the different weighting contributions over the transverse mobility. Moreover, these mobilities are found to be more degraded compared to the bottom one, highlighting the different contributions on the on-state resistance (RON). Indeed, the on-state resistance is lowered with the shallower RD due to the reduced sidewall resistance contribution (lower sidewall length) and despite the incremental contribution of the bottom resistance (larger effective gate length). However, the shallower RD shows an increase in the drain–source leakage current in reason of a lower gate electrostatic control. Technology Computer Aided Design (TCAD) simulations of the three RD morphologies are carried out to validate the experimental trends and the proposed methodology. [ABSTRACT FROM AUTHOR]

A novel bilateral impact-ionization-avalanche-transit-time (BIMPATT) diode based on AlGaN/GaN two-dimensional electron gas is proposed in this article. The BIMPATT is compatible with the available GaN high electron mobility transistor (HEMT) manufacturing process and has a shorter actual electron transit distance than existing HEMT-like IMPATT (HIMPATT) diodes. Compared with the same-sized HIMPATT, the optimum frequency of BIMPATT rises from 320 to 420 GHz and possesses a far wider operating frequency band, especially in the near 0.9 THz range. The maximum DC-RF conversion efficiency rises from 12.9% to 17.6%. The maximum RF power of BIMPATT is 3.18 W/mm, which is similar to 3.12 W/mm of the HIMPATT. Furthermore, our simulation demonstrated that the characteristics of BIMPATT are significantly affected by the length of anode and the thickness of the AlGaN barrier layer. The effects of ohmic contact resistance and background impurities on BIMPATT are also taken into account. This paper provides a reference for the design and characteristics enhancement of the lateral IMPATT devices. [ABSTRACT FROM AUTHOR]

We demonstrated the crystal growth of group-III arsenides (III-As) on GaN via an arsenidation layer and GaN-channel electron mobility transistors (HEMTs) with a regrowth InAs/GaAs source and drain (S/D) region. By annealing under an AsH3 atmosphere, the surface of a GaN (0001) template is arsenided. We grew ⟨ 111 ⟩ oriented InAs and GaAs on arsenided GaN. Silicon-doped n-type InAs with a carrier mobility of over 1500 cm2/V s and a carrier concentration of over 1 × 1019 cm−3 was successfully obtained. The fabrication process and direct-current characteristics of GaN-channel HEMTs with the regrown Si-doped InAs/GaAs S/D region were demonstrated for the first time. A maximum transconductance estimated from transfer characteristics was as high as ∼195 mS/mm for the HEMT with a gate length of 2 μm without passivation, which is comparable to those for the HEMT without any S/D regrowth. The impact of the InAs/GaAs S/D region on the on-resistance of the fabricated HEMTs was estimated to be ∼0.9 Ω mm, which can be reduced by optimizing the device structures and process conditions. These results indicate that the process of GaN arsenidation and III-As regrowth can be used without any device performance degradation. Therefore, further lowering the ohmic contact resistivity and on-resistance of GaN-channel HEMTs is possible by maturing the manufacturing-process technology of III-As-contained GaN-channel HEMTs. [ABSTRACT FROM AUTHOR]

In this paper, the p-GaN gate AlGaN/GaN high electron mobility transistors (HEMTs) with varying combinations of gate metal work function and gate geometry are fabricated and investigate the influence of gate leakage current (IGS) on the threshold voltage (VTH) and subthreshold swing (SS). The unique dependence of VTH and SS on gate geometry for different metals is observed, which is different from traditional field-effect transistors. A novel hybrid physics model, consisting of the traditional capacitance divider model and hole injection model, is proposed to explain this phenomenon, and the results exhibit an excellent agreement with the experimental data. The holes traverse the gate/p-GaN Schottky barrier by thermal emission or tunneling and inject into the p-GaN layer, generating the IGS. Expanding upon the traditional capacitance divider model, a portion of the injected holes accumulate at the p-GaN/AlGaN interface and induce the corresponding electrons at the AlGaN/GaN heterojunction, which promotes channel conduction. Hence, the transfer curves display the correlation between IGS and VTH as well as SS. The results show that high IGS can alleviate the instability of VTH caused by the lithographic overlay error, and simultaneously optimize SS. This work offers a novel perspective for examining the turn-on mechanism of p-GaN HEMTs, thereby contributing to device design. [ABSTRACT FROM AUTHOR]

Current–voltage characteristics and low-frequency (LF) noise of industrial-quality AlGaAs/InGaAs/GaAs pseudomorphic high-electron-mobility transistors are evaluated as a function of bias stress and temperature. A small positive shift of threshold voltage Vth and negligible degradation in peak transconductance GM are observed under ON-state bias conditions at elevated temperatures. The Vth measurements suggest activation of an acceptor-like defect or impurity center. The GM measurements demonstrate that newly activated defects are not located close enough to the two-dimensional electron gas to scatter carriers strongly. First-principles calculations and comparisons with previous work suggest that OAs impurity centers, other oxygen-related defects, isolated AsGa antisites, and dopant-based DX centers may contribute significantly to low-frequency (LF) noise in as-processed devices. LF noise is relatively unaffected by voltage stress at elevated temperatures, consistent with the small changes in Vth and peak GM. [ABSTRACT FROM AUTHOR]

Thermal issue has been regarded as one of the bottlenecks for GaN high-electron-mobility transistor (HEMT) performance and reliability, which highlights the importance of accurate thermal modeling. In the present work, we propose a GP (Gaussian process)-resistor–capacitor compact thermal model integrated with the ensemble Kalman filter (EnKF) to handle the nonlinear problems attributed to the temperature-dependent properties of GaN HEMTs under large-signal working conditions. The GP predictor is employed for the nonlinear correction term, with strong ability and extendibility to characterize various temperature-dependent relations resulting from different design configurations and materials. The model is identified via the EnKFs by inputting a sequence of channel temperature oscillations induced by imposing a large-signal continuous wave heating source to the device. Furthermore, an adaptation mode is devised for the in situ and timely update of the model parameters to adapt to the thermal variability of GaN devices, avoiding storing a large amount of historical data and repeated offline regressions. The validation of our modeling scheme is conducted through the case study on GaN-on-SiC HEMT's detailed 3D finite element method simulations. [ABSTRACT FROM AUTHOR]

We have analyzed and modeled the reverse-biased gate leakage current in a Schottky-gate AlGaN/GaN high electron mobility transistor. While the Poole–Frenkel emission current along conductive threading dislocations dominates at low negative gate bias, the trap-assisted tunneling of thermally energized electrons and the thermal emission of electrons from threading dislocations aided by dislocation-related states at multiple energy levels within the AlGaN bandgap are dominant at moderate to large reverse bias. Additionally, deep trap levels of high density localized near the gate/AlGaN interface cause significant leakage at 473 K at low to moderate reverse bias, which could be specific to the device we have analyzed. We extracted about 10 12 cm − 2 traps near the AlGaN/GaN interface from the difference of the barrier layer electric field profile obtained from the experimental high-frequency capacitance–gate voltage and the one needed for final matching. The thermionic- and the thermionic field-emission currents are considerably low; the latter, however, dominates in the defect-free case. Finally, the simulation framework we developed here helped us identify various conduction mechanisms contributing to the reverse-biased gate leakage and the density and electronic structure of the responsible defects. [ABSTRACT FROM AUTHOR]

Strain plays an important role in the performance and reliability of AlGaN/GaN high electron mobility transistors (HEMTs). However, the impact of strain on the performance of proton irradiated GaN HEMTs is yet unknown. In this study, we investigated the effects of strain relaxation on the properties of proton irradiated AlGaN/GaN HEMTs. Controlled strain relief is achieved locally using the substrate micro-trench technique. The strain relieved devices experienced a relatively smaller increase of strain after 5 MeV proton irradiation at a fluence of 5 × 1014 cm−2 compared to the non-strain relieved devices, i.e., the pristine devices. After proton irradiation, both pristine and strain relieved devices demonstrate a reduction of drain saturation current (Ids,sat), maximum transconductance (Gm), carrier density (ns), and mobility (μn). Depending on the bias conditions the pristine devices exhibit up to 32% reduction of Ids,sat, 38% reduction of Gm, 15% reduction of ns, and 48% reduction of μn values. In contrast, the strain relieved devices show only up to 13% reduction of Ids,sat, 11% reduction of Gm, 9% reduction of ns, and 30% reduction of μn values. In addition, the locally strain relieved devices show smaller positive shift of threshold voltage compared to the pristine devices after proton irradiation. The less detrimental impact of proton irradiation on the transport properties of strain relieved devices could be attributed to reduced point defect density producing lower trap center densities, and evolution of lower operation related stresses due to lower initial residual strain. [ABSTRACT FROM AUTHOR]

Al x Ga 1 − x N/GaN high-electron-mobility transistor (HEMT) structures are key components in electronic devices operating at gigahertz or higher frequencies. In order to optimize such HEMT structures, understanding their electronic response at high frequencies and room temperature is required. Here, we present a study of the room temperature free charge carrier properties of the two-dimensional electron gas (2DEG) in HEMT structures with varying Al content in the Al x Ga 1 − x N barrier layers between x = 0.07 and x = 0.42. We discuss and compare 2DEG sheet density, mobility, effective mass, sheet resistance, and scattering times, which are determined by theoretical calculations, contactless Hall effect, capacitance-voltage, Eddy current, and cavity-enhanced terahertz optical Hall effect (THz-OHE) measurements using a low-field permanent magnet (0.6 T). From our THz-OHE results, we observe that the measured mobility reduction from x = 0.13 to x = 0.42 is driven by the decrease in 2DEG scattering time, and not the change in effective mass. For x < 0.42 , the 2DEG effective mass is found to be larger than for electrons in bulk GaN, which in turn, contributes to a decrease in the principally achievable mobility. From our theoretical calculations, we find that values close to 0.3 m 0 can be explained by the combined effects of conduction band nonparabolicity, polarons, and hybridization of the electron wavefunction through penetration into the barrier layer. [ABSTRACT FROM AUTHOR]

The plasma instability of two-dimensional electron gas (2DEG) is a crucial physical mechanism for generating terahertz radiation in field-effect transistors, especially in high electron mobility transistors (HEMTs). In this paper, we have proposed a new semi-analytical and semi-numerical method to deal with oscillation problems of any nonuniform 2DEG plasma, especially considering the steady-state distribution, which can be calculated and analyzed more quickly than only using numerical calculation. By constructing a wave equation, using the auxiliary function and Wentzel–Kramers–Brillouin approximation method, the wave vector of the plasma wave is obtained. On this basis, combined with the Dyakonov–Shur instability's boundary conditions, the oscillation frequency, the wave amplitude increment, and their correction caused by the nonuniformity can be obtained by numerical calculation. Furthermore, the analytical solution is obtained under reasonable approximate conditions for the linear distribution of electron concentration. It is proved that the electron concentration gradient in the channel will not only attenuate the wave increment but also decrease the plasmonic frequency in the case of linear distribution. Moreover, we get the reasons for the above conclusions through theoretical derivation. We also investigate the effects of various device parameters on attenuation, such as gate length, electron mobility, and voltage, which may explain the difference between the actual and theoretical values in HEMTs and provide new guidance for device design. [ABSTRACT FROM AUTHOR]

ScN in the rock salt structure is a well-investigated material due to its desirable properties like the high hardness or large thermal conductivity. Recent computations by Adamski et al. [Appl. Phys. Lett. 115, 232103 (2019)] showed that ScN/GaN heterostructures exhibit an outstanding polarization gradient which would be beneficial for polarization induced electron gases. The pseudobinary semiconductor Sc x Al 1 − x N, when maintaining the cubic rock salt structure, could be beneficial for tailoring the polarization gradient using the Sc dependency of material properties. The structural properties of rs-Sc x Al 1 − x N are not fully discovered yet, thus in this work, DC-magnetron sputtered cubic rock salt Sc x Al 1 − x N thin films with 0.55 < x < 1.00 were grown and analyzed on ScN(111)/Si(111). The epitaxial relation of ScN(111) thin films on the Si(111) substrate is determined to be ScN[110] ∥ Si[100]. Furthermore, concentration dependent properties like the lattice parameter of Sc x Al 1 − x N were measured [a(ScN) = 4.50 Å, a(Sc0.55Al0.45N) = 4.30 Å] and the stress σ within the layers was determined. The crystal quality was evaluated using ω -scans, revealing FWHM = 1.14 ° for Sc0.95Al0.05N. The diameters of the columns were determined by atomic force microscopy and scanning electron microscopy and they are range from 34 to 59 nm for 0.55 < x < 1.00. At x = 0.55 , Sc x Al 1 − x N columns in the hexagonal wurtzite as well as cubic rock salt structure were detected. This information about the structural specifications of Sc x Al 1 − x N in the rock salt structure forms the basis for further investigations and experimental confirmation of the electric properties of ScN/GaN heterostructures or even a Sc x Al 1 − x N/GaN based approach for improved structures for high-electron-mobility transistors. [ABSTRACT FROM AUTHOR]

This work highlights the influence of surface properties, on the characteristics of InAlN/GaN based high electron mobility transistor (HEMT) structures grown on the SiC substrate by metalorganic vapor phase epitaxy. The growth parameters, i.e., reactor pressure and V/III ratio were tuned to improve the morphological and two-dimensional electron gas (2DEG) characteristics of the HEMT structure. It was found that V/III ratio plays a significant role in improving surface morphology and 2DEG properties without altering average indium composition. It was also found that 2DEG properties are highly sensitive to surface morphology and its features. The step flow smooth surface morphology with very low surface and interface roughness was observed in optimized lattice-matched InAlN/GaN HEMT structures. The sheet resistance of ∼170 Ω/sq with good 2DEG concentration (∼2.4 × 1013 cm−2) and 2DEG mobility (∼1500 cm2/V s) was achieved in the optimized lattice-matched InAlN/GaN HEMT structure. A comparison between different barrier-based HEMT structures, i.e., lattice-matched InAlN/GaN and strained AlGaN/GaN, was also discussed. Their structural, electrical, morphological, and interfacial characteristics were compared. [ABSTRACT FROM AUTHOR]

This study provides experimental evidence of charged interface states limited scattering in III-nitride heterostructures. Temperature-dependent Hall measurements and temperature-dependent ID–VG measurements indicate a significant influence of the charged interface states on the electron mobility in different AlGaN/GaN heterostructures where the characteristic of the interface is controlled by modulating the growth conditions. Charged interface states at the AlGaN/GaN heterointerface lead to electron scattering as the distance between the centroid of the two-dimensional electron gas and the interface decreases with increasing electron density. It is observed that a component of experimental Hall mobility, which ranges between 9.2 × 103 and 3.4 × 104 cm2/V s among the three samples, obtained after adding all the scattering events using Matthiessen's rule cannot be explained completely by considering all the conventional scattering mechanisms such as phonon–phonon scattering, interface roughness scattering, and dislocation density scattering. An in-depth analysis reveals a significant scattering of channel electrons by the charged states at the GaN/AlN/AlGaN interface. Furthermore, the estimated interface states from the temperature-dependent subthreshold slopes conducted on the fabricated high electron mobility transistors are in good agreement with the charged interface states extracted from the temperature-dependent Hall measurements. A good understanding on this new scattering mechanism in the GaN heterostructure may help in designing high-performance III-nitride devices in the future. [ABSTRACT FROM AUTHOR]

ABSTRACT Compared to silicon‐based complementary metal oxide semiconductor (CMOS), second‐generation semiconductor materials, such as gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT), offer significant advantages for radio frequency (RF) applications. As communication systems become more functional, designing highly integrated on‐chip transceiver systems presents a substantial challenge, where the voltage regulator as part of the power management module is indispensable. Due to lattice defects and other issues, achieving P‐channel metal oxide semiconductor (PMOS) in GaAs pHEMT is difficult, necessitating new circuit architectures to fulfill traditional linear regulator functions. To realize wireless fidelity (WiFi) transceiver systems on chip (SoC) using compound semiconductors for superior RF performance, this paper proposes a switchable linear regulator based on a 0.25 μm GaAs pHEMT process. The proposed linear regulator consumes a quiescent current of 440 μA in no‐load conditions and regulates a 5 V supply voltage down to 2.6 V output voltage. Measured results indicate that the designed linear regulator features a current load capacity of 20 mA, a load regulation rate of 5.8 mV/mA, and a line regulation rate of 1.8 mV/V. The proposed linear regulator circuit has been applied to WiFi transceiver systems, occupying a chip area of 0.054 mm2. [ABSTRACT FROM AUTHOR]

I-line stepper is widely used in large scale device manufacturing with limited achievable critical dimension by itself. With the aid of the spacer sidewall, the critical dimension can be further shrunk down. Spacer sidewall aided process necessitates an additional deposition-etching process, which inevitably results in process related damage under the gate. This paper proposes an optimized spacer sidewall aided gate patterning procedure for 0.15 μm GaN High Electron Mobility Transistors (HEMTs) fabrication. The process is proved to be effective in improving device performance compared to conventional sidewall process by keeping first Si-rich SiN passivation layer integrity at the gate edge. Interface trap density (Dit) and mobility were extracted for both conventional sidewall process and the optimized one with different passivation layers at the gate edge, demonstrating a lower Dit and higher mobility using the optimized process with enhanced device performances, such as higher current, breakdown voltage, and stress state characteristics, compared to the conventional process, which is promising for mass production of 0.15 μm GaN HEMTs. [ABSTRACT FROM AUTHOR]

This study presents a comprehensive investigation of the electrical properties of p-GaN gate HEMT devices under cryogenic operations, spanning a temperature range from 300 K all the way down to 10 K. We report achievement of a low sub-60 mV/dec sub-threshold swing (SS) (33.2 mV/dec at 10 K), a high ION/IOFF ratio (∼3.5 × 1010 at 10 K), and a remarkable I D , max (∼358 mA/mm at 10 K) in p-GaN gate HEMTs operating under cryogenic conditions. Furthermore, the mobility, threshold voltage shifts, and SS characteristics at cryogenic temperatures are modeled in p-GaN HEMTs. In summary, p-GaN gate HEMTs are promising for cryogenic applications due to their low SS, high gm,max, impressive ION/IOFF ratio, and substantial ID,max. Furthermore, the modeling achieved in this work can pave the way for future characteristic prediction in p-GaN HEMTs at cryogenic temperatures. [ABSTRACT FROM AUTHOR]

Quantum well AlGaN/AlN/GaN high electron mobility transistor (HEMT) devices are a unique kind of semiconductor device that make use of a heterostructure made up of layers of different materials. In this study, the operational characteristics and performance optimization of HEMT devices, with a specific emphasis on the behavior of three‐quantum‐well (3QW) HEMT devices, are explored. The impact of gate voltage is explored and is observed that higher gate voltages result in lower pinch‐off voltages and higher saturation drain currents. In these findings, valuable insights for optimizing circuit designs and ensuring dependable operation across a range of electronic applications are offered. In addition, In this study, the device's ability to detect changes in gate voltage and its nonlinear characteristics is emphasized, providing valuable information for improving the device's performance. Additionally, the benefits of HEMT devices with negative threshold voltages are explored. Devices utilizing AlGaN/AlN/GaN structures demonstrate exceptional performance characteristics, such as rapid switching capabilities, high energy efficiency, and low noise performance, making them well suited for a wide range of scientific and technological applications. Finally, when comparing a QW HEMT device at different drain bias conditions (Vd = 1 V and Vd = 5 V), noticeable variations suggesting improved performance with higher drain bias. [ABSTRACT FROM AUTHOR]

In this work, the DC performance and RF characteristics of GaN-based high-electron-mobility transistors (HEMTs) using the SiNx stress-engineered technique were systematically investigated. It was observed that a significant reduction in the peak electric field and an increase in the effective barrier thickness in the devices with compressive SiNx passivation contributed to the suppression of Fowler–Nordheim (FN) tunneling. As a result, the gate leakage decreased by more than an order of magnitude, and the breakdown voltage (BV) increased from 44 V to 84 V. Moreover, benefiting from enhanced gate control capability, the devices with compressive stress SiNx passivation showed improved peak transconductance from 315 mS/mm to 366 mS/mm, along with a higher cutoff frequency (ft) and maximum oscillation frequency (fmax) of 21.15 GHz and 35.66 GHz, respectively. Due to its enhanced frequency performance and improved pinch-off characteristics, the power performance of the devices with compressive stress SiNx passivation was markedly superior to that of the devices with stress-free SiNx passivation. These results confirm the substantial potential of the SiNx stress-engineered technique for high-frequency and high-output power applications, which are crucial for future communication systems. [ABSTRACT FROM AUTHOR]

Ultra-thin high-Al content barrier layers can enable improved gate control and high-frequency operation of AlGaN/GaN high electron mobility transistors (HEMTs) but the precise composition control is very challenging. In this work, we investigate the compositional profiles of AlxGa1−xN/GaN HEMT structures with targeted Al content in the barrier layer, x = 0.50, 0.70, and 1, and thickness in the sub-10 nm range in correlation with the two-dimensional electron gas (2DEG) properties. The HEMT structures are grown by metal-organic chemical vapor deposition on SiC. The maximum Al content in the barrier layer, experimentally determined by scanning transmission electron microscopy combined with energy-dispersive x-ray spectroscopy, is found to be lower than that intended and the deviations from the designed structures increase progressively with increasing x. Compositionally sharp interface between GaN and Al0.46Ga0.54N and box-like Al profile is achieved for intended x ∼ 0.50 while pronounced Al grading is found in the samples with intended x of 0.70 and 1, with a maximum Al content of 0.78 reached for the HEMT structure with intended AlN barrier layer. The impact of the experimentally determined Al profiles on the 2DEG properties, obtained by contactless and electrical Hall effect measurements and coupled with self-consistent solution of the Poisson–Schrödinger equation, is evaluated and discussed. It is shown that the observed deviations from the intended Al profiles have a negative effect on the 2DEG confinement and result in reduced mobility parameters, which have significant implications for the implementation of high-Al content AlGaN/GaN structures in high-frequency devices. [ABSTRACT FROM AUTHOR]

In this paper, a ∼2 nm in situ SiN cap layer on AlGaN barrier layer is grown, which is revealed to be crystalline using high-resolution cross-sectional transmission electron microscopy. Benefitting from superior interface quality of epitaxial crystalline SiN/AlGaN interface, the gate diodes with in situ SiN cap layer feature lower interface trap state density than that with GaN cap layer. By comparing the GaN high electron mobility transistors (HEMTs) with the conventional GaN cap layer, the GaN HEMTs with in situ SiN cap layer exhibit improved device performance, showing higher electron mobility, higher drain current, larger on/off current ratio, and higher transconductance. For breakdown characteristics, the devices with in situ crystalline SiN cap layer show prominent advantages over the GaN cap layer with a 30% breakdown voltage increase to 810 V. [ABSTRACT FROM AUTHOR]

The etching of p‐GaN requires extremely strict control over etching depth and morphology; otherwise, it will result in poor electrical characteristics. This work uses ALD(Atomic layer deposition) in situ N2 plasma and postanneal‐assisted passivation to effectively recover the electrical properties degraded by p‐GaN etching. Compared to unpassivated devices, this approach eliminates surface oxygen bonds, recovering drain current from 10 to 126 mA mm−1, reducing gate leakage by an order of magnitude, achieving an ON/OFF current ratio exceeding 108, a breakdown voltage of 930 V at 1 μA mm−1, and effectively suppressing current collapse. [ABSTRACT FROM AUTHOR]

The cascode gallium nitride high electron mobility transistors (GaN HEMTs) are very vulnerable to self‐sustained turn‐off oscillation due to their cascode configuration. This paper presents a design approach for the RC snubber of cascode GaN HEMTs to achieve the optimized noise‐loss trade‐off. At first, an analytical model is proposed to describe the instability of cascode GaN HEMTs‐based test circuits utilizing RC snubber. Based on the model, an analytical approach is proposed to achieve two optimum RC snubber designs S1 and S2. The design S1 can satisfactorily dampen the oscillation with minimum switching losses. The design S2 achieves maximum effective damping on the oscillation at a minimized cost of additional power losses. In the end, the accuracy of the proposed model is validated by the double‐pulse test and good agreement is obtained. [ABSTRACT FROM AUTHOR]

This Letter pioneers an investigation into the influence of temperature on threshold voltage (VTH) instability under negative bias in ferroelectric charge trap gate stack (FEG) high electron mobility transistors. Based on the experimental stress condition, i.e., gate bias of −20 V and temperature (T) range from 30 to 150 °C, our findings reveal a unidirectional VTH shift with 30 °C < T < 90 °C, and transitioning to a bidirectional VTH shift at 90 °C ≤ T ≤ 150 °C. The observed VTH < 0 V can be ascribed to the emission of electrons from the trapping layer, prompted by the pre-poling of the ferroelectric (FE) layer and the presence of interface traps. In contrast, under high-temperature stress, where VTH > 0 V, it indicates the depletion of the two-dimensional electron gas electrons due to de-poling and saturation of the polarization in the reverse direction. Moreover, this phenomenon is consistent with extracted activation energies (Ea) of 0.55 ± 0.01 and 0.79 ± 0.01 eV. Additionally, the recovery characteristics validate the trapping/detrapping process. [ABSTRACT FROM AUTHOR]

Reducing off‐state and gate leakage current is crucial in the development of metal–insulator–semiconductor high‐electron‐mobility transistors (MIS‐HEMTs). This work reports interface engineering in the gate recess region through low‐damage digital etching during the fabrication of normally off GaN MIS‐HEMTs. Conventional plasma etching leads to a reduction of the N/(Al+Ga) ratio, but this value recovers to almost 1 with optimized oxidation condition during digital etching, suggesting a reduction of the Al/Ga dangling bonds based on the proposed technique. GaN MIS‐HEMTs with digital etching exhibits a threshold voltage of 1.0 V at 1 μA mm−1, a high ON/OFF current ratio of 1010, a gate breakdown voltage of 22 V, and a low gate leakage current of 10−8 mA mm−1. [ABSTRACT FROM AUTHOR]

GaN high electron mobility transistor (HEMT)‐based low noise amplifiers (LNAs) are an integral part of microwave receiver systems to enhance signal‐to‐noise ratio (SNR). The noise of LNA itself becomes critical for systems requiring high SNR, such as imaging and satellite communication systems. This paper discusses the design of a three‐stage LNA operating at the X‐band in the frequency range of 8.0–12.0 GHz. The amplifier's design and small signal, noise, and linearity characterizations are discussed. Stagewise analysis for gain, noise figure (NF), and matching network losses at the design stage results in achieving promising results. The proposed LNA provides a gain of 23.2 dB with ± 1.0 $\pm \ 1.0$ dB gain ripple. Its NF is below 1.5 dB, output power at 1 dB gain compression is 16.4 dBm, and third‐order intercept point is 24.7 dBm at 10 GHz. LNA's survivability is validated to input stress as high as 42 dBm. This LNA is the best reported NF and survivability combination in the 8.0–12.0‐GHz frequency range. The reverse recovery time of LNA is measured under two different pulse conditions, and it has been shown that LNA has better recovery times for lower pulse width signals. This LNA finds its applications in radars and satellite communication systems. [ABSTRACT FROM AUTHOR]

This letter presents a 0.01–50‐GHz resistive matching power detector implemented in a commercial 0.15‐μm $\mathrm{\mu m}$ GaAs pseudomorphic high electron mobility transistor technology. An analytical expression is derived for the voltage responsivity of the detector as a function of temperature. To compensate for the temperature dependence of the detector, bias diode topology and mesa resistor load are employed. For an input power of −20 dBm at 1 GHz, the maximum variation of the detector output voltage is less than 0.5 dB over the temperature from −55° $-55^\circ $C to 85° $85^\circ $C. The detector's S11 is less than −8 dB, the dynamic range (DR) is 55 dB, and the maximum voltage responsivity is 700 V/W. An on‐chip wideband capacitor with a bent‐strip shape is designed for direct current blocking. The detector can be used for wideband power monitoring and power amplifier control loop for its high DR and temperature stability. [ABSTRACT FROM AUTHOR]

In this paper, a new method for evaluating hot-electron degradation in p-GaN gate AlGaN/GaN power HEMTs is proposed. The method exploits a commercial parameter analyzer to study VTH and RON drifts induced by on-state stress at VDS = 50 V. The results show that VTH drift and part of the RON degradation induced by the on-state stress are recoverable and likely due to the ionization of C-related acceptors in the buffer. This was confirmed by a preliminary characterization of C-related buffer traps. Conversely, the remaining part of RON degradation (not recovered in 1000 s) was strongly affected by the surface treatment. The current level set during on-state stress affected the amount of non-recoverable degradation, confirming the involvement of hot electrons. Thanks to the monitoring of the parameters' recovery, the proposed method provides important insights into the physical mechanisms governing the parameters' degradation. This extends the capabilities of state-of-the art systems, without the need for custom setup development. [ABSTRACT FROM AUTHOR]

This paper presents a metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) device, operating in enhancement mode, with a double-channel triple-barrier (DCTB) Al0.15Ga0.85N/GaN/Al0.07Ga0.93N/GaN/Al0.05Ga0.95N device structure. Initially, we simulate the Al0.15Ga0.85N/GaN single-channel single-barrier (SCSB) MIS-HEMT, featuring a T-gate design that offers a significant gap between the gate and a drain electrode, resulting in a high breakdown voltage (VBD) and low parasitic capacitance, enhancing cut-off frequency (ft) and a maximum frequency of oscillation (fmax). In the current era, high breakdown voltage, high current drive, and high-frequency enhancement-mode-operated devices are needed for power switching circuits and high-frequency power amplifier applications. To meet these requirements, we propose a DCTB MIS-HEMT device structure that adds additional back-barrier layers and channel layers to form a double-hump characteristic due to the interaction between two-dimensional electron gas (2DEG) accumulation layers and the electric field across the device. We optimize the devices with an optimistic doping profile in channel and buffer layers, a field plate, recessed gate structure, and control the barrier layers thickness, ensuring enhancement-mode operation. Numerical simulations of the DCTB device provide high drain current (Ids) of 1.5 A/mm, transconductance (gm) of 0.232 S/mm, threshold voltage (Vt) of 2.8 V, VBD of 633.1 V, ON resistance (RON) of 6.074 Ω mm, ft of 49.8 GHz, and fmax of 107.8 GHz. Due to improvements in these parameters, the DCTB MIS-HEMT outperforms the SCSB MIS-HEMT, making it suitable for high-current drive, high-frequency, and high-speed switching applications. In this work, we also examine the merits of utilizing DCTB MIS-HEMT as the switching element in an ultra-low-loss boost converter circuit. [ABSTRACT FROM AUTHOR]

The small-signal S parameters of the fabricated double-finger gate AlGaN/GaN high electron mobility transistors (HEMTs) were measured at various direct current quiescent operating points (DCQOPs). Under active bias conditions, small-signal equivalent circuit (SSEC) parameters such as Rs and Rd, and intrinsic parameters were extracted. Utilizing fT and the SSEC parameters, the effective electron velocity ( ν e − e f f ) and intrinsic electron velocity ( ν e − int ) corresponding to each gate bias (VGS) were obtained. Under active bias conditions, the influence mechanism of VGS on ν e − e f f was systematically studied, and an expression was established that correlates ν e − e f f , ν e − int , and bias-dependent parasitic resistances. Through the analysis of the main scattering mechanisms in AlGaN/GaN HEMTs, it has been discovered that the impact of VGS on ν e − e f f should be comprehensively analyzed from the aspects of ν e − int and parasitic resistances. On the one hand, changes in VGS influence the intensity of polar optical phonon (POP) scattering and polarization Coulomb field (PCF) scattering, which lead to changes in ν e − int dependent on VGS. The trend of ν e − int with changes in VGS plays a dominant role in determining the trend of ν e − e f f with changes in VGS. On the other hand, both POP scattering and PCF scattering affect ν e − e f f through their impact on parasitic resistance. Since there is a difference in the additional scattering potential corresponding to the additional polarization charges (APC) between the gate-source/drain regions and the region under the gate, the mutual effects of PCF scattering on the under-gate electron system and the gate-source/drain electron system should be considered when adjusting the PCF scattering intensity through device structure optimization to improve linearity. This study contributes to a new understanding of the electron transport mechanisms in AlGaN/GaN HEMTs and provides a novel theoretical basis for improving device performance. [ABSTRACT FROM AUTHOR]

We have investigated the electrical properties and reliability of AlGaN/GaN high electron mobility transistors (HEMT) under high-temperature RF overdrive stress. The experimental results show that the drain current and transconductance of the device decrease at 25 °C and 55 °C but do not change significantly at 85 °C before and after the stress. The decline rate of the saturation drain current, the degradation amplitude of transconductance, and the drift amplitude of threshold voltage decrease with the increase in temperature. The results of pulse I–V and low-frequency noise tests show that the current collapse is inhibited, and the trap density is reduced at higher temperatures. The Electroluminescence (EL) test shows that the luminescence characteristics of the device after RF overdrive stress are more scattered and weaker. We believe that the degradation at lower temperatures is mainly due to the influence of the hot electron effect (HEE), while the change in electrical properties at higher temperatures is due to the weakening of HEE and the improvement of the Schottky interface. [ABSTRACT FROM AUTHOR]

Conjugated polymers are emerging as competitive candidates for organic thermoelectrics (OTEs). However, to make the device truly pervasive, both p‐ and n‐type conjugated polymers are essential. Despite great efforts, no n‐type equivalents to the p‐type benchmark PEDOT:PSS exist to date mainly due to the low electrical conductivity (σ). Herein, a near‐amorphous n‐type conjugated polymer, namely pDFSe, is reported with high σ by achieving the synergy between charge transport and doping efficiency. The polymer pDFSe is synthesized based on an acceptor‐triad moiety of diketopyrrolopyrrole‐difluorobenzoselenadiazole‐diketopyrrolopyrrole (DFSe), which has the noncovalently‐fused‐ring structure to reinforce the backbone rigidity. Furthermore, an axisymmetric thiophene‐selenophene‐thiophene donor is introduced, which enables the formation of near‐amorphous microstructures. The above merits ensure good doping efficiency without scarifying efficient intrachain charge‐carrier transport. Thus, pDFSe‐based n‐type transistors exhibit high electron mobility up to 6.15 cm2 V−1 s−1, much higher than its reference polymer pDSe without the noncovalently‐fused‐ring structure (0.77 cm2 V−1 s−1). Further upon n‐doping, pDFSe demonstrates excellent σ of 62.6 S cm−1 and maximum power factor of 133.1 μW m−1 K−2, which are among the highest values reported for solution‐processed n‐type polymers. The results demonstrate the great potential of near‐amorphous n‐type conjugated polymers with noncovalently‐fused‐ring structure for the next‐generation OTEs. [ABSTRACT FROM AUTHOR]

Fabrication of low-RF loss GaN-on-Si high electron mobility transistor stacks is critical to enable competitive front-end-modules for 5G and 6G applications. The main contribution to RF losses is the interface between the III-N layer and the HR Si wafer, more specifically the AlN/Si interface. At this interface, a parasitic surface conduction layer exists in Si, which decreases the substrate effective resistivity sensed by overlying circuitry below the nominal Si resistivity. However, a clear understanding of this interface with control of the parasitic channel is lacking. In this Letter, a detailed physical and electrical description of metalorganic chemical vapor deposition-grown AlN/Si structures is presented. The presence of a SiCxNy interfacial layer is revealed, and its importance for RF losses is shown. Through C–V and I–V characterization, an increase in the C concentration of this interfacial layer is linked to the formation of negative charge at the AlN/Si interface, which counteracts the positive charge present in the 0-predose limit. The variation of the TMAl predose is shown to allow precise tuning of the C composition and, consequently, the resulting interface charge. Notably, a linear relationship between the predose and the net interface charge is observed and confirmed by the fabrication of an AlN/Si sample with close to zero net charge. In addition, a higher Dit (∼ 2 × 10 12 c m − 2 ) for such compensated samples is observed and can contribute to low-RF loss. An exceptionally high effective resistivity of above 8 kΩ cm is achieved, corresponding to an RF loss below 0.3 dB/mm at 10 GHz. [ABSTRACT FROM AUTHOR]

This document is a collection of research papers on wide- and ultrawide-bandgap electronic semiconductor devices. It focuses on the progress and challenges in developing devices made from wide-bandgap materials like GaN, AlGaN, AlN, Ga2O3, BN, and diamond for power, rf, and photonic applications. The papers cover topics such as improving GaN power devices, exploring new wide bandgap materials, and investigating gate insulator properties. Additionally, there are papers on defect detection, new concepts for wide bandgap devices, and the growth and properties of different materials. The research provides valuable insights for researchers interested in using these materials in electronic devices. [Extracted from the article]

Summary: The small signal modeling, design, fabrication, and measurement about monolithic millimeter‐wave integrated circuit (MMIC) using gallium nitride (GaN) power amplifier (PA) on silicon carbide (SiC) working at the E band are proposed in this paper. The two stage PA used customized 4 × 75 μm transistor with 100 nm T gate technology. The extraction and optimization of small signal model are based on single GaN high electron mobility transistor (HEMT)'s measurement. Balanced structure and new method are used by low impedance matching, which can simplify circuits prominently and benefit for die size reduction. Radial stub and LC stub are made the whole circuit in absolute stable status; the in‐series DC block metal–insulator–metal capacitor from the matching circuit ensure the process is within small tolerances. From the 61–66 GHz bandwidth, a peak 10.7 dB small signal gain is obtained from the designed MMIC GaN PA, and also, the maximum output power can reach 29.7 to 30.4 dBm from 61 to 66 GHz, with an associated the peak drain efficiency of 18.8%. The final die size without dicing slot is 3.0 × 1.74 mm2. [ABSTRACT FROM AUTHOR]

Summary: An off‐chip compensation technology for low‐loss and broadband characteristics of radio frequency (RF) switches is proposed based on mathematical analysis of series shunt single pole double throws switches in this letter. This compensation technology can absorb the parasitic parameters of the switch Field Effect Transistor, improving the insertion loss and return loss of the switch as well as supporting higher bandwidth. To verify the design principle, a RF switch, using the SANAN GaAs 0.15 um pseudomorphic High Electron Mobility Transistors (pHEMT) process, and an off‐chip compensation network were designed and implemented. Specifically, after using an off‐chip compensation network, the measured bandwidth of switch has been expanded from 1.1–8.8 to 0.8–11 GHz, while the input and output return loss have also improved significantly. [ABSTRACT FROM AUTHOR]

The influence of frequency characteristics of devices is complex. The effects of AlN barrier thickness, gate length, gate-drain spacing and work function on the frequency characteristics of AlN/ β-Ga2O3 high electron mobility transistor (HEMT) were studied by Sentaurus TCAD in this paper. The following conclusions are obtained: as the thickness of the AlN barrier layer increases from 10 nm to 25 nm, the cutoff frequency (fT) and maximum oscillation frequency (fmax ) rise by 18 and 17 GHz respectively. The decrease of gate capacitance is the main reason for the increase of fT . Furthermore, it was found that the thinner barrier layer enhanced the gate's ability to control the channel electrons. When the gate length is scaled down from 0. 9 μm to 0. 1 μm, fT and fmax increase by 84 and 98 GHz, respectively, representing a far more profound influence on frequency characteristics than the barrier layer thickness. However, when the gate length fell below 0. 1 μm, short-channel effects emerged. As the gate-drain spacing increase, fT exhibits a slight decrease. Coupled with the concurrent reduction in source resistance, this led to a synchronized trend in fmax and fT only when the gate-source voltage (VGS ) exceeds - 1. 2 V. The work function, on the other hand, has minimal impacts on fT and fmax, but an increase in the work function positively influenced the device' s pinch-off characteristics. In summary, this paper indicates that by shortening the gate length while concurrently augmenting the thickness of the AlN barrier layer, gate-drain spacing, and work function, one can enhance the frequency characteristics while also improving the pinch-off characteristics of the device, which has certain guiding significance for the design of HEMT devices. [ABSTRACT FROM AUTHOR]

This comprehensive review delves into the intricate realm of GaN-based metal–oxide–semiconductor (MOS) high-electron-mobility transistors (HEMTs), providing an exhaustive analysis of their contemporary DC and radio-frequency (RF) performance. Despite familiar challenges in the instability of threshold voltage (VTH) observed in GaN MOSHEMTs, recent innovations in interface technologies, incorporating in situ SiNx and surface oxidation of (Al)GaN, have led to exceptional DC and dynamic performances, achieving stability in VTH by reducing surface states, minimizing interface traps, controlling surface potential, and enhancing interface quality. Adoption of high-κ dielectric materials is emphasized since they are indispensable, as they play a crucial role in improving the electrostatic control of the gate and reducing parasitic capacitance, and contribute to achieving low gate leakage, high gm, small VTH fluctuation, and small current collapse. The recent aspects of the AlGaN/GaN MOSHEMT devices are presented, and the impacts of structural breakthroughs are discussed. When compared to single-layer arrangements, the utilization of multilayer gate stacks can provide improved gate control and less leakage. Tailoring the electric field distribution and enhancing device performance for particular applications or operational conditions are made possible by engineering the gate stack arrangement. This review also discusses fabrication challenges and reliability issues in GaN-based MOSHEMTs, highlighting innovative manufacturing techniques and shedding light on ongoing research to address these challenges. By presenting a comprehensive overview of recent developments and emerging trends, this review aims to contribute valuable insights for researchers and practitioners in the dynamic and expanding field of GaN-based RF power electronics and sensing technologies. [ABSTRACT FROM AUTHOR]

This paper presents an investigation into the modeling of Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) using multiple Machine Learning (ML) algorithms. Despite the documented use of various ML techniques, a thorough comparison and performance analysis under different operating conditions were lacking. This study fills this gap by conducting a rigorous evaluation of nine ML models using TCAD-generated data of Pseudomorphic AlGaN/InGaN/GaN HEMT. The research focuses on Small Signal Behavioral Modeling and examines regression techniques such as Multiple Linear Regression (MLR), Multivariate Linear Regression (MVLR), Ridge Regression (L2), Lasso Regression (L1), Elastic Net Regression (ENR), Decision Trees (DT), Random Forest (RF), Gradient Boosting Regression(GBR), and Support Vector Regression (SVR). These methods use biases, frequency, and device geometry as independent variables, with S-parameters being the dependent variables. K-fold cross-validation was employed to ensure model reliability and accuracy across diverse operating conditions. Results reveal that the RF, coupled with 10-fold cross-validation, exhibits superior performance giving 99.7% accurate results, with a Mean Squared Error (MSE) of 4.6375×10-5, and a coefficient of determination (R²) of 0.9977. Conversely, SVR, L1, and ENR fall short of expectations. This study underscores the significance of methodological advancements in ML-based GaN HEMT modeling and provides valuable insights for future research in this domain. [ABSTRACT FROM AUTHOR]

We have developed and simulated a high electron mobility transistor (HEMT) operating in the 5 nm regime. This HEMT uses hafnium oxide (HfO2), a high-k dielectric material, to create an undoped region (UR) beneath the gate. While the gate and undoped regions share equal thickness, the channel length differs. This innovative undoped under the gate dielectric HEMT design mitigates the maximum electric field (V) within the channel area, leading to a significant increase in drain current. The utilization of a high-k dielectric in the HEMT structure results in a saturated Ion current that is 60% higher compared to conventional structures. Specifically, we use an AlGaN/GaN/SiC-based HEMT with an intrinsic section below the gate, using HfO2 as the high-k dielectric substantial, for applications requiring high power and high-frequency power amplifiers. Compare this advanced HEMT design to conventional HEMTs and you will see improved conductivity, a greater drain current (Id), a 54% increase in transconductance (Gm), and a lower on-resistance (Ron). Additionally, advancements in the electric field in the Y direction are seen. This HEMT structure exhibits superior performance compared to alternative materials analyzed. The integration of AlGaN/GaN materials in HEMTs opens up extensive opportunities in the realms of radio frequency very large-scale integration (VLSI) and power electronics. [ABSTRACT FROM AUTHOR]

For operation as power amplifiers in RF applications, high electron mobility transistor (HEMT) structures are subjected to a range of bias conditions, applied at both the gate and drain terminals, as the device is biased from the OFF- to ON-state conditions. The stability of the device threshold voltage (Vt) condition is imperative from a circuit-design perspective and is the focus of this study, where stresses in both the ON and OFF states are explored. We see rapid positive threshold voltage increases under negative bias stress and subsequent recovery (i.e., Vt reduces), whereas conversely, we see a negative Vt shift under positive stress and Vt increase during the subsequent relaxation phase. These effects are correlated with the thickness of the GaN layer and ultimately result from the deep carbon-acceptor levels in the C-GaN back barrier incorporated to screen the buffer between the silicon substrate and the epitaxially grown GaN layer. Methods to mitigate this effect are explored, and the consequences are discussed. [ABSTRACT FROM AUTHOR]

Heterogeneous integration of functional oxides with ultra-wide bandgap (UWBG) semiconductors is desired for the realization of novel hybrid systems applicable to a wide array of commercial electronics and defense applications. In this work, we demonstrate the growth of crystalline SrTiO3 (STO) thin films on high-electron-mobility transistor (HEMT) heterostructures based on an emergent UWBG semiconductor ScAlN, used as the barrier layer on a GaN channel, and determine the effects of the pre-growth chemical treatments of the ScAlN surface on resultant heterostructure properties. We investigate wet chemical cleans of ScAlN with solvents, piranha solution, UV ozone and hydrofluoric acid, and a sulfuric-phosphoric acid mix prior to STO growth, and show that the commonly used piranha solution degrades the ScAlN surface, thereby reducing the crystal quality of the deposited STO layers and lowering the channel mobility. We determine that among the treatments studied, the solvent and sulfuric-phosphoric acid cleans were the least disruptive to the electrical properties of the GaN channel as evidenced from Hall effect measurements, but the sulfuric-phosphoric acid clean results in best oxide crystallinity, as determined from structural characterizations. We perform transmission electron microscopy imaging on the piranha-treated and sulfuric-phosphoric-treated samples to compare the microstructure and find that while intermixing occurs at the oxide-nitride interfaces for both samples, the interface roughness is lower and the STO grain size is larger in the sample with sulfuric-phosphoric acid treatment. This work demonstrates the first epitaxial growth of STO on an UWBG semiconductor and motivates STO/ScAlN/GaN as material platforms for high-frequency, high-power-density HEMTs. [ABSTRACT FROM AUTHOR]

In this paper, an effective equivalent modeling technique has been proposed to describe small-signal characteristics of InP-based high electron mobility transistors (HEMTs) after proton radiation, which is composed of an artificial neural network and equivalent-circuit models. Small-signal intrinsic parameters of InP-based HEMTs are extracted from S-parameters before and after 2 MeV proton radiation as modeling objects. The deep learning model of a generative adversarial network has been explored to expand the measured finite data samples. Four feedforward neural networks are incorporated to equivalent-circuit topology to form the equivalent model, which are trained to accurately predict the radiation-induced variations of Cgs, Cgd, Rds, and gm, respectively. The prediction accuracy of the developed equivalent model has been well verified in terms of the broad-band S-parameters under radiation fluence of 1 × 1014 and 5 × 1013 H+/cm2. This equivalent modeling method with characterization of radiation damage effects could provide significant guidance for the aerospace monolithic millimeter-wave integrated circuit design. [ABSTRACT FROM AUTHOR]

The radio frequency (RF) degradation mechanism under high temperature is proposed in this paper. The saturated output power (P sat), power added efficiency (PAE) and gain of the HEMTs deteriorate significantly under high power dissipation operation conditions, which contribute to an elevation of the junction temperature (T j). The high T j causes a negative shift of the threshold voltage and a reduction of electron mobility, as well as enhancing the trapping effects of the devices. As a result, the P sat and PAE of the high-power HEMTs (P sat = 152 W) decreased by 0.76 dB and 8.3%, respectively, which is more severe compared to low-power HEMTs (P sat = 20 W), where P sat and PAE reduced by 0.16 dB and 3.1% when the operation temperature was increased from 25 °C to 150 °C. By increasing the gate-to-drain distance from 1.625 to 2.175 μ m, drain current stability and high temperature reverse bias reliability are improved. The results demonstrate that the trapping effect can be suppressed by decreasing the electric field under the gate; therefore, the RF output characteristics are boosted by 1.2 W, 1 dB and 2.6% for a device with gate width of 11.52 mm. [ABSTRACT FROM AUTHOR]

This work investigates the Ohmic contact mechanism and low resistance Ohmic contact preparation for GaN-based high electron mobility transistors (HEMTs) with GaN/AlN superlattice (SL) barriers. The electrical and microstructural characterization of Ti/Al/Ni/Au contacts shows that the formation of Ohmic contacts primarily depends on the TiN islands formed by Ti diffusion in the barrier layer, which is the main reason for the high contact resistance of GaN/AlN SLs HEMTs under conventional high-temperature annealing. A grid deep-recess technique is proposed to establish direct contact between TiN interfacial layer, the barrier, and the two-dimensional electron gas through the sidewalls. This novel technique achieves an Ohmic contact with a low contact resistance of 0.31 Ω mm at low temperatures (700 °C). Furthermore, increased grid deep-recess density effectively reduces contact resistance due to the additional contribution from the conduction width. It is also noteworthy that after complete removal of the barrier layer, the impact of recess depth on contact characteristics is minimal, greatly reducing the process complexity of grid deep-recess technique. Consequently, GaN/AlN SLs HEMTs fabricated using the grid deep-recess technique exhibit significant improvements in on-resistance, transconductance and saturation current. These results are expected to expand the potential application of GaN/AlN SL barrier layers in radio frequency and power devices. [ABSTRACT FROM AUTHOR]

In this report, a comprehensive review of the variations in threshold voltage (V TH) that could arise due to different V TH measurement techniques, V TH measurement bias conditions and V TH extraction techniques is made. Notably, a standard deviation of 15% is observed in threshold voltage values due to variations in measurement methodology and bias conditions. This variation is attributed to the change in the dynamic gate charge conditions across the gate stack and lateral electric field conditions across the gate and drain, which occur due to the change in measurement conditions and the bias conditions, respectively. No significant variations arise due to the V TH extraction technique. Additionally, a simplified physical interpretation of the gate stack in normally off p-GaN gate/AlGaN/GaN on Si high electron mobility transistors is made. The formation of the two-dimensional electron gas, the charge balance within the p-GaN/AlGaN/GaN gate stack and an analytical expression for the threshold voltage are reviewed and examined. Furthermore, various trapping mechanisms within the gate stack are reviewed to comprehend the dynamic conditions potentially contributing to threshold voltage instability during nominal operation. [ABSTRACT FROM AUTHOR]