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In this paper, we have designed and realized a two‐stage low‐noise power amplifier (LNPA) with resistive feedback network targeting for Ka‐band compact RF front‐end applications. Featuring the characteristics of both low noise and high power at the same time, the LNPA is expected to be a possible one‐chip replacement of power and low noise amplifiers integrated in a conventional transceiver/receiver (T/R) module. Such configuration features size compactness while reduces implementation complexity which is of crucial importance for integration in antenna arrays with large number of antenna elements. Implemented in 0.15‐μm GaAs pseudomorphic high electron mobility transistor (pHEMT) technology, the LNPA, operating at 36–40 GHz, exhibits a peak gain of 15.96 dB, a minimum noise figure of 2.88 dB, a power consumption of 152 mW and a measured 1‐dB compression output power of 14.92 dBm at 38 GHz, respectively. The LNPA also featured a very good linearity performance with a measured output third‐order interception point (IP3) of 22.22 dBm at 38 GHz. [ABSTRACT FROM AUTHOR]

This study reports a frequency‐modulated ultra‐wideband transmitter optimised for low‐power consumption. The chip includes a sub‐oscillator tunable from 0.1 to 4 MHz, a radio‐frequency oscillator tunable from 3.0 to 4.5 GHz, and an output power amplifier with a matching network. Depending on the channel selected, the measured transmitter consumes between 440 and 640 μW of power to produce −14 dBm continuously to a 50 Ω load. Two power supplies are used to reduce the effect of wasted voltage headroom between circuit blocks. Fabrication is done using the International Business Machines Corporation 130 nm complementary metal–oxide–semiconductor technology on a 1 mm × 1 mm loose die, the circuit occupies 0.2 mm2. [ABSTRACT FROM AUTHOR]

A GaN monolithic microwave‐integrated circuit (MMIC) driver and high power amplifier (HPA) chipset solution are presented for two commonly utilised satellite communications frequency bands. The MMICs represent first pass designs utilising Qorvo's recently released 0.15 µm GaN on SiC process featuring slot via devices. [ABSTRACT FROM AUTHOR]

A silicon–germanium BiCMOS E‐band power amplifier (PA) for millimetre‐waves for Gbit/s data rates in fifth‐generation cellular wireless backhaul networks is presented. A 69–78 GHz transmission‐line PA is demonstrated by integrating an electrostatic discharge (ESD) and a power detector together. To save this area, a transmission‐line‐based power coupler is shared by the ESD and the power detector. The ESD achieves an insertion loss of <1.5 dB in the frequency range of 17–100 GHz. The linear‐in‐dB output characteristic of the power detector is achieved by an exponential voltage convertor. The designed PA measured a maximum gain of 18.6 dB with 3 dB bandwidth of 68.9–78.7 GHz. The input return loss is better than −10 dB from 50 to 81 GHz. It delivers 10 dBm saturated output power at 73.4 GHz. Transmission line pulsing (TLP) measurement result shows that the voltage is clamped below 6 V even under 10 A ESD current. [ABSTRACT FROM AUTHOR]

A fully integrated broadband E‐band power amplifier (PA) is implemented in 28 nm CMOS process. To enhance the output power (POUT), an 8‐way differential series‐parallel power combiner is used together with the neutralised bootstrapped cascode amplifier topology. The unit PAs are realised by both NMOS and PMOS transistors, respectively, which cancel the amplitude‐to‐phase modulation (AM‐PM) distortion due to non‐linear gate‐to‐source capacitance (CGS) of NMOS and PMOS transistors under large input voltage amplitude. The presented PA achieves a saturated output power (PSAT) of 21.3 dBm with more than 18.5 GHz −3 dB small‐signal bandwidth (BW−3 dB). [ABSTRACT FROM AUTHOR]

Wideband high‐power single‐chip X‐band class‐F power amplifier with excellent output performances is reported. In order to achieve high‐power class‐F operation under minimised output capacitance impact at the frequency, high‐voltage operation with minimised device size is pursued and its voltage swing becomes maximised by adopting high breakdown field‐plate (FP) GaN high‐electron‐mobility transistor (HEMT) devices with cascode configuration. For the fabrication, 0.14 µm FP AlGaN/GaN HEMT technology with 58 GHz fT and ∼100 V breakdown is used. Based on on‐wafer test at 44 V Vdd, the fabricated class‐F power amplifier delivers maximum 61.1% power added efficiency (PAE) with 9.2 W at 10.2 GHz. With the help of high‐voltage operating cascode devices of minimised size, it also delivers excellent bandwidth of 1.6 GHz at the point of 50% PAE and high‐power density of 4.42 W/mm is demonstrated. [ABSTRACT FROM AUTHOR]

This paper presents the broadband class-C mode of operation, termed the “continuous class-C”, which is an extension of a standard class-C design but with the optimum fundamental and second harmonic terminations now forming a continuous arrangement of load impedances on the Smith chart. With the generic drain current waveform depending on the amplifier conduction angle, and by using the well-established continuous class-B (class-J) voltage waveforms, a set of closed-form equations for the fundamental and second harmonic impedances are derived. These provide a wide impedance design space to realize broadband class-C power amplifiers (PAs) with the constant output power, gain and efficiency over a significant bandwidth. The continuous class-C mode is subdivided into low- and high-power modes for which load impedance, output power and drain efficiency ratios are found and compared to those of the continuous class-B. New design spaces are graphically shown for both class-C modes. The proposed continuous class-C concepts are validated experimentally with on-wafer load pull measurements of an integrated 8×50 μm, ~ 1 W, 20 V GaN MMIC transistor. The proposed theory is also applied in simulations of power amplifiers operating in continuous class-B and continuous class-C modes. [ABSTRACT FROM AUTHOR]

In this paper, we further develop the concept of a wideband Doherty power-amplifier topology with reconfigurable efficiency. This is done by presenting new theory that - in contrast to previous work - makes it possible to analyze how the performance of the amplifier depends on the input network properties and the choice of gate bias voltages. The utility of the presented theory is demonstrated by the design and characterization of a gallium-nitride monolithic-microwave integrated-circuit amplifier designed in close agreement with the theoretical findings. Continuous-wave (CW) measurements show that the fabricated amplifier provides more than 31% power-added efficiency (PAE) at 9-dB output power back-off over a 5.8-8.8-GHz frequency range, and that the efficiency can be reconfigured as predicted by the presented theory. Modulated measurements - employing digital pre-distortion (DPD) and a 20-MHz signal with 8.5-dB peak-to-average power ratio - show more than 32% average PAE across the same 5.8-8.8-GHz frequency range. Both the CW and the modulated measurements thereby verify the wideband performance predicted by the theory. In addition, modulated measurements at 7.0 GHz without DPD show that the amplifier can provide excellent raw linearity by demonstrating -41.0-dBc adjacent channel power ratio and -34.2-dB normalized mean square error. [ABSTRACT FROM AUTHOR]

This paper reports on two power amplifier (PA) monolithic microwave integrated circuits (MMICs) operating at frequencies around 220 GHz. The PAs use 250-nm InP HBTs and thin-film microstrip technology formed with a benzocyclobutene dielectric. Both PAs utilize a two-emitter-finger HBT unit-cell with each finger having an emitter area of 0.25×6 μm2. The single-stage amplifier MMIC has six two-emitter HBTs in parallel for a total emitter area of 18 μm2. This amplifier has ~ 5 dB of small-signal gain from 210 to 230 GHz. It has demonstrated saturated output power of 90 mW at 210 and power-added efficiency (PAE) of 10%. This is the highest PAE number demonstrated at these frequencies. The two-stage PA uses three single-stage PAs, one as a driver and two in a balanced configuration in the second stage. The total output emitter area is 18 μm2. This PA demonstrated saturated output > 100 mW and PAE ≥ 4% from 210 to 225 GHz. [ABSTRACT FROM AUTHOR]

In order to simplify and optimize the design process of stacked amplifiers, this paper presents a novel analytical method to dimension the input network for ideal output behavior. To verify this new structural design process, a fully integrated stacked power amplifier (PA) in 0.25-μm SiGe BiCMOS technology is proposed. The stacked architecture enables broadband matching networks, therefore the designed PA reaches a very high bandwidth of 800 MHz around 2 GHz. At 2 GHz, the small-signal gain is 23.8 dB. The output power in the 1-dB compression point and the saturated output power are 26.2 and 27.3 dBm, leading to a power-added efficiency (PAE) of 34% and 40%, respectively. Using a long-term evolution (LTE) modulated input signal without any predistortion, the amplifier reaches an average output power of 21 dBm and a PAE of 12%, fulfilling the LTE specifications in terms of adjacent channel leakage ratio and error vector magnitude. [ABSTRACT FROM AUTHOR]

In this paper, we will review the design, construction and performance of the two-way Ka-band waveguide branch-line and asymmetric magic-T based unequal power combiners. The manufactured combiners were designed to combine input signals that are equal in phase and with an amplitude ratio of two. Next, the design, construction and performance of a three-way branch-line unequal power combiner, achieved by serially interconnecting two 2-way branch-line hybrids and optimizing the dimensions using software tools, is presented. The application of the two-way and three-way combiners for combining the output from two or three MMIC PAs was demonstrated. The observed efficiencies for all three power combining configurations are 90 percent or greater at Ka-band (31.8 to 32.3 GHz). [ABSTRACT FROM AUTHOR]

A 6–18 GHz gallium nitride (GaN) non‐uniform distributed amplifier (NDA) monolithic microwave integrated circuit with high power density is implemented with compact four‐way combined power. The drain lines and gate lines are shared among the combined NDAs. Sharing drain (or gate) lines reduces the drain (or gate) line length by half, while keeping the same characteristic impedances and eliminates bulky and lossy power combiners, such as Wilkinson combiners. The proposed four‐way NDA was fabricated using a commercial 0.25 μm GaN high electron mobility transistor (HEMT) process. It shows average continuous wave output power of 20.8 W and average associated gain of 10.7 dB from 6 to 18 GHz under 33 V drain bias. When pulsed input power and pulsed DC bias are simultaneously supplied to the NDA, the output power increases to 26 W, on average. To the best of the authors' knowledge, the highest RF power and power density among the reported GaN power amplifiers with an octave bandwidth higher than the Ku‐band is represented in this work. [ABSTRACT FROM AUTHOR]

A 5.3 GHz high‐efficiency and low‐cost class‐E power amplifier (PA) implemented in a 180 nm CMOS process is presented. Cascode configuration is utilised in the class‐E PA to achieve high efficiency due to its high gain property and low drain‐to‐source parasitic capacitor. Through the trade‐off between inductance and inductor loss, an optimised RF choke inductor for fully integrated class‐E PA design can be selected to achieve high efficiency while maintaining compact circuit size. The class‐E CMOS PA demonstrates the highest Power Added Efficiency (PAE) of 42% and greatest power area density of 532 mW/mm2 in 0.263 mm2 chip area to date. [ABSTRACT FROM AUTHOR]

A differential heterojunction bipolar transistor (HBT) power cell has been designed and modeled with additional model extraction patterns. The differential power cell, which is composed of a unit differential amplifier with a common emitter ballast resistor, has no gain degradation by the ballast resistors and has been implemented in InGaP/GaAs HBT technology. DC and AC characteristics are extracted from a half circuit of the differential power cell and thermal characteristics are extracted from a common-mode circuit of that. Using the extracted model, a 5-GHz differential power amplifier has been designed and fabricated with on-chip output networks. The 5-GHz differential power amplifier delivers 26 dBm of P1dB with 30% collector efficiency. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2262–2268, 2008; Published online in Wiley InterScience (www.interscience.wiley.com).DOI 10.1002/mop.23684 [ABSTRACT FROM AUTHOR]

A standard-compliant integrated quad-band GSM/EDGE radio frequency power amplifier for 824-915 MHz and 1710-1910 MHz has been realized in a 0.35-pm SiGe-Bipolar technology. The chip integrates two single-ended three-stage power amplifiers and control circuitry for band-select, power loop control and mode dependent quiescent currents. For power control, an on-chip voltage regulation loop is implemented, using an external P-channel MOS-transistor on a laminate module. At 3.3 V a saturated output power of 35.9 dBm is achieved at 830 MHz and 32.3 dBm at 1710 MHz. The respective peak power added efficiency (PAE) is 56% for low-band and 44% for high-band. [ABSTRACT FROM AUTHOR]

A family of X-band MMIC power amplifiers using a low cost GaAs pHEMT process is reported. The stepper-based volume 0.5 micron and 0.25 micron GaAs pHEMT processes utilize 4 inter-level metallisation and four dielectric layers for high frequency performance whilst maintaining the economies of scale of 150mm (6") diameter substrates. The fabricated GaAs X-Band PA MMICs exhibit SW to low NY output power under pulsed conditions; 16dB of power gain and power added efficiencies approaching 40%. Excellent repeatability and high yields over a number of wafers have been demonstrated. The design and GaAs process approach taken here with DUV stepper and 150 mm wafer diameter will lead to a significant cost reduction for high performance power amplifier MMICs up to 30GHz. [ABSTRACT FROM PUBLISHER]

A three-stage 21-26-GHz medium-power amplifier fabricated in fT = 120 GHz 0.2 pm SiGe HBT technology has 19 dB small-signal gain and 15 dB gain at maximum output power. It delivers 23 dBm, 19.75% PAE at 22 GHz, and 21 dBm, 13% PAE at 24 GHz. The differential common-base topology extends the supply to BVCEO of the transistors (1.8 V). New on-chip components, such as on-chip interconnects with floating differential shields, and self-shielding four-way power combining/dividing baluns provide inter-stage coupling and single-ended I/O inter- faces at the input and output. The 2.45 × 2.45 mm² MMIC was mounted as a flipchip and tested without a heatsink. [ABSTRACT FROM AUTHOR]

This paper describes a design methodology used for the development of multistage broadband power amplifiers. The method uses the measured small-signal S-parameters and loadpull data in association with low loss matching (LLM) design technique. The Q-point of the amplifier was selected for class-AB operation of the device in order to obtain the maximum power-added efficiency (PAE) and bandwidth. In the design optimization using loadline techniques, four sets of S-parameter data, corresponding to device low gain, high gain, low current, and high current, were used. These data files represent the possible fabrication changes and allow realization of a design more tolerant to process variations. [ABSTRACT FROM PUBLISHER]

Power millimetre-wave band transmitters are commonly formed by a chain of MESFET or HEMT GaAs MMIC power amplifiers. Under large-signal conditions the reverse gate output current, which appears at the gate port of those devices due to drain-gate breakdown mechanisms, causes a drop in the power amplifier's power added efficiency (PAE) figure, thus affecting the entire transmitter reliability. Additionally, it is desirable to obtain a stable performance from the transmitters for different ambient temperatures. In particular, millimetre-wave wireless systems, such as the local multipoint distribution system (LMDS), require constant small signal gain for a wide range of temperatures. In this paper, an active bias network is used to compensate for both effects. The performance of the active bias network is shown to be superior, in terms of the power amplifier's PAE and the compensation of the power amplifier's small signal gain drifts due to temperature, to a conventional resistive divider when used for biasing the power amplifier. © 2003 Wiley Periodicals, Inc. Microwave Opt Technol Lett 38: 389–392, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11069 [ABSTRACT FROM AUTHOR]

We demonstrate a new linearized monolithic microwave integrated circuit smart power amplifier of extraordinary high power-added efficiency (PAE), especially at the most probable transmission power of wide-band code-division multiple-access handsets. A PAE of 21% at 16 dBm of output power, which is the maximum bound of the most probable transmission power in IS-95 systems, was obtained, as well as 40% at 28 dBm, the required maximum output power, with a single-chip MMIC power amplifier. The power amplifier has been devised with two InGaP-GaAs heterojunction bipolar transistor amplifying chains parallel connected, each chain being optimized for a different P1dB (1-dB compression point) value: one for 16 dBm for the low-power mode, targeting the most probable transmission power, and the other for 28 dBm for the high-power mode. The high-power mode operation shows 40% of PAE and -30 dBc of adjacent channel leakage power ratio (ACLR) at the maximum output power of 28 dBm. The low-power mode operation exhibits -34 dBc of ACLR at 16 dBm with 14 mA of a quiescent current. This amplifier improves power usage efficiency and, consequently, the battery lifetime of the handset by a factor of three. [ABSTRACT FROM PUBLISHER]

For personal communication systems, the highest possible integration into monolithic technology of all RF functions are desirable. A frequency band around 60 GHz is assigned for future mobile communication fourth-generation systems (i.e., mobile broad-band systems concept). In this paper, the design and test of two monolithic class-A power amplifiers with 0.15 μm pseudomorphic heterojunction FET (PMHFET) technology is presented. One of the amplifiers is a three-stage cascade 50 Ω amplifier and the second is a balanced amplifier based on the previous one, but matched for integration on a waveguide carrier. A study on the accuracy of the passive elements and discontinuities models at 60 GHz was performed. Models for the microstrip discontinuities were obtained from electromagnetic simulation. In order to choose the best FET bias, a nonlinear model for the PMHFETs devices, based on continuous DC and AC measurements, were derived. For comparison purposes, the FET simulation results with a nonlinear model based on pulsed measurements are also presented. To avoid stability problems, at the device level an RC feedback network was introduced. A 1-dB compression point of 18 dBm was measured on-wafer for both amplifiers at 62 GHz with VDSbias=3.5 V. The three-stage and balanced amplifiers chip sizes are 3 mm×1.5 mm and 3 mm×4 mm, respectively [ABSTRACT FROM PUBLISHER]

For personal communications systems, the highest possible integration on monolithic technology of all RF functions is desirable. The most difficult component to be monolithically integrated with all other functions is the output power amplifier. This paper describes the design and test of an integrated class-F power amplifier with 200-mW output power at 1.9 GHz and a 3 V power supply based on a 0.6 μm CMOS standard technology. A theoretical study of class-F operation that highlights the influence of nonideal active devices and output network topology on the circuit behavior was performed to have guidelines for amplifier optimization [ABSTRACT FROM PUBLISHER]

A novel power-amplifier scheme is presented in this paper that realizes highly efficient transmission power control (TPC). The output power is controlled without sacrificing high power-added efficiency by combining multiple amplifiers with different power levels. Unique switching and impedance matching techniques make it possible to eliminate RF switching circuits and their associated power losses. This direct coupled architecture is called the “switchless amplifier-switching scheme.” The requirements for realizing the novel power amplifiers used in this scheme are estimated, and Ku-band amplifier monolithic microwave integrated circuits (MMICs) that follow this scheme are fabricated. The capabilities of the scheme are confirmed by testing these MMICs. Finally, a novel power amplifier incorporating the developed MMICs is constructed to demonstrate its performance. Experimental results show that the amplifier can achieve a significant reduction in DC power at low output power levels under TPC [ABSTRACT FROM PUBLISHER]

This article surveys recent progress in the development of high-power microwave and millimeter-wave solid-state sources using spatial power-combining techniques. Several promising topologies are discussed, and four technology demonstrations are presented that have emerged from recent research in academia and industry. We also include a brief discussion of potential applications and systems insertion issues [ABSTRACT FROM PUBLISHER]

A C‐band GaN high power amplifier (HPA) microwave monolithic integrated circuit (MMIC) with second harmonic tuned circuits is presented. The MMIC is designed with three stages to ensure high gain, and the final stage is matched with optimised second harmonic impedance to improve the power added efficiency (PAE). Experimental results show that the class AB GaN HPA MMIC, with drain voltage of 28 V, can be realised with more than 40% PAE and 60 W output power, with associated gain of 25 dB, in 5–6 GHz at 100 μs pulse width and 10% duty cycle. The chip area is 3.2 × 5.3 mm (16.96 mm). [ABSTRACT FROM AUTHOR]

A wideband power amplifier (PA) with high output power and efficiency over the entire X‐band is implemented in a 0.11 μm CMOS technology. To achieve high efficiency in the wideband, a new harmonic‐tuned technique is proposed for the output matching network of the PA, while no radio frequency (RF) choke is used for DC bias. Measurement results show that the output power and power‐added efficiency (PAE) are no less than 19.5 dBm and 22.6%, respectively, over the entire X‐band. The peak PAE is 28.9% with an output power of 20.3 dBm at 9 GHz. [ABSTRACT FROM AUTHOR]

A Ku‐band high‐power and high‐power‐added efficiency (PAE) high‐power amplifier (HPA) monolithic microwave‐integrated circuit (MMIC) is demonstrated with a 0.25 μm gallium nitride (GaN) high electron mobility transistor technology on a silicon carbide substrate. Measured continuous‐wave performances for the two‐stage HPA in‐fixture exhibit 17.5–18.3 W of output power (POUT) and 36.4–39.5% of PAE over the frequency range of 13.5–14.5 GHz. The fabricated two‐stage HPA MMIC with all matching networks is as small as 3.3 × 3.5 mm, generating an output power density of 1522 mW/mm2. [ABSTRACT FROM AUTHOR]

An X-band high-power and high power added efficiency (PAE), two-stage AlGaAs/InGaAs/GaAs psuedomorphic high electronic mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) power amplifier is presented. The amplifier is designed to fully match a 50 Omega input and output impedance. Based on a 0.35 mum gate-length power PHEMT technology, the MMIC is fabricated on a 3 mil thick wafer. Under an 8 V DC bias condition, the characteristics of 17.5 dB small-signal gain, 10 W continuous wave mode saturation output power of 42% PAE, and 12.6 W pulse saturation output power of 52.6% PAE at 9.4 GHz can be achieved. [ABSTRACT FROM PUBLISHER]

We propose a planar V-band beam-steering antenna based on a millimeter-wave (mm-wave) system-on-package technology using advanced thin-film technology on a silicon mother board. The thin-film substrate has the capability of integrated passive elements and flip-chip interconnection. Space-consuming components such as a microstrip Rotman lens and patch antennas are implemented on a low-loss, low-cost, and low-dielectric-constant material, benzocyclobutane. V-band monolithic microwave integrated circuits, a power amplifier, and a SP4T switch, are flip-chipped on the thin-film substrate while minimizing parasitic effects. The fabricated antenna module shows if-plane beam steering at four angles, plusmn6deg and plusmn20deg. The measured effective isotropic radiated power is in the range of 17.3-18 dBm. To our knowledge, this is the first demonstration of a planar mm-wave beam-steering antenna module on a thin-film substrate incorporating integrated terminating loads and flip-chip interconnections. [ABSTRACT FROM PUBLISHER]

A monolithic power amplifier (PA) operating in the 60 GHz band is presented. The circuit has been designed utilizing an advanced 0.25 SiGe-heterojunction bipolar transistor (HBT) technology, featuring npn transistors with and . A two-stage cascode architecture has been chosen for the implementation. Design techniques and optimization procedure are explained in detail. Measurements show a small signal gain of 18.8 dB and an output power of 14.5 dBm under 1 dB gain compression at 61 GHz. At this frequency, the saturated output power is 15.5 dBm and the peak power added efficiency (PAE) is 19.7%. To our knowledge, this is the highest PAE reported so far for a monolithic 61 GHz PA in SiGe-HBT technology. [ABSTRACT FROM PUBLISHER]

Design approach and test data for a two-octave bandwidth HPA developed using GaAs based multifunction self aligned gate metal semiconductor field effect transistor with multilevel plating monolithic microwave integrated circuit (MMIC) technology are presented. A low loss matching design technique was used in the development of a two-stage power amplifier. The broadband amplifier has exhibited 8 W power output and better than 16% PAE over the 2.0-8.0 GHz frequency range. To our knowledge, these results represent the state-of-the-art in output power for multi-octave S/C-band power MMIC amplifiers. [ABSTRACT FROM PUBLISHER]

This letter presents a CMOS outphasing class-D power amplifier (PA) with a Chireix combiner. Two voltage-mode class-D amplifiers used in the outphasing system were designed and implemented with a 0.18-mum CMOS process. By applying the Chireix combiner technique, drain efficiency of the outphasing PA for CDMA signals was improved from 38.6% to 48% while output power was increased from 14.5 to 15.4 dBm with an adjacent channel power ratio of -45 dBc. [ABSTRACT FROM PUBLISHER]

In this letter, the first 270-GHz millimeter-wave integrated circuit (MMIC) amplifier is demonstrated. Peak measured gain of 11.6-dB is measured for the three stage amplifier realized in coplanar waveguide. Further, positive S21 gain is measured to 340GHz making this the highest frequency MMIC amplifier reported to date. The high frequency circuit performance is enabled through a 35-nm InP high electron mobility transistor capable of extremely high frequency operation [ABSTRACT FROM PUBLISHER]

This work presents a case study of circuit-to-circuit substrate coupling between a 24-GHz power amplifier (PA) and a 23-GHz voltage-controlled oscillator (VCO) implemented in a commercially-available SiGe heterojunction bipolar transistor BiCMOS technology. The concurrent operation of these two circuits on the same silicon die results in -33dB of coupling between the PA's output and the VCO's output. Different testing configurations are considered to verify the dominant path of the coupling. These results highlight the potential challenges for silicon-based monolithic systems targeting microwave operational frequencies [ABSTRACT FROM PUBLISHER]

A compact 6.5-W AlGaAs/InGaAs/GaAs PHEMT monolithic microwave integrated circuit (MMIC) power amplifier (PA) for Ku-band applications is proposed. This two-stage amplifier with chip size of 8.554mm2 (3.64mmtimes2.35mm) is designed to fully match 50-Omega input and output impedance. Under 8V and 2000mA dc bias condition, the PA deliver 38.1dBm (6.5W) saturated output power, 10.5-dB small signal gain and peak power added efficiency of 24.6% from 13.6 to 14.2GHz. This MMIC also achieved the best power densities (760mW/mm2) at Ku band reported to date [ABSTRACT FROM PUBLISHER]

A 1.9-GHz CMOS power amplifier for polar transmitters was implemented with a 0.25-mum radio frequency CMOS process. All the matching components, including the input and output transformers, were fully integrated. The concepts of mode locking and adaptive load were applied in order to increase the efficiency and dynamic range of the amplifier. The amplifier achieved a drain efficiency of 33% at a maximum output power of 28dBm. The measured dynamic range was 34dB for a supply voltage that ranged from 0.7 to 3.3V. The measured improvement of the low power efficiency was 140% at an output power of 16dBm [ABSTRACT FROM PUBLISHER]

This letter presents a compact X-band high gain and high power four-stage AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) high power amplifier (PA). This amplifier is designed to fully match a 50-Omega input and output impedance. Based on 0.35-mum gate-length power PHEMT technology, this PA MMIC is fabricated on a 3-mil thick wafer. While operating under 8 V and 2700-mA dc bias condition, the characteristics of 40-dB small-signal gain, a 10-W continuous-wave saturation output power, and 33% power added efficiency at 9.7GHz can be achieved [ABSTRACT FROM PUBLISHER]

A fully matched, 2-W high linearity amplifier monolithic microwave integrated circuit, by using quasi-enhancement mode technology of AlGaAs/InGaAs/ GaAs pseudomorphic high electron mobility transistors, is demonstrated for wireless local area network applications. At Vgs= 0 V, Vds= 5 V, this power amplifier has achieved 14-dB small-signal gain, 33-dBm output power at 1-dB gain compression point, and 34.5-dBm saturated output power with 35% power added efficiency at 5.8 GHz. Moreover, high-linearity with 45.2-dBm third-order intercept point is also achieved [ABSTRACT FROM PUBLISHER]

Nonlinear distortion in the adjacent channels of an X-band amplifier driven by an ultra-wideband digitally-modulated carrier is analyzed. Statistical properties of the input signal with a complex power series-based behavioral model of the amplifier are used to calculate the output power spectrum. Comparisons are made between measured and predicted adjacent channel power rejection for the X-band monolithic microwave integrated circuit. [ABSTRACT FROM PUBLISHER]

In this letter, the design of a self-bias 1.8-mm AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor with a compact source capacitor for operation in Ku-band frequency is described. Based on the proposed device, a self-bias Ku-band 1-W two-stage power amplifier monolithic microwave integrated circuit (MMIC) is also demonstrated. Under a single bias condition of 8 V and 630 mA, the self-bias MMIC possesses 14.2-dB small-signal gain, 30.2-dBm output power at 1-dB gain compression point with 19.2% power added efficiency and 31.3-dBm saturated output power with 22.5% power added efficiency at 14GHz. With the performance comparable to the dual-bias MMIC counterpart, the proposed self-bias MMIC is more attractive to system designers on very small aperture terminal applications. [ABSTRACT FROM PUBLISHER]

This letter presents a two-stage quasi-class-E monolithic microwave integrated circuit power amplifier at 2.0GHz, which is based on field-plated GaN high electron mobility transistor technology. It consists of a driver stage and a power stage. The circuit schematic is described. The amplifier achieves an output power of 37.5dBm into a 50-Omega load, a power added efficiency (PAE) of 50%, and a gain of 18.2dB. A power density of 5.6W/mm is achieved [ABSTRACT FROM PUBLISHER]

A single stage class-E power amplifier in GaN high electron mobility transistor (HEMT) technology is reported. The circuit operates at 1.9 GHz. At 30-V drain bias, a power-added-efficiency (PAE) of 57% and a maximum output power of over 37dBm was achieved, corresponding to a power density of 5.25W/mm. At 40-V drain bias, an output power of 38.7dBm is achieved at 50% PAE corresponding to a power density of 7.4W/mm [ABSTRACT FROM PUBLISHER]

A power amplifier with a compact output matching network and a high average operating efficiency owing to its control circuits which enable the dynamic control of the quiescent current is presented. The microwave monolithic integrated circuit of the power amplifier was designed and implemented, in order to verify the output matching network and control circuits for the 1.88-GHz band. The power-added efficiency for an average power-usage of the proposed amplifier is almost twice that of conventional power amplifiers (3.74% versus 6.86%) in urban areas. [ABSTRACT FROM PUBLISHER]

A 2-W monolithic microwave integrated circuit power amplifier, operating between 3.3 and 3.8GHz by implementing AlGaAs/InGaAs/GaAs pseudomorphic high electronic mobility transistor for the applications of wideband code division multiple access, wireless local loop, and multichannel multipoint distribution service, is demonstrated. This two-stage amplifier is designed to fully match 50Ω input and output impedances. With a dual-bias configuration, the amplifier possesses the characteristics of 30.4dB small-signal gain and 34dBm 1-dB gain compression power with 37.1% power added efficiency. Moreover, with a single carrier output power level of 24dBm, high linearity with a 43.5-dBm third-order intercept point operating at 3.5GHz is also achieved. [ABSTRACT FROM PUBLISHER]