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This Letter demonstrates a 1500-V enhancement-mode (E-mode) GaN-based high electron mobility transistors (HEMTs) based on the recessed-free structure. The E-mode GaN-based HEMTs fabricated based on the ultrathin barrier epitaxial structure have a small gate interface traps density (Dit) of ∼1012 cm−2 eV−1, which can be attributed to the avoidance of AlGaN etching in the gate region. Meanwhile, a small threshold voltage (Vth) hysteresis of 19 mV and a small subthreshold swing of 101 mV/dec are achieved in the fabricated devices with a Vth around 1.91 V. A small Vth shift of 0.05 V was achieved under positive gate voltage stress, indicating that the devices have good Vth stability. Meanwhile, a high yield of more than 90% has been achieved on 6-in. wafer, which provides a good scheme for the commercialization of E-mode HEMTs. [ABSTRACT FROM AUTHOR]

Buffer related electron trapping and hot electron injection are responsible for Ron degradation in devices, but the effects of substrate termination are still uncertain. In this work, both positive and negative substrate bias are applied to investigate the different vertical trapping mechanisms in 650 V gallium nitride (GaN) power devices. Ron shows an instant and significant increase under vertical bias stress, and the magnitude of downward buffer electron trapping induced Ron increase is relatively larger than that induced by upward trapping. Additionally, the substrate floated and grounded GaN devices are also submitted to both off-state and semi-on-state stresses to investigate the effects of substrate termination on hot electron injection induced Ron increase. The intensity of the upward electron trapping increases faster with temperature resulting in a higher Ron increase than the downward situation. The hot electron effect is only obvious when the substrate is grounded, suggesting that the main injection destination is not in the buffer. The substrate floated device exhibits a lower Ron increase after both off-state and semi-on-state stresses at elevated temperatures. Substrate floated packages are suggested to ensure reliable dynamic performance of device, especially for high voltage application design. [ABSTRACT FROM AUTHOR]

In this work, we performed an investigation on the electrical characteristics of the interfaces of SiON/AlGaN and SiON/GaN by fabricating a partially gate-recessed metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) and a fully gate-recessed metal-insulator-semiconductor field-effect transistor (MIS-FET). The fabricated MIS-HEMT exhibits a smaller static on-resistance (Ron) of 12.7 Ω · mm, while the MIS-FET achieves the normally-off operation. As a result of over-etching in the gate trench, a higher trap state density of 2 × 1013 cm−2eV−1 at the SiON/GaN interface in comparison to SiON/AlGaN interface (8 × 1012 cm−2eV−1), leading to a more obvious degradation of subthreshold swing, was extracted after performing the high temperature IDS−VGS tests. In addition, compared with the MIS-FET, the traps distributed at the SiON/AlGaN interface are found to be located at a deeper energy level, which make the device more stress sensitive and can cause a greater threshold voltage (Vth) shift in the drain-bias stress measurement. The drain-bias stress at off-state increases the ionized trap density and makes the ionized traps unrecoverable within 1000 s in the MIS-HEMT. This work reveals the different properties of traps states at the SiON/AlGaN and SiON/GaN interfaces, and their effects on the device reliability. [ABSTRACT FROM AUTHOR]

In this work, gate-first technology was developed in an AlGaN/GaN high-electron-mobility transistor (HEMT) based on a high-quality in situ SiNx gate dielectric, targeting for high-stability power applications. The effect of the high-temperature annealing process on the Ni/SiNx gate stack was systematically investigated. Almost the same basic electrical performances were observed from gate-first and gate-last processed devices. Furthermore, the annealing-like effect on the gate-stack-located trap states was revealed in gate-first devices with obvious enhancement in threshold voltage stability, validating the high compatibility of the in situ SiNx technology with the gate-first GaN HEMT technology. [ABSTRACT FROM AUTHOR]

In this work, gate-first technology was developed in an AlGaN/GaN high-electron-mobility transistor (HEMT) based on a high-quality in situ SiNx gate dielectric, targeting for high-stability power applications. The effect of the high-temperature annealing process on the Ni/SiNx gate stack was systematically investigated. Almost the same basic electrical performances were observed from gate-first and gate-last processed devices. Furthermore, the annealing-like effect on the gate-stack-located trap states was revealed in gate-first devices with obvious enhancement in threshold voltage stability, validating the high compatibility of the in situ SiNx technology with the gate-first GaN HEMT technology. [ABSTRACT FROM AUTHOR]

The high cost of enzymatic glycolysis has seriously restricted the industrialization of lignocellulose-based sugar platform technology. Recovering and recycling cellulase can reduce the cost. Here, a thermo-responsive claw-type polysulfobetaine (PSPA) was constructed for hydrophobic grasping and efficient recycling of cellulase. Compared with the linear sulfobetaine homopolymer (PSPE), PSPA had more sensitive temperature response and strong cellulase recovery ability. PSPE-3 (M w =355.1 kDa) was added to the hydrolysis system of corncob residue (CCR) (50 °C), at 0.4 mass ratio of PSPE-3 to cellulase, and after enzymatic hydrolysis, 50 % of the cellulase was saved when cooling to 25 °C. But only 0.05 times PSPA-1 (M w =30.0 kDa) was added to the CCR system, and 70 % of the cellulase was saved when cooling to 25 °C. This work presents a claw shaped protein-capture agent, polysulfobetaine for capturing cellulase, which is of great significance to reduce the lignocellulosic hydrolysis cost, and efficiently separate enzyme proteins., (© 2025 Wiley-VCH GmbH.)