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Several experimental studies are conducted to explain the impact of the electrical properties and structural relaxation (SR) of the chalcogenide materials on the phase-change memory (PCM) cells. A high current or high voltage readout is shown to highly improve the resistance stability of the system.

The article presents and examines a new physical model, which is employed to demonstrate the impact of structural relaxation (SR) of the chalcogenide materials on the reliability of phase-change memory (PCM) cells. The defect annihilation dynamics is also shown to be highly affected by the electrical characteristics of the cells.

Several studies are conducted to explain the kinetics and mechanisms involved in the multilevel programming operation taking place in the programmable metallization cell (PMC) memory. A combination of the voltage-driven ion migration and electrochemical deposition is shown to lead to the discussed programming operation.

A thermal-dissolution model for reset transition in unipolar resistive-switching memory (RRAM) based on metal oxides is presented. The model based on Joule heating and dissolution of the conductive filament (CF) could be used to study the reduction of the reset current required for device application.

The characterization of the electrical and thermal conduction properties of the low-resistance state of the conductive filament (CF) and the physical mechanism for the switching from low- to high-resistance state of NiO-based resistive-switching memory (RRAM) devices is reported. The results from the evaluation of the thermal resistance of the CF and the activation energy for the dissolution mechanism could be used to design a physics-based numerical model for the reset operation based on CF thermal breakup.

A novel mixed-scaling approach for phase-change memory (PCM) cells is discussed. Findings reveal that the proposed approach is capable of providing the maximum decrease of programming current compatible with the reliability requirements deriving from the thermal crosstalk.

The programming and read performances of phase-change memory (PCM) cells are examined. The tradeoff between the needs of low programming current and low set resistance is addressed.

A new physics-based statistical model is described for random telegraph noise in Flash memories. This model has analyzed the oxide defects responsible for the random telegraph noise, allowing a spatial and energetic localization of the traps involved in the threshold-voltage instability process.

An analytical physical-based model for N/G parameters extraction and retention lifetime extrapolation is proposed. The impact of N/G parameters is addressed to explore the improvements of next generation phase-change memory (PCM) reliability by material optimization.

The drift and recovery transient of threshold voltage and resistance after reset are studied using time-resolved analysis. The recovery mechanism is described using the recombination of excess carriers in the amorphous chalcogenide, and the impact on the readout and verify operation of the memory device are also addressed.

A detailed analysis of data retention statistics in phase-change memories is presented and the experimental results are discussed with the aid of a Monte Carlo model for crystallization that allows a statistical approach. The physically based crystallization-percolation model can account for temperature dependence of data loss and its statistical spread, and in particular, this dependence is given by an increase of the crystallite radius, consistently with nucleation and growth theory.

A physically based model for data loss in phase-change memories, where chalcogenide crystallization is simulated by Monte Carlo approach, assuming homogenous nucleation in the amorphous-phase volume is presented. The Monte Carlo model allows a statistical analysis of data loss as a function of both geometry properties like amorphous thickness, contact area, amorphous volume and crystalline gain size, and electrical properties such as resistivity ratio between the crystalline and amorphous phase.

This paper proposes an extensive analysis of multiphase LC oscillators. N oscillators coupled in a ring topology can generate multiphase outputs. For their nature, these oscillators operate off-resonance and consequently their phase noise worsens at increasing coupling strength. Since the coupling transistors raise the total power consumption, the noise-power product degrades even more with respect to a stand-alone oscillator. On the other hand, at high coupling factors, component mismatches affect less the phase accuracy. Closed-form expressions for phase noise and phase accuracy are derived which are verified against circuit simulations. Index Terms--Coupled oscillators, image rejection, multiphase clock, phase accuracy, phase noise, quadrature oscillators, RF front-end, voltage-controlled oscillators.

This paper presents a complete analysis of the effect of mismatches in linear amplification with nonlinear components transmitters for orthogonal frequency-division multiplexing modulated signals. Gain and phase imbalances between the two amplification paths can severely degrade the linearity performance introducing both out-of-band spectral regrowth and in-band distortion. Analytical expressions are derived to readily evaluate the contribution of mismatches to the adjacent-channel power ratio and error vector magnitude of the transmitter. A direct evaluation of the matching requirements can thus be obtained from the linearity specifications, without the need of time-consuming simulations. Index Terms--Amplifier linearization, mobile communications, outphasing transmitter, RF power amplifier, wireless local area network (LAN).

Amplitude-to-phase-noise conversion due to varactors can severely limit the close-in phase noise performance in LC-tuned oscillators. This work proposes a rigorous analysis of this phenomenon, which highlights the fundamental limitations of single-ended tuned and differentially tuned diode varactor configurations. The back-to-back varactor topology is identified as a suitable solution to linearize the tank capacitance. The amplitude to phase noise conversion is greatly attenuated and the 1/[f.sup.3] phase noise is drastically reduced, without impairing the achievable tuning range. These results are validated through circuit simulations in an existing 0.35-[micro]m CMOS technology. Index Terms--Diode varactor, flicker noise up-conversion, phase noise, voltage controlled oscillator.

The solutions to improve the program/erase (P/E) window for nanocrystal (NC) memory cells are analyzed. Finally, the use of barrier engineering for interpoly and tunnel dielectric is considered, showing that promising solutions can be implemented to solve the compromise between efficient P/E and long data retention.

A detailed study of the program/erase (P/E) dynamics under uniform tunneling for nanocrystal (NC) memories is presented. The NC charging and discharging transients are evaluated during P/E opeations, to calculate the potential profile and the tunneling currents across the dielectric barriers.

Two-dimensional quantum-mechanical simulations of nonoverlapped MOS devices are presented and validated using comparison against experimental data. This approach can effectively improve the performance of decananometer MOSFETs.

This paper describes a method for speeding up the linear settling response of integer-N phase-locked loops. Extending the discrete-time model of the PLL first proposed by Gardner, simple design rules are derived which guarantee accurate frequency settling in few reference cycles. Simulations show that the proposed design technique improves up to six times the settling time of a conventional design. The stability margins and the noise behavior of the proposed system are analyzed. Index Terms--Discrete-time model, frequency synthesizer, GPRS, mixed-signal system, noise folding, phase-locked loop, phase noise, stability.

The defect generation statistics in thin gate oxides are studied and it is shown that these are not Poissonian, but correlated. The possible physical mechanisms responsible for correlated generation are also presented.

A percolation model is developed to study the impact of correlated generation of oxide defects on SILC and breakdown distributions. It is shown that correlated generation provides no significant degradation of the breakdown lifetime with respect to Poisson statistics.

A detailed investigation of the time evolution for the low-field resistance of R(sub off) and the threshold voltage V(sub th) in chalcogenide-based phase-change memory devices is presented. Both R(sub off) and V(sub th) increase and become stable with time and temperature, thus improving the cell readout window.