Search

Silicon photonics has garnered plenty of interests from both the academia and industry due to its high-speed transmission potential as well as sensing capability to complement silicon electronics. This has led to significant growth on the former, valuing at US$ 626.8M in 2017 and is expected to grow 3-fold to US$ 1,988.2M by 2023, based on data from MarketsandMarkets™. Silicon photonics’ huge potential has led to worldwide attention on fundamental research, photonic circuit designs and device fabrication technologies. However, as with silicon electronics in its early years, the silicon photonics industry today is extremely fragmented with various chip designs and layouts. Most silicon photonic devices fabricated are not able to reach the hand of consumers, due to a lack of information related to packaging design rules, components and processes. The importance of packaging technologies, which play a crucial role in turning photonic circuits and devices into the final product that end users can used in their daily lives, has been overlooked and understudied. This thesis aims to – 1. fill the missing gap by adapting existing electronics packaging techniques, 2. assess its scalability, 3. assess supply chain integration and finally 4. develop unique packaging approaches specifically for silicon photonics. The first section focused on high density packaging components and processes using University of California, Berkeley’s state-of-the-art silicon photonic MEMS optical switches as test devices. Three test vehicles were developed using (1) via-less ceramic and (2) spring-contacted electrical interposers for 2D integration and (3) through-glass-via electrical interposers for 2.5D heterogeneous integration. A high density (1) lidless fibre array and (2) a 2D optical interposer, which allows pitch-reduction of optical waveguides were also developed in this thesis. Together, these components demonstrated the world’s first silicon 2 photonic MEMS optical switch package and subsequently the highest density silicon photonic packaging components with 512 electrical I/Os and 272 optical I/Os. The second section then moved away from active optical coupling that was used in the former, investigating instead passive optical packaging concepts for the future. Two approaches were investigated - (1) grating-to-grating and (2) evanescent couplings. The former allows the development of pluggable packages, separating fibre coupling away from the device while the latter allows simultaneous optical and electrical packaging on a glass wafer in a single process. Lastly, the knowhow and concepts developed in this thesis were compiled into packaging design rules and subsequently introduced into H2020-MORPHIC, PIXAPP packaging training courses (as a trainer) and other packaging projects within the group.

In this paper, authors developed miniaturizeddouble side cooling packaging for SiC (silicon carbide) highpower inverter module using new material solutions towithstand high temperature condition over 220oC. Instead ofconventional thick wire bonding on the device, the flip chipbonding for high power source and gate interconnections aredeveloped. For the drain interconnection, copper clips areattached using high temperature endurable interconnectionmaterials. By utilizing these flip-chip structures, the powermodule with double side cooling design was enabled effectivelyfor the heat dissipation induced by high power switchingoperation. Through the thermal modeling and characterization, the power module's package thermal dissipation performancewas found to be enhanced by 2 times compared with theconventional single side cooling type power module. To copewith the increased maximum junction temperature limit tooperate wide band gap power devices the novel packagingmaterial and its process which can endure up to 220 oC weredeveloped also. Bi and Ag based high temperature solder wasapplied for the flip-chip bumping for SiC device on the DBC(direct bonded copper). The copper clip was applied on thedevice backside as drain interconnection to DBC also. Hightemperature endurable EMC (epoxy molding compound) andTIM (thermal interface material) were also evaluated. Thepackaging process was optimized and developed along with themodeling. Through the reliability assessment, we could showthe potential applicability of double side cooling power modulewith flip-chip and clip bonding design and it would be usefulfor the SiC and GaN based high power module and highjunction and environmental temperature endurableapplications for the near future.

Ag sintering has been widely studied as a lead-free die attach solution for power electronics. A soak time of a dozen minutes at the sintering temperature is necessary to establish strong bond strength by the conventional heating method. Chemical bonding can be achieved by various parameters associated with the metallurgical bond of the adjacent surfaces. In this study, attaching technology between Au coated Si die and Au coated Si substrate was developed by applying Ag sintering materials which can work at temperature up to 350°C. It was concentrated on finding so called "pressure-less sintering and pressure sintering" procedure in air and N2 environment. The sintering was performed in air or N2 at temperature range from 180°C to 280°C for 10 minutes to 3 hours. Highest shear strength was obtained at 200°C of sintering temperature bonded for 3 hours.

While leadframe has come a long way as a cost effective substrate, there is still limitation over its design rule. In this article, the authors have developed and put to test a SiC based PQFN using 70μm single metal layer substrates, allowing further miniaturization and complex design of PQFN. New high temperature EMC with a Tg of 241°C and lead free bismuth silver solder are adopted. Reliability tests and RDS,on results showed that the materials adopted in the development does not degrade the MOSFET's functionality and all samples passed reliability and power cycling tests.

Lead-free solder alloys for high temperature applications is required to meet increasing demands for reliable replacements for lead-based alloys. Especially, high temperature solder is required for bonding in power electronics packages where first bonding on a lead-frame is performed at a temperature of about 330 °C. In this study, the SiC based TO-220 power package was developed by applying high temperature endurable material sets which can endure over 220°C device junction temperature. The interfacial reaction and reliability of SiC die attachment on and Ni plated lead frames using Zn-Al based solder was investigated. Zn-Al-Ge solder alloy showed good temperature tolerance after temperature cycle (TC), high temperature storage test whereas Zn-Al-Ge-Mg solder alloy showed failures after TC test.

The SiC based high power 3 phase inverter module with double side cooling structure was developed. By applying flipchip bonding of SiC based high power DMOSFET device on DBC substrate, the source and gate bonding could be achieved. The drain interconnection was done by copper clip attach. The developed structure can provide the flat structure for both top and bottom surfaces, which can be effectively utilized for double side cooling design for high power heat dissipation. In addition to power module design with double side cooling capability, the high temperature endurable material set which can endure over 220°C device junction temperature such as high temperature interconnection, encapsulation and TIM (thermal interface materials) are developed and identified. Through the thermal, mechanical, electrical modeling & characterization and the reliability test for the developed functional test vehicles, the author could demonstrate the possibility of flip-chip based double side cooling capable high power module structure which can be utilized to high power and high temperature endurable applications for future wide band-gap device such as SiC and GaN based inverter modules.

There are five types of die attach materials with high melting point (>250°C) are evaluated in this study, these materials are high lead (Pb95.5Sn2Ag2.5) solder paste, Gold Tin (Au80Sn20) solder paste, pressure-less Silver (Ag) sintered paste, pressure type silver (P-Ag) sintered paste and Gold Germanium (Au88Ge12) perform solder. The reliability tests included high temperature storage (HTS) at 250°C/500hours with N2 purge and temperature cycling for 500cycles at −65°C to 150°C. Majorities of the test vehicles have good shear mode (Silicon die crack) after reliability tests. Only mix modes failure on the pressure-less Ag sintered die attach materials is observed at HTS 250°C, after 500hours with shear strength of 17.9Mpa. It is crucial to understand the conditions of the interfaces between these high temperature die attach materials to the devices and substrate after reliability tests. The cross sections samples are further studied on the interface between the die attach material and substrate (ENEPIG surface) with SEM and EDX analysis. It is interesting to found out that the pressure type Ag sintered has denser bulk materials compare to pressure type Ag sintered materials, and this provides an excellent heat transfer and low electrical resistance at the interface. After HTS for 500hours, the Sn rich phase of AuSn solder has the tendency to form at the ENEPIG site. High lead solder form a layer of Ni/Pb/Sn at the ENEPIG surface and where AuGe solder form a layer of Ni/Ge at the interface to ENEPIG substrate. A details study on the materials interface to the die and ENEPIG substrate surface are carried out; and out of these high temperature die attach materials, which will be more preferable in term of process ability and price is discussed.

While the advantages of high temperature electronics in the form of hermetic ceramic packaging are numerous, their deployments are being limited by the maximum environmental pressure. Literature [1] has shown that to withstand 30kpsi pressure for instance, a flat ceramic lid of at least 3mm will be required for a cavity size of 10.16mm × 10.16mm. Lid thickness will have to increase if the cavity size is increased. However, by filling the cavity with high temperature endurable material, thickness requirement can be eliminated from consideration, maintaining low package profile [2]. The approach has been demonstrated through a timer / temperature sensor circuitry embedded in a 31.75mm × 10.92mm cavity and successfully passed a combined HPHT of 30kpsi and 300°C until the end of targeted 200 hours.

Integrated Circuited devices fabricated on SiC instead of Si allows higher operating temperatures for the future automotive, aerospace, and green and renewable energy industry. With higher temperature interfaces and contacts between the chip and package, new packaging interconnection materials able to sustain high temperature operations need to be explored. This work demonstrates the assembly of a dual-side cooled high power 3-phase inverter module that was 32mm × 30mm with 6 SiC DMOSFET attached by flip chip technology. Rheological modeling using FVM (Finite Volume Method) based simulation was carried out and validated for the dispense pattern of silver sintering material used in high power electronics flip chip attach. Further details of assembly process flow, assembly challenges, reliability assessment and future works will be discussed in the full manuscript.

For downhole drilling applications, packages will have to endure extremely harsh conditions, which can easily reach a temperature of 300°C. At such high temperatures, the commonly adopted solder materials are lead-based as they are more readily available in paste and solder ball forms. While multiple studies have been performed on eutectic goldgermanium solder and its reliability at high temperature, little work has been done on the processing and assembly of the material into a flip chip package. This paper aims to study the feasibility of gold-germanium solder assembly through laser jetting process optimization. It is observed that Ge phase coarsening does not occur with laser jetting, compare to reflow process.

Mechanical and thermal analyses are performed for a power module with target junction temperature of 220°C. The initial design of the package consists of six silicon carbide dies with electrical connections traditionally made by wires being replaced by copper clips and flip chip joints. From mechanical simulations, it is found that compliance of the copper clips affect the stress level at the attachment layer. Several clip designs were investigated and results shows that the design with the greatest flexibility will result in the lowest stress at the attachment layer. For properties of the molding compound, the higher the coefficient of thermal expansion (CTE), the larger the attachment stress whereas for molding compound modulus, the attachment stress can increase or decrease, depending on the corresponding CTE. From thermal simulations, it is found that voids at the attachment layer marginally affect the thermal characteristics while thickness and properties of the thermal interface materials (TIM) greatly affect the thermal performance. The findings suggest that when a metallic attachment material is chosen, dimensional parameters and material choices of the attachment material is less critical to the thermal performance. From power cycling analyses, it is observed that the rise in temperature is largely concentrated around the dies which are powered-up.

As oil and gas industries ventured further and deeper into the earth or ocean in search for new reservoirs, the requirements of depth, pressure and temperature are ever expanding. Conventionally, ceramic based hermetic sealed packaging is used for high temperature endurable package. However, for the case of highly pressurized application, the stress on the package is substantial and the hermetically sealed ceramic package cannot survive under a high pressure up to 30kpsi. To overcome this limitation, the authors are proposing to fill high temperature and high pressure endurable protective materials inside of ceramic substrate cavity to absorb the package internal stress caused by the external high pressure loading. The reliability of the package has been successfully demonstrated under combined 30kpsi isostatic pressure and 300°C temperature (HPHT) aging condition for 500 hours as well as thermal cycling condition for 500 cycles.