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The triple heterojunction tunnel field-effect transistor (TFET) has been originally proposed to resolve the TFET’s low ON-current challenge. The carrier transport in such devices is complicated due to the presence of quantum wells and strong scattering. Hence, the full-band atomistic nonequilibrium Green’s function (NEGF) approach, including scattering, is required to model the carrier transport accurately. However, such simulations for devices with realistic dimensions are computationally unfeasible. To mitigate this issue, we have employed the empirical tight-binding mode-space approximation to simulate the triple heterojunction TFETs with the body thickness up to 12 nm. The triple heterojunction TFET design is optimized using the model to achieve a sub-60-mV/decade transfer characteristic under realistic scattering conditions.

Being fundamentally limited to a current–voltage steepness of 60mV/dec, MOSFETs struggle to operate below 0.6 V. Further reduction in ${V}_{\text {DD}}$ and, consequently, power consumption can be achieved with novel devices, such as tunneling transistors (TFETs) that can overcome this limitation. TFETs, however, face challenges with low ON-current leading to slow performance. TFETs made from III-nitride heterostructures are quite promising in this regard. The lattice mismatch induces a piezoelectric polarization field in a nitride heterojunction that can boost the ON-current. However, it is shown here that the carrier thermalization at the heterointerface degrades the subthreshold characteristics. Therefore, a good design should minimize the number of confined quantum well (QW) states at the heterointerface so as not to degrade the subthreshold characteristics while maintaining the lattice mismatch induced polarization to boost the ON-current. We show here that an InAlN QW on an InGaN substrate alloy engineered TFET design is promising to fulfill these requirements. Proper engineering of the alloy mole fractions and the width of the well can eliminate (or at least minimize) the undesired thermalization effects and, at the same time, provide a lattice mismatch to induce a piezoelectric field for boosting the ON-current. We have used a suitable atomistic quantum transport model to simulate these devices. The model accounts for the different mechanisms that are involved, and captures realistic scattering thermalization effects. This model has been benchmarked in our earlier work with experimental measurements of nitride tunneling heterojunction diodes and is used here to optimize the alloy engineered nitride TFET.

Triple heterojunction (THJ) tunneling field-effect transistors (TFETs) have been proposed to resolve the low ON-current challenge of TFETs. However, the design space for THJ-TFETs is limited by fabrication challenges with respect to device dimensions and material interfaces. This work shows that the original THJ-TFET design with 12-nm body thickness has poor performance because its subthreshold swing (SS) is 50 mV/decade and the ON-current is only $6~\mu A/\mu m$ . To improve the performance, the doping profile of THJ-TFET is engineered to boost the resonant tunneling efficiency. The proposed THJ-TFET design shows an SS of 40 mV/decade over four orders of drain current and an ON-current of $325~\mu A/\mu m$ with ${V}_{\textit {GS}} =0.3$ V. Since THJ-TFETs have multiple quantum wells and material interfaces in the tunneling junction, quantum transport simulations in such devices are complicated. State-of-the-art mode-space quantum transport simulation, including the effect of thermalization and scattering, is employed in this work to optimize THJ-TFET design.

In this work, vertical tunnel field-effect transistors (v-TFETs) based on vertically stacked heretojunctions from 2D transition metal dichalcogenide (TMD) materials are studied by atomistic quantum transport simulations. The switching mechanism of v-TFET is found to be different from previous predictions. As a consequence of this switching mechanism, the extension region, where the materials are not stacked over is found to be critical for turning off the v-TFET. This extension region makes the scaling of v-TFETs challenging. In addition, due to the presence of both positive and negative charges inside the channel, v-TFETs also exhibit negative capacitance. As a result, v-TFETs have good energy-delay products and are one of the promising candidates for low power applications., Comment: didn't reach to co-author agreement

Low-dimensional material systems provide a unique set of properties useful for solid-state devices. The building block of these devices is the p-n junction. In this paper, we present a dramatic difference in the electrostatics of p-n junctions in lower dimensional systems, as against the well understood three dimensional (3-D) systems. Reducing the dimensionality increases the depletion width significantly. We propose a novel method to derive analytic equations in 2-D and 1-D that considers the impact of neutral regions. The analytical results show an excellent match with both the experimental measurements and numerical simulations. The square root dependence of the depletion width on the ratio of dielectric constant and doping in 3-D changes to a linear and exponential dependence for 2-D and 1-D, respectively. This higher sensitivity of 1-D p-n junctions to its control parameters can be used toward new sensors. Utilizing the unconventional electrostatics of these low-dimensional junctions for sensing and switching applications has been discussed and a novel sensor is proposed.

Universality of short-channel effects on saturation current of MOSFETs has been demonstrated. The modulations of carrier injection and transmission rate have been integrated into universal functions. The proposed form has been verified by a large set of quantum transport simulations, where relevant ranges of channel thickness, gate length, and scattering mechanisms are covered. As an application, nonlinear current scaling by channel width is presented for ultrascaled devices.

Large-area two-dimensional (2D) heterojunctions are promising building blocks of 2D circuits. Understanding their intriguing electrostatics is pivotal but largely hindered by the lack of direct observations. Here graphene–WS2 heterojunctions are prepared over large areas using a seedless ambient-pressure chemical vapor deposition technique. Kelvin probe force microscopy, photoluminescence spectroscopy, and scanning tunneling microscopy characterize the doping in graphene–WS2 heterojunctions as-grown on sapphire and transferred to SiO2 with and without thermal annealing. Both p–n and n–n junctions are observed, and a flat-band condition (zero Schottky barrier height) is found for lightly n-doped WS2, promising low-resistance ohmic contacts. This indicates a more favorable band alignment for graphene–WS2 than has been predicted, likely explaining the low barriers observed in transport experiments on similar heterojunctions. Electrostatic modeling demonstrates that the large depletion width of the graphene–W...

In this work, density functional tight binding (DFTB) calculations are used to study the characteristics of full gate stack TiN/HfO 2 /SiO 2 /Si and possible effective work-function (EWF) tuning options. First, the DFTB parameterization method to produce both electronic and repulsion information for all atom pairs is introduced briefly. Since the simulated gate-stack structure has thousands of atoms, conventional relaxation methods are computationally intensive. Hence a method to relax and passivate the material interfaces is introduced. Next, the impact of aluminum substitution is studied. It is shown that the change in EWF strongly depends on the atom which is substituting Aluminum; e.g. Aluminum substitutions of Hf and Ti show opposite impact on EWF. Finally, the origin of this different behavior is discussed.

In this paper, electrostatically configurable 2D tungsten diselenide (WSe

Deterministic Boltzmann-transport solver has been integrated in performance analysis of logic cells. Employing universal-swing-factor (USF) approach, our setup accurately entails quasi-ballistic transport effects. The injection current and carrier mean free path (MFP) have been extracted for various channel dimensions and interface qualities. The resulting database is used to study candidate architecture for logic nodes. In particular, performance of ring oscillator (RO) with tapered FinFET is presented. For a given junction profile and contact-poly-pitch (CPP), the optimum gate-length (Lg), spacer thickness and contact-CD (CCD) are evaluated. The feasible gain by lowering the spacer k-value and contact resistance is also reported.

Self-assembled quantum dots (QDs) are highly strained heterostructures. the lattice strain significantly modifies the electronic and optical properties of these devices. A universal behavior is observed in atomistic strain simulations (in terms of both strain magnitude and profile) of QDs with different shapes and materials. In this paper, this universal behavior is investigated by atomistic as well as analytic continuum models. Atomistic strain simulations are very accurate but computationally expensive. On the other hand, analytic continuum solutions are based on assumptions that significantly reduce the accuracy of the strain calculations, but are very fast. Both techniques indicate that the strain depends on the aspect ratio (AR) of the QDs, and not on the individual dimensions. Thus simple closed form equations are introduced which directly provide the atomistic strain values inside the QD as a function of the AR and the material parameters. Moreover, the conduction and valence band edges $E_{C/V}$ and their effective masses $m^*_{C/V}$ of the QDs are dictated by the strain and AR consequently. The universal dependence of atomistic strain on the AR is useful in many ways; Not only does it reduce the computational cost of atomistic simulations significantly, but it also provides information about the optical transitions of QDs given the knowledge of $E_{C/V}$ and $m^*_{C/V}$ from AR. Finally, these expressions are used to calculate optical transition wavelengths in InAs/GaAs QDs and the results agree well with experimental measurements and atomistic simulations.

In recent years, alloy electronic structure calculations based on supercell Brillouin zone unfolding have become popular. There are a number of formulations of the method which on the surface might appear different. Here we show that a discrete real-space description, based on discrete Fourier transforms, is fully general. Furthermore, such an approach can more easily show the effects of alloy scattering. We present such a method for treating the random alloy problem. This treatment features straightforward mathematics and a transparent physical interpretation of the calculated effective (i.e., approximate) energy bands.

The main promise of tunnel FETs (TFETs) is to enable supply voltage ($V_{DD}$) scaling in conjunction with dimension scaling of transistors to reduce power consumption. However, reducing $V_{DD}$ and channel length ($L_{ch}$) typically deteriorates the ON- and OFF-state performance of TFETs, respectively. Accordingly, there is not yet any report of a high perfor]mance TFET with both low V$_{DD}$ ($\sim$0.2V) and small $L_{ch}$ ($\sim$6nm). In this work, it is shown that scaling TFETs in general requires scaling down the bandgap $E_g$ and scaling up the effective mass $m^*$ for high performance. Quantitatively, a channel material with an optimized bandgap ($E_g\sim1.2qV_{DD} [eV]$) and an engineered effective mass ($m*^{-1}\sim40 V_{DD}^{2.5} [m_0^{-1}]$) makes both $V_{DD}$ and $L_{ch}$ scaling feasible with the scaling rule of $L_{ch}/V_{DD}=30~nm/V$ for $L_{ch}$ from 15nm to 6nm and corresponding $V_{DD}$ from 0.5V to 0.2V.

In this work, the performance of Tunnel Field-Effect Transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of TFETs is their low ON-currents. 2D material based TFETs can have tight gate control and high electric fields at the tunnel junction, and can in principle generate high ON-currents along with a sub-threshold swing smaller than 60 mV/dec. Our simulations reveal that high performance TMD TFETs, not only require good gate control, but also rely on the choice of the right channel material with optimum band gap, effective mass and source/drain doping level. Unlike previous works, a full band atomistic tight binding method is used self-consistently with 3D Poisson equation to simulate ballistic quantum transport in these devices. The effect of the choice of TMD material on the performance of the device and its transfer characteristics are discussed. Moreover, the criteria for high ON-currents are explained with a simple analytic model, showing the related fundamental factors. Finally, the subthreshold swing and energy-delay of these TFETs are compared with conventional CMOS devices., 7 pages, 8 figures. The revised version is uploaded

The 2-D material-based TFETs are among the most promising candidates for low-power electronics applications since they offer ultimate gate control and high-current drives that are achievable through small tunneling distances ( $\Lambda $ ) during the device operation. The ideal device is characterized by a minimized $\Lambda $ . However, devices with the thinnest possible body do not necessarily provide the best performance. For example, reducing the channel thickness ( ${T}_{\text {ch}}$ ) increases the depletion width in the source, which can be a significant part of the total $\Lambda $ . Hence, it is important to determine the optimum ${T}_{\text {ch}}$ for each channel material individually. In this paper, we study the optimum ${T}_{\text {ch}}$ for three channel materials: WSe2, black phosphorus, and InAs using full-band self-consistent quantum transport simulations. To identify the ideal ${T}_{\text {ch}}$ for each material at a specific doping density, a new analytic model is proposed and benchmarked against the numerical simulations.

Artificial semiconductors with manufactured band structures have opened up many new applications in the field of optoelectronics. The emerging two-dimensional (2D) semiconductor materials, transition metal dichalcogenides (TMDs), cover a large range of bandgaps and have shown potential in high performance device applications. Interestingly, the ultrathin body and anisotropic material properties of the layered TMDs allow a wide range modification of their band structures by electric field, which is obviously desirable for many nanoelectronic and nanophotonic applications. Here, we demonstrate a continuous bandgap tuning in bilayer MoS2 using a dual-gated field-effect transistor (FET) and photoluminescence (PL) spectroscopy. Density functional theory (DFT) is employed to calculate the field dependent band structures, attributing the widely tunable bandgap to an interlayer direct bandgap transition. This unique electric field controlled spontaneous bandgap modulation approaching the limit of semiconductor-to...

Traditional thinking assumes that a light effective mass ( $m^*$ ), high mobility material will result in better transistor characteristics. However, sub-12-nm metal-oxide-semiconductor field effect transistors (MOSFETs) with light $m^*$ may underperform compared to standard Si, as a result of source to drain (S/D) tunneling. An optimum heavier mass can decrease tunneling leakage current, and at the same time, improve gate to channel capacitance because of an increased quantum capacitance ( $C_q$ ). A single band effective mass model has been used to provide the performance trends independent of material, orientation and strain. This paper provides guidelines for achieving optimum $m^*$ for sub-12-nm nanowire down to channel length of 3 nm. Optimum $m^*$ are found to range between 0.2–1.0 $m_0$ and more interestingly, these masses can be engineered within Si for both p-type and n-type MOSFETs. $m^*$ is no longer a material constant, but a geometry and strain dependent property of the channel material.

The concept and simulated device characteristics of tunneling field-effect transistors (TFETs) based on III-nitride heterojunctions are presented for the first time. Through polarization engineering, interband tunneling can become significant in III-nitride heterojunctions, leading to the potential for a viable TFET technology. Two prototype device designs, inline and sidewall-gated TFETs, are discussed. Polarization-assisted p-type doping is used in the source region to mitigate the effect of the deep Mg acceptor level in p-type GaN. Simulations indicate that TFETs based on III-nitride heterojunctions can be expected to achieve ON/ OFF ratios of $10^{6}$ or more, with switching slopes well below 60 mV/decade, ON-current densities approaching 100 $\mu \text{A}/\mu \text{m}$ , and energy delay products as low as 67 aJ-ps/ $\mu \text{m}$ .

Atomistic quantum transport simulation of realistically large devices is computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost but good MS basis is usually very hard to obtain for atomistic full-band models. In this work, a robust and parallel algorithm is developed to optimize the MS basis for atomistic nanowires. This enables tight binding non-equilibrium Green's function (NEGF) simulation of nanowire MOSFET with realistic cross section of $\rm 10nm\times10nm$ using a small computer cluster. This approach is applied to compare the performance of InGaAs and Si nanowire nMOSFETs with various channel lengths and cross sections. Simulation results with full-band accuracy indicate that InGaAs nanowire nMOSFETs have no drive current advantage over their Si counterparts for cross sections up to about $\rm 10nm\times10nm$., 8 pages (double column), 13 figures, 1 table

In this article, a novel two-path model is proposed to quantitatively explain sub-threshold characteristics of back-gated Schottky barrier FETs (SB-FETs) from 2D channel materials. The model integrates the “conventional” model for SB-FETs with the phenomenon of contact gating – an effect that significantly affects the carrier injection from the source electrode in back-gated field effect transistors. The two-path model is validated by a careful comparison with experimental characteristics obtained from a large number of back-gated WSe2 devices with various channel thicknesses. Our findings are believed to be of critical importance for the quantitative analysis of many three-terminal devices with ultrathin body channels.

Negative Differential Resistance (NDR) has recently been observed in van der Waals heterojunctions made of two-dimensional (2D) layered materials, evidencing Esaki tunneling diodes in vertical structures [1-5]. However, the lack of fundamental understanding on vertical tunneling mechanisms, interface quality, band off-set, etc. hinders their practical applications. On the other hand, extensive knowledge has been obtained on conventional lateral tunneling junctions [6]. Experimentally, although a number of sub-60mV/dec tunneling field-effect transistors (TFETs) have been demonstrated [7], many did not show a steep slope due to the wrong material choices, trap charges, and non-optimized device structures. In this paper, we focus on WSe 2 , a 2D transition metal dichalcogenide (TMD) layered material whose bandgap is a function of its layer number. We demonstrate the first gate tunable Esaki diode with NDR in a WSe 2 homojunction by combing strong n-type doping from a SiNx passivation layer [8] and a top gate controlled p-type region. Simulations are presented to compare with experimental measurements and to provide guidance to further improve tunneling efficiency.

Large-area two-dimensional (2D) heterojunctions are promising building blocks of 2D circuits. Understanding their intriguing electrostatics is pivotal but largely hindered by the lack of direct observations. Here graphene-WS

Steep transistors are crucial in lowering power consumption of the integrated circuits. However, the difficulties in achieving steepness beyond the Boltzmann limit experimentally have hindered the fundamental challenges in application of these devices in integrated circuits. From a sensitivity perspective, an ideal switch should have a high sensitivity to the gate voltage and lower sensitivity to the device design parameters like oxide and body thicknesses. In this work, conventional tunnel-FET (TFET) and negative capacitance FET are shown to suffer from high sensitivity to device design parameters using full-band atomistic quantum transport simulations and analytical analysis. Although Dielectric Engineered (DE-) TFETs based on 2D materials show smaller sensitivity compared with the conventional TFETs, they have leakage issue. To mitigate this challenge, a novel DE-TFET design has been proposed and studied.

In this paper, electrostatically configurable 2D tungsten diselenide (WSe2 ) electronic devices are demonstrated. Utilizing a novel triple-gate design, a WSe2 device is able to operate as a tunneling field-effect transistor (TFET), a metal-oxide-semiconductor field-effect transistor (MOSFET) as well as a diode, by electrostatically tuning the channel doping to the desired profile. The implementation of scaled gate dielectric and gate electrode spacing enables higher band-to-band tunneling transmission with the best observed subthreshold swing (SS) among all reported homojunction TFETs on 2D materials. Self-consistent full-band atomistic quantum transport simulations quantitatively agree with electrical measurements of both the MOSFET and TFET and suggest that scaling gate oxide below 3 nm is necessary to achieve sub-60 mV dec-1 SS, while further improvement can be obtained by optimizing the spacers. Diode operation is also demonstrated with the best ideality factor of 1.5, owing to the enhanced electrostatic control compared to previous reports. This research sheds light on the potential of utilizing electrostatic doping scheme for low-power electronics and opens a path toward novel designs of field programmable mixed analog/digital circuitry for reconfigurable computing.

As semiconductor devices scale to new dimensions, the materials and designs become more dependent on atomic details. NEMO5 is a nanoelectronics modeling package designed for comprehending the critical multi-scale, multi-physics phenomena through efficient computational approaches and quantitatively modeling new generations of nanoelectronic devices as well as predicting novel device architectures and phenomena. This article seeks to provide updates on the current status of the tool and new functionality, including advances in quantum transport simulations and with materials such as metals, topological insulators, and piezoelectrics., 10 pages, 12 figures

The downscaling of electronic devices has reached a regime where quantum and atomistic effects govern the active part of the device while semi-classical physics still plays a very important role for the remaining parts. A multiscale transport simulation approach is therefore developed in NEMO5 tool to address this issue. In this approach, nonequilibrium Green's function (NEGF) equations with atomistic tight-binding Hamiltonian are employed to calculate the ballistic current through the tiny central device, while drift-diffusion (DD) equations (with quantum charge density) are used to model the surroundings where scattering and relaxation dominate. These two sets of equations are coupled through quasi-Fermi levels, which are determined by continuity equation. With Poisson equation solved self-consistently, device characteristics such as the I-V curves are obtained. Using this approach we demonstrate two examples. For the first example, we consider a recently fabricated nitride tunneling diode that consists of a GaN-InNGaN heterojunction. The band-to-band tunneling through the strained heterojunction is accurately modeled by the NEGF method while the serial resistance of the leads is accounted for by potential drop from the contacts obtained by solving the DD equation. Further, the contact resistance is taken into account by computing the tunneling through the Schottky barrier (also via NEGF method). For the second example, we simulate a two-dimensional III–V MOSFET, featuring wrapped-around leads. The channel part of the transistor is modeled by the NEGF method to capture source-to-drain tunneling leakage, which is critical for short-channel devices scaled to sub-10 nm. The (relatively) long leads, are again assigned to the DD solver to calculate the non-trivial potential drop from the external contacts. We benchmark the simulation results with the experimental measurements and then optimize the device design parameters.

Future ultra-scaled logic and low-power systems require fundamental advances in semiconductor device technology. Due to power constraints, device concepts capable of achieving switching slopes (SS) steeper than 60 mV/decade are essential if scaling of conventional computational architectures is to continue. Likewise, ultra low power systems also benefit from devices capable of maintaining performance under low-voltage operation. Towards this end, tunneling field effect transistors (TFETs) are one promising alternative. While much work has been devoted to realizing TFETs in Si, Ge, and narrow-gap III–V materials, the use of III-N heterostructures and the exploitation of polarization engineering offers some unique opportunities. From physics-based simulations, performance of GaN/InGaN/GaN heterostructure TFETs appear capable of delivering average SS approaching 20 mV/decade over 4 decades of drain current, and on-current densities exceeding 100 µA/µm in aggressively scaled nanowire configurations. Experimental progress towards realizing III-N based TFETs includes demonstration of GaN/InGaN/GaN backward tunnel diodes by both MOCVD and MBE, and nanowires grown selectively by MBE and used as the basis for device fabrication.

2D transition metal dichalcogenides (TMDs) have attracted a lot of attention recently for energy-efficient tunneling-field-effect transistor (TFET) applications due to their excellent gate control resulting from their atomically thin dimensions. However, most TMDs have bandgaps (Eg) and effective masses (m*) outside the optimum range needed for high performance. It is shown here that the newly discovered 2D material, few-layer phosphorene, has several properties ideally suited for TFET applications: 1) direct Eg in the optimum range ~1.0–0.4 eV, 2) light transport m* (0.15 m0), 3) anisotropic m* which increases the density of states near the band edges and 4) a high mobility. These properties combine to provide phosphorene TFET outstanding ION ~ 1 mA/um, ON/OFF ratio ~ 106 for a 15 nm channel and 0.5 V supply voltage, thereby significantly outperforming the best TMD-TFETs and CMOS in many aspects such as ON/OFF current ratio and energy-delay products. Furthermore, phosphorene TFETS can scale down to 6 nm channel length and 0.2 V supply voltage within acceptable range in deterioration of the performance metrics. Full-band atomistic quantum transport simulations establish phosphorene TFETs as serious candidates for energy-efficient and scalable replacements of MOSFETs.

Future VLSI devices will require low CV dd 2/2 switching energy, large on-currents (I on ), and small off-currents (I off ). Low switching energy requires a low supply voltage V dd , yet reducing V dd typically increases /off and reduces the I on /I off ratio. Though tunnel FETs (TFETs) have steep subthreshold swings and can operate at a low V dd , yet their I on is limited by low tunneling probability. Even with a GaSb/InAs heterojunction (HJ), given a 2nm-thick-channel (001)-confined TFET, [100] transport, and assuming V dd =0.3V and I oFF =10−3A/m, the peak tunneling probability is on is only 24 A/m (fig. 1b) [1]. This low I on will result in large CV dd /I delay and slow logic operation. Techniques to increase /on include graded AlSb/AlGaSb source HJs [2,3] and tunneling resonant states [4]. We had previously shown that tunneling probability is increased using (11 0) confinement and channel heterojunctions [1], the latter increasing the junction built-in potential and junction field, hence reducing the tunneling distance. Here we propose a triple heterojunction TFET combining these techniques. The triple-HJ design further thins the tunnel barrier to 1.2 nm, and creates two closely aligned resonant states 57meV apart. The tunneling probability is very high, >50% over a 120meV range, and the ballistic I on is extremely high, 800A/m at 30nm Lg and 475 A/m at 15nm Lg, both with I off =10−3 A/m and V dd =0.3 V. Compared to a (001) GaSb/InAs TFET, the triple-HJ design increases the ballistic /on by 26:1 at 30nm L g and 19:1 at 15nm L g . The designs may, however, suffer from increased phonon-assisted tunneling.

Scaling transistors’ dimensions has been the thrust for the semiconductor industry in the last four decades. However, scaling channel lengths beyond 10 nm has become exceptionally challenging due to the direct tunneling between source and drain which degrades gate control, switching functionality, and worsens power dissipation. Fortunately, the emergence of novel classes of materials with exotic properties in recent times has opened up new avenues in device design. Here, we show that by using channel materials with an anisotropic effective mass, the channel can be scaled down to 1 nm and still provide an excellent switching performance in phosphorene nanoribbon MOSFETs. To solve power consumption challenge besides dimension scaling in conventional transistors, a novel tunnel transistor is proposed which takes advantage of anisotropic mass in both ON- and OFF-state of the operation. Full-band atomistic quantum transport simulations of phosphorene nanoribbon MOSFETs and TFETs based on the new design have been performed as a proof.

Thickness engineered tunneling field-effect transistors (TE-TFET) as a high performance ultra-scaled steep transistor is proposed. This device exploits a specific property of 2D materials: layer thickness dependent energy bandgap (Eg). Unlike the conventional hetero-junction TFETs, TE-TFET uses spatially varying layer thickness to form a hetero-junction. This offers advantages by avoiding the interface states and lattice mismatch problems. Furthermore, it boosts the ON-current to 1280$\mu A/\mu m$ for 15nm channel length. TE-TFET shows a channel length scalability down to 9nm with constant field scaling $E = V_{DD}/L_{ch}= 30V/nm$. Providing a higher ON current, phosphorene TE-TFET outperforms the homojunction phosphorene TFET and the TMD TFET in terms of extrinsic energy-delay product. In this work, the operation principles of TE-TFET and its performance sensitivity to the design parameters are investigated by the means of full-band atomistic quantum transport simulation., Comment: 6 figures

Tunneling field-effect transistors (TFETs) based on 2D materials are promising steep sub-threshold swing (SS) devices due to their tight gate control. There are two major methods to create the tunnel junction in these 2D TFETs: electrical and chemical doping. In this work, design guidelines for both electrically and chemically doped 2D TFETs are provided using full band atomistic quantum transport simulations in conjunction with analytic modeling. Moreover, several 2D TFETs' performance boosters such as strain, source doping, and equivalent oxide thickness (EOT) are studied. Later on, these performance boosters are analyzed within a novel figure-of-merit plot (i.e. constant ON-current plot)., Comment: 5 pages, 8 figures

Artificial semiconductors with manufactured band structures have opened up many new applications in the field of optoelectronics. The emerging two-dimensional (2D) semiconductor materials, transition metal dichalcogenides (TMDs), cover a large range of bandgaps and have shown potential in high performance device applications. Interestingly, the ultrathin body and anisotropic material properties of the layered TMDs allow a wide range modification of their band structures by electric field, which is obviously desirable for many nanoelectronic and nanophotonic applications. Here, we demonstrate a continuous bandgap tuning in bilayer MoS2 using a dual-gated field-effect transistor (FET) and photoluminescence (PL) spectroscopy. Density functional theory (DFT) is employed to calculate the field dependent band structures, attributing the widely tunable bandgap to an interlayer direct bandgap transition. This unique electric field controlled spontaneous bandgap modulation approaching the limit of semiconductor-to-metal transition can open up a new field of not yet existing applications.

In this work, an analytic model is proposed which provides in a continuous manner the current-voltage characteristic (I-V) of high performance tunneling field-effect transistors (TFETs) based on direct bandgap semiconductors. The model provides closed-form expressions for I-V based on: 1) a modified version of the well-known Fowler-Nordheim (FN) formula (in the ON-state), and 2) an equation which describes the OFF-state performance while providing continuity at the ON/OFF threshold by means of a term introduced as the "continuity factor". It is shown that traditional approaches such as FN are accurate in TFETs only through correct evaluation of the total band bending distance and the "tunneling effective mass". General expressions for these two key parameters are provided. Moreover, it is demonstrated that the tunneling effective mass captures both the ellipticity of evanescent states and the dual (electron/hole) behavior of the tunneling carriers, and it is further shown that such a concept is even applicable to semiconductors with nontrivial energy dispersion. Ultimately, it is found that the I-V characteristics obtained by using this model are in close agreement with state-of-the-art quantum transport simulations both in the ON- and OFF-state, thus providing validation of the analytic approach., 9 pages, 6 figures

A bilayer graphene based electrostatically doped tunnel field-effect transistor (BED-TFET) is proposed in this work. Unlike graphene nanoribbon TFETs in which the edge states deteriorate the OFF-state performance, BED-TFETs operate based on different bandgaps induced by vertical electric fields in the source, channel, and drain regions without any chemical doping. The performance of the transistor is evaluated by self-consistent quantum transport simulations. This device has several advantages: 1) ultra-low power (VDD=0.1V), 2) high performance (ION/IOFF>104), 3) steep subthreshold swing (SS, 4 pages, 6 figures in 2016 Journal of the Electron Device Society

In addition to its high mobility, the possibility of opening sizable bandgaps has made bilayer graphene (BLG) a promising candidate for many electronic and optoelectronic applications. Yet, the achievable bandgap (300 meV) is not sufficient to make BLG a candidate for high performance transistors. Vertical strain in conjunction with the vertical field can help to achieve a larger band gap in BLG. In this paper, p z nearest-neighbor atomistic tight-binding model and Non-equilibrium Green's Function (NEGF) method are used to study the transport behavior of strained BLG transistors under electric field. A field tunable dynamic band gap (DBG) of up to 300 meV is found to exist in BLG with no strain in agreement with previous reports. By applying strain, one can increase the band gap of BLG beyond 300 meV. Finally, the DBG effect and vertical strain are shown to be able to enhance the ON/OFF ratio of a BLG field effect transistor (FET) to 1000.

We explore here the suitability of a mode space tight binding algorithm to various III-V homo- and heterojunction nanowire devices. We show that in III-V materials, the number of unphysical modes to eliminate is very high compared to the Si case previously reported in the literature. Nevertheless, we demonstrate here the possibility to clean III-V mode space basis from the unphysical modes and achieve a significant speed up ratio (>150×), while keeping a very good accuracy (relative error lower than 1%) when using the algorithm for NEGF transport studies. Such results demonstrate the potential of mode space tight binding models and offer unprecedented possibilities for the full band simulation of nanostructures.

Self-assembled quantum dots have improved the performance of many optoelectronic devices such as infrared photodetectors and intermediate band solar cells [1], [2]. They offer the ability to tune device parameters by carefully adjusting device dimensions. Designing an optimal quantum dot for a specific purpose requires intensive simulation beforehand to get an idea on the effect of various materials and dimensions on optical properties of the dot. Quantum Dot Lab deployed on nanoHUB [3] provides such a simulation platform for the research community. The tool has the ability to simulate quantum dots ranging from simplistic particle in a box in effective mass approximation (EMA) till selfassembled quantum dots in 10-band sp3d5s* tight binding (TB) basis.

Gate controlled tunnel junctions wherein the PN-junction like potential profile is made by two gates with opposite polarities are currently dominant in the fabrication of 2D material devices. Electrical doping methods are also preferred in tunnel field-effect transistors (TFETs) as chemical doping introduces states within the bandgap of the semiconductor and therefore degrades the OFF-state performance of TFETs. Moreover, low band gap 2D materials are preferable for high performance TFETs. Consequently, bilayer graphene (BLG) TFET is studied in this work. The critical design parameters in the performance of low bandgap electrically doped 2D transistors are investigated here. Through atomistic simulations, it is shown that the key element in the performance of electrically gated junctions is the thickness of the oxide even when the top and bottom gates have different biases. But still the equivalent oxide thickness (EOT) cannot be disregarded completely since it determines the value of the electric field dependent band gap in BLG.

In this work, the performance of an electrically doped monolayer WTe 2 tunnel field-effect (TFET) transistor is investigated by means of full band quantum transport simulations. The atomistic simulations predict an ON-current above 100 uA/um and a SS below 10 mV/dec for a channel length of 13nm and V DD of 0.5V. The impact of the design parameters such as oxide thickness and dielectric constant is discussed in detail.

In this paper, we report a fast effective mass model for accurately calculating the bound states and optical transitions of self-assembled quantum dots. The model includes the atomistic strain effects, namely, the strain deformation of the band edges, and strain modification of the effective masses. The explicit inclusion of strain effects in the picture has significantly improved the effective mass model results. For strain calculations, we have found that atomistic strain depends solely on the aspect ratio of the quantum dot, and it has been calculated and reported here for a wide range of quantum dot aspect ratios. Following this sole dependence on the aspect ratio; The deformation theory has been used to include the strain deformation of the band edges. Density function theory has been used to study the effect of strain on the electron and hole effective masses. The proposed effective mass model have an accuracy that is close to full atomistic simulation but with no computational cost.

As transistors scale below 10 nm, the numbers of atoms and electrons are countable in the critical device areas. At this scale, quantum mechanical phenomena start playing an important role in the performance of the transistors. One of the major quantum mechanical effects is tunneling; i.e. tunneling between the gate and channel due to the reduction of physical oxide layer thickness and direct tunneling between the source and drain due to scaling down of channel length. This paper discusses these tunneling issues on performance of ultra-scaled transistors based on rigorous atomistic simulations and provides some solutions for scaling based on a quantitative analysis.

In this letter, it is shown that the existing scaling theories for chemically doped transistors cannot be applied to the novel class of electrically doped 2D transistors and the concept of equivalent oxide thickness (EOT) is not applicable anymore. Hence, a novel scaling theory is developed based on analytic solutions of the 2D Poisson equation. Full band atomistic quantum transport simulations verify the theory and show that the critical design parameters are the physical oxide thickness and distance between the gates. Accordingly, the most optimized electrically doped devices are those with the smallest spacing between the gates and the thinnest oxide, and not the smallest EOT., 3 pages, 2 Figures