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Abstract: p-CrSi2/n-crystSi and p-CrSi2/p-crystSi hetero junctions produced by cathodic arc physical vapor deposition were worked out by means of capacitance–voltage–temperature (C–V–T) and current–voltage–temperature (I–V–T) measurements to investigate storage and transport properties. Former measurement on p-CrSi2/n-crystSi structure confirmed an abrupt type junction together with a building voltage at the proximity of 0.7V. Though a fairly well rectification ratio (103 at ±2V) was realized by I–V measurement, it became deteriorated with the increase in ambient temperature. From temperature dependence of I–V variations, distinct conduction mechanisms were identified. In forward (reverse) direction trap assisted single-multistep tunneling recombination (generation) and space-charge limited current flow that corresponded to low and high bias voltage regions, respectively, were identified. Moreover, an activation energy (E A ) determined from the slopes of I–V–T curves as 0.22 and 0.26eV was interpreted as the energy position of a chromium–boron (Cr–B) complex-type point defect residing in n/p doped c-Si semiconductor in CrSi2/n–c-Si and CrSi2/p–c-Si junctions. The retrieved E A was in agreement with the recent DLTS measurement. Based on the experimental observations, schematic current path was built to interpret I–V/C–V behaviors. The model was successful in explaining the decrease in measured capacitance under large forward bias voltage reported for the first time by us for the present CrSi2/Si junctions. [Copyright &y& Elsevier]

Abstract: Current–voltage–temperature and admittance-gate bias–temperature measurements were performed on Al/p-Si structure to investigate transport and storage properties. In forward direction of former measurement, three distinct voltage regions designated different transport mechanisms: recombination, tunneling and space charge limited current. In the reverse direction, current seemed to be roughly proportional to the square root of bias at low region. Activation energy (E A) as 0.56eV together with the ideality factor around 1.5 confirmed that generation–recombination current was the actual current transport mechanism. Increase in applied bias resulted in the appearance of other mechanisms: tunneling and space charge limited current, deduced by temperature-independent current flow and power of bias (greater than 2) in both forward and reverse directions, respectively. On the other hand, the distinctive bias voltage regions in current–voltage–temperature measurement corresponded to inverting, depleting and accumulating gate bias regimes in typical M(I)S structure for admittance analysis. Conductance branch of admittance reflected a similar behavior with that of the measurement under both temperature and frequency as parameter. On the other hand, with the aid of capacitance branch of admittance in the light of mentioned regimes and their corresponding energy band diagrams, correlation with ac and dc electrical properties was carried out. [Copyright &y& Elsevier]

Abstract: An analytic study of DC characteristics based on the drift-diffusion approach has been performed for the InP/GaAsSb DHBTs. The current transport of InP/GaAsSb/InP DHBTs has been investigated focusing the device temperature dependence. Our simulation results show that, at room temperature, the DC characteristics of the InP/GaAsSb/InP DHBTs similar to the conventional InP-based HBT using InGaAs as the base layer although a type-II energy band alignment is presented in the InP/GaAsSb HBT. However, due to different mechanisms for the electron injection from the emitter induced by the different conduction band alignments, the InP/GaAsSb HBTs may present a different temperature dependent behavior in term of device current gain as compared to the conventional InP/InGaAs HBTs. Higher current gain could be achieved by the InP/GaAsSb HBTs at elevated temperature. [Copyright &y& Elsevier]

Abstract: In this paper, DC characteristics in GaAs DHBTs with pseudomorphic GaAsSb base layer are investigated using an analytical approach. Devices using different GaAs1−x Sb x base thickness with different Sb compositions were simulated to gain an in-depth understanding on the effect of base layer design on the device DC performance. Our calculated results show that, in the GaAsSb base with high Sb composition, the strain plays a non-negligible role in determining the overall device performance. The reduction of B–E turn-on voltage using a large Sb composition of GaAs1−x Sbx could be partially compensated by strain in the base. Furthermore, for the devices using high Sb composition, a thin base layer has to be used to ensure elastic strain. In order to maintain reasonable base conductivity that is critical for device microwave performance, high base doping is required. However, our simulation reveals a drastic reduction of DC gain with the increase in base doping, while a high emitter doping may be helpful for the compensation of the degradation of β. A proper design of the device structure by taking the aforementioned issues into account is important for improving device DC and microwave performance. [Copyright &y& Elsevier]

Cr+Au and Ag Schottky diodes were prepared on n-type InP by using HF or Na2S+HF surface treatment for zero bias microwave detector purposes. The diodes were studied by current–voltage and capacitance–voltage measurements in the temperature range of 80–320 K. The obtained I–V barrier heights were in the range of 0.38–0.49 eV with ideality factors of 1.08–1.24. The peculiarities of the current–voltage characteristics are interpreted in terms of the thermionic emission, the thermionic-field emission, and the field emission current mechanisms. [Copyright &y& Elsevier]