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This paper describes a process for forming a buried field shield in GaN by an etch-and-regrowth process, which is intended to protect the gate dielectric from high fields in the blocking state. GaN trench MOSFETs made at Sandia serve as the baseline to show the limitations in making a trench gated device without a method to protect the gate dielectric. Device data coupled with simulations show device failure at 30% of theoretical breakdown for devices made without a field shield. Implementation of a field shield reduces the simulated electric field in the dielectric to below 4 MV/cm at breakdown, which eliminates the requirement to derate the device in order to protect the dielectric. For realistic lithography tolerances, however, a shield-to-channel distance of 0.4 μm limits the field in the gate dielectric to 5 MV/cm and requires a small margin of device derating to safeguard a long-term reliability and lifetime of the dielectric.

Localized lattice distortions in GaN substrates can serve as nucleation sites for epitaxial macro-steps and macro-terraces. These detrimental macro-scale features give rise to optically hazy homoepitaxial GaN surfaces. After nucleating, these macro-features grow laterally along the surface and coalesce, leading to significant coverage of the wafer surface. Dot-core GaN substrates consisting of a periodic array of cores were used as a defect-engineered system, where dislocations are intentionally concentrated at the cores. The high density of threading dislocations at the cores induced localized lattice distortions. These distortions are associated predominantly with lattice tilt on the order of hundreds of arcsec across ∼0.5 mm laterally along the wafer surface. The resulting macro-features that nucleated at these localized distorted sites were made up of macro-terraces with lengths ranging ∼30–∼150 μm and macro-step heights ranging ∼200–∼400 nm. Another source of localized distortion was threading screw dislocations or GaN nanopipes that resulted in spiral growth and hillock formation. Based on x-ray topography and optical microscopy measurements, we speculate that the coalescence of hillocks evolves into macro-terraces and macro-steps. While previous studies focused on the substrate miscut as a means to control macro-feature formation, we show that localized lattice tilt from defects is another important contributor to macro-feature formation. [ABSTRACT FROM AUTHOR]

Etched-and-regrown GaN pn-diodes capable of high breakdown voltage (1610 V), low reverse current leakage (1 nA = 6 μA/cm2 at 1250 V), excellent forward characteristics (ideality factor 1.6), and low specific on-resistance (1.1 mΩ.cm2) were realized by mitigating plasma etch-related defects at the regrown interface. Epitaxial n-GaN layers grown by metal-organic chemical vapor deposition on free-standing GaN substrates were etched using inductively coupled plasma etching (ICP), and we demonstrate that a slow reactive ion etch (RIE) prior to p-GaN regrowth dramatically increases diode electrical performance compared to wet chemical surface treatments. Etched-and-regrown diodes without a junction termination extension (JTE) were characterized to compare diode performance using the post-ICP RIE method with prior studies of other post-ICP treatments. Then, etched-and-regrown diodes using the post-ICP RIE etch steps prior to regrowth were fabricated with a multi-step JTE to demonstrate kV-class operation.

AlGaN channel high electron mobility transistors (HEMTs) are the potential next step after GaN channel HEMTs, as the high aluminum content channel leads to an ultra-wide bandgap, higher breakdown field, and improved high temperature operation. Al0.85Ga0.15N/Al0.7Ga0.3N (85/70) HEMTs were operated up to 500 °C in ambient causing only 58% reduction of dc current relative to 25 °C measurement. The low gate leakage current contributed to high gate voltage operation up to +10 V under Vds = 10 V, with ION/IOFF ratios of > 2 × 1011 and 3 × 106 at 25 and 500 °C, respectively. Gate-lag measurements at 100 kHz and 10% duty cycle were ideal and only slight loss of pulsed current at high gate voltages was observed. Low interfacial defects give rise to high quality pulsed characteristics and a low subthreshold swing value of 80 mV/dec at room temperature. Herein is an analysis of AlGaN-channel HEMTs and their potential future for high power and high temperature applications.

The interaction between cavity modes and optical transitions leads to new coupled light-matter states in which the energy is periodically exchanged between the matter states and the optical mode. Here we present experimental evidence of optical strong coupling between modes of individual sub-wavelength metamaterial nanocavities and engineered optical transitions in semiconductor heterostructures. We show that this behaviour is generic by extending the results from the mid-infrared (~10 μm) to the near-infrared (~1.5 μm). Using mid-infrared structures, we demonstrate that the light-matter coupling occurs at the single resonator level and with extremely small interaction volumes. We calculate a mode volume of 4.9 × 10(-4) (λ/n)(3) from which we infer that only ~2,400 electrons per resonator participate in this energy exchange process.

Steady-state photocapacitance (SSPC) was conducted on nonpolar m-plane GaN n-type Schottky diodes to evaluate the defects induced by inductively coupled plasma (ICP) dry etching in etched-and-regrown unipolar structures. An ∼10× increase in the near-midgap Ec – 1.9 eV level compared to an as-grown material was observed. Defect levels associated with regrowth without an etch were also investigated. The defects in the regrown structure (without an etch) are highly spatially localized to the regrowth interface. Subsequently, by depth profiling an etched-and-regrown sample, we show that the intensities of the defect-related SSPC features associated with dry etching depend strongly on the depth away from the regrowth interface, which is also reported previously [Nedy et al., Semicond. Sci. Technol. 30, 085019 (2015); Fang et al., Jpn. J. Appl. Phys. 42, 4207–4212 (2003); and Cao et al., IEEE Trans. Electron Devices 47, 1320–1324 (2000)]. A photoelectrochemical etching (PEC) method and a wet AZ400K treatment are also introduced to reduce the etch-induced deep levels. A significant reduction in the density of deep levels is observed in the sample that was treated with PEC etching after dry etching and prior to regrowth. An ∼2× reduction in the density of Ec – 1.9 eV level compared to a reference etched-and-regrown structure was observed upon the application of PEC etching treatment prior to the regrowth. The PEC etching method is promising for reducing defects in selective-area doping for vertical power switching structures with complex geometries [Meyers et al., J. Electron. Mater. 49, 3481–3489 (2020)]. [ABSTRACT FROM AUTHOR]

The impact of dry-etch-induced defects on the electrical performance of regrown, c-plane, GaN p-n diodes where the p-GaN layer is formed by epitaxial regrowth using metal-organic, chemical-vapor deposition was investigated. Diode leakage increased significantly for etched-and-regrown diodes compared to continuously grown diodes, suggesting a defect-mediated leakage mechanism. Deep level optical spectroscopy (DLOS) techniques were used to identify energy levels and densities of defect states to understand etch-induced damage in regrown devices. DLOS results showed the creation of an emergent, mid-gap defect state at 1.90 eV below the conduction band edge for etched-and-regrown diodes. Reduction in both the reverse leakage and the concentration of the 1.90 eV mid-gap state was achieved using a wet chemical treatment on the etched surface before regrowth, suggesting that the 1.90 eV deep level contributes to increased leakage and premature breakdown but can be mitigated with proper post-etch treatments to achieve >600 V reverse breakdown operation. [ABSTRACT FROM AUTHOR]