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The thermal oxidation of Ge or As implanted Si single crystals has been investigated for two different oxidation processes (in wet ambient at 920°C and dry ambient at 1100°C). Using the atomic force microscopy the oxide morphology and roughness has been determined as a function of the different oxidation processes. The X-ray absorption spectroscopy has been employed to determine the structural coordination around the dopant atoms. We found that the surface roughness is related to the segregation of Ge or As at the oxide/substrate interface, occurring when the oxidation rate is faster than the dopant diffusion, in particular at the higher implanted dose processed in wet ambient. The segregation of Ge at the interface gives rise to the formation of germanium rich alloy region, whereas the segregation of As induces the precipitation of SiAs monoclinic islands. The formation of islands is directly related to the dopant segregation, but their size is not. In fact, after a critical concentration of dopant at the interface is reached, a dissolution of the precipitates takes place. A memory effect causes the continuous growing of the islands, even once the diffusion of Ge or As takes place.

Micro- and nano-electromechanical systems (MEMS and NEMS) fabricated in 3?C-SiC are receiving particular attention thanks to the material physical properties: its wide band gap (2.3?eV), its ability to operate at high temperatures, its mechanical strength and its inertness to the exposure in corrosive environments. However, high residual stress (which is normally generated during the hetero-epitaxial growth process) makes the use of 3?C-SiC in Si-based MEMS fabrication techniques very limited leading to a failure of micro-machined/sensor structures. In this paper, micro-Raman characterizations and finite-element modeling (FEM) of microstructures realized on poly and single-crystal (100) 3?C-SiC/Si films are performed. Transverse optical (TO) Raman mode analysis reveals the stress relaxation on the free standing structure (796.5?cm-1) respect to the stressed unreleased region (795.7?cm-1). Also, microstructures as cantilever, bridge and planar rotating probe show an intense stress field located around the undercut region. Here, the TO Raman mode undergoes an intense shift, up to 2?cm-1, ascribed to the modification of the Raman stress tensor. Indeed, the generalized axial regime, described by diagonal components of the Raman stress tensor, cannot be applied in this region. Raman maps analysis and FEM simulations show the activation of the shear stress, i.e. non-diagonal components of the stress tensor. The stress-Raman modes shift correlation, in the case of fully non-diagonal stress tensors, has been investigated. The aim of future works will be to minimize the stress field generation and the defects density within the epitaxial layer.

Damaging in Al-implanted 3C-SiC and subsequent crystal recovery due to thermal treatments up to 1350 degrees C are evaluated by X-ray diffraction and micro-Raman spectroscopy. Reciprocal space mapping of (004) 3C-SiC planes shows a low-intensity implantation-induced secondary peak at higher interplanar spacing in the as-implanted 3C-SiC sample, with a generated misfit between the implanted and the epitaxial region of about 0.6%. Increasing the annealing temperature from 950 degrees C to 1350 angstrom C, the secondary peak is gradually re-absorbed within the epitaxial 3C-SiC reciprocal lattice point. Finally, the disappearance of the secondary peak after a 1350 degrees C thermal treatment is observed. Thus, implantation-induced average strain, resulting in a severe 3C-SiC deforma- tion, has been totally relieved at the highest annealing temperature.

Heteroepitaxial cubic silicon carbide (3C-SiC) is an extremely promising material for micro-and nano-electromechanical systems due to its large Young's modulus. Unfortunately, the heteroepitaxy of 3C-SiC on Si substrate is affected by the high mismatch in the lattice parameters and the thermal expansion coefficients between the two dissimilar materials that generate a high number of defects in the material. In this work, through the measurement of natural resonant frequencies and Raman shift analysis, a strong relationship between the mechanical proprieties of the material (Young's modulus) and the film crystal quality (defect density) was observed.

The dependence between the carrier concentration and electrical mobility has been studied by micro-Raman spectroscopy in n-doped 3C-SiC films grown on (111) and (100) Silicon oriented substrates. Bulk mobility varies between 10 and 510 cm(2) V-1 s(-1) for a carrier concentration ranging between 1.6 X 10(16) and 5.4 X 10(18) cm(-3). Local stacking variations observed on the (111) 3C-SiC surface lead to a worse crystal morphology compared to (100) 3C-SiC films resulting in a decrease in the average bulk mobility. Defects are thus accountable for the dependence between mobility and carrier concentration for different 3C-SiC orientations.

The aim of this work is to improve the heteroepitaxial growth process of 3C-SiC on Si substrates using Trichlorosilane (SiHCl3) as the silicon growth precursor. With this precursor it has been shown that it is possible to simultaneously increase the growth rate of the process and avoid the nucleation of silicon droplets in the gas phase. Growth experiments were conducted on three (3) Si substrate orientations in order to assess the impact of the Si substrate on the resulting 3C-SiC film. X-ray Diffraction (XRD), Atomic Force Microscopy (AFM) and Transmission Electron Microscopy (TEM) analysis show the important role of the substrate orientation for the growth process. The different orientation of the substrate modifies the morphology of the 3C-SiC crystalline structure, mostly by changing the density of micro-twins and stacking faults inside the film. © (2009) Trans Tech Publications, Switzerland.

The low temperature evolution of point defects induced in SiC by ion irradiation was investigated by deep level transient spectroscopy. The defects were introduced by irradiation with a 7.0 MeV beam of C+ ions at a fluence of 6 x 10(9) cm(2). Annealing was then performed in the temperature range of 330-400 K in order to study the change in point defect structure with temperature. The low temperature annealing performed was observed to induce a change in the produced defects. The deep levels related to the S-x (E-c - 0.6 eV) and S-2 defects (E-c -0.7 eV) recovered with annealing while, simultaneously, a new level, S-x (E-c - 0.4 eV), was formed. The activation energy of the S-1 defect is 0.94 eV, while the annealing of both the S-x and S-2 levels occurred with activation energy of 0.65 eV.

A novel Monte Carlo kinetic model has been developed and implemented to predict growth rate regimes and defect formation for the homo-epitaxial growth of various SiC polytypes on different substrates. Using this model we have studied the generation of both point like and extended defects in terms of the growth rate and off-cut angle, finding qualitative agreement with both electrical and optical characterization and analytical results. © (2009) Trans Tech Publications.

Using joined super-lattice Kinetic Monte Carlo and continuous simulations we study the transition between step flow and two-dimensional island nucleation growth on stepped surfaces for close packed crystalline structures. The numerical analysis is performed in terms of misorientation cut, deposition rate and temperature. We compare the results of the atomistic approach with the predictions of the standard and generalized Burton-Cabrera-Frank (BCF) continuous model. The generalization consists in the explicit inclusion in the theory of the formation and dissolution of mobile dimers on the terraces. We show that the BCF-like continuous theories break down for low temperatures, large off-angle cuts and high deposition rates. In view of these results we critically discuss the basic assumptions of the continuous models.

The growth rate of 4H-SiC epi layers has been increased up to 100 OEºm/h with the use of trichlorosilane instead of silane as silicon precursor. The epitaxial layers grown with this process have been characterized by electrical, optical and structural characterization methods. Schottky diodes, manufactured on the epitaxial layer grown with trichlorosilane at 1600 ¬?C, have higher yield and lower defect density in comparison to diodes realized on epilayers grown with the standard epitaxial process. ¬© (2009) Trans Tech Publications, Switzerland.

A process has been developed to grow multi-epy high doped structure. Trichlorosilane (TCS) and Ethylene have been used as precursor; Nitrogen (N 2) and trimethylaluminum (TMA) as doping source. The SIMS and SCM analysis show that using this silicon precursor very abrupt N ++/P+/N+ junctions (40-60 nm) can be obtained with low background doping concentration in a single epitaxial growth run. © (2009) Trans Tech Publications, Switzerland.

Growth of 3C-SiC on (100) Si has been performed via chemical vapor deposition under two pressure regimes (low and atmospheric pressure) in the early stage of growth. Atomic force microscopy (AFM) and transmission electron microscopy (TEM) have been conducted to study the initial stage of growth while X-ray diffractometry (XRD) and TEM have been used to analyze thicker films and to detect and quantify defects, resulting in a comprehensive and detailed investigation of 3C-SiC structural defects. We have found out that the secondary nucleation of 3C-SiC island growth leads to a higher defect generation rate and, at the same time, to a more effective defect elimination rate. Hillocks found on the surface of thin samples grown under reduced pressure conditions are more pronounced as they seem to be a consequence of twins created in the early stage of growth. Finally, a different initial nucleation density (in the two pressure regimes considered) does not strongly influence stacking fault and microtwin density when growth of thick 3C-SiC films is performed. A very strong influence is indeed observed when 3C-SiC thickness is limited to hundreds of nanometers.

A series of fine grained C49 thin films were prepared by depositing Ti films on heated amorphous as well as crystalline silicon substrates. Rapid thermal processing at temperatures between 700 and 775 °C was used to transform the metastable C49 phase into the stable C54. The evolution of the film structure and morphology during the transformation was investigated by sheet resistance, optical spectroscopy, diffuse reflectance and AFM measurements. One structural model which could account for our data is proposed according to crystallographic information present in the literature

Using joined super-lattice Kinetic Monte Carlo simulations, continuous modelling and recent experimental data on the homoepitaxial growth of 4H Silicon Carbide we study the transition between monocrystalline and polycrystalline growth in terms of misorientation cut, growth rate and temperature. We compare these optimally calibrated results both with previous continuous models and literature data. We demonstrate that this study was, indeed, necessary to correctly reformulate the phase diagram of the transition. © (2009) Trans Tech Publications, Switzerland.

The choice of off-axis (111) Si substrates is poorly reported in literature despite of the ability of such an oriented Si substrate in the reduction of stacking faults generation and propagation. The introduction of off-axis surface would be relevant for the suppression of incoherent boundaries. We grew 3C-SiC films on (111) Si substrates with a miscut angle from 3¬? to 6¬? along and . The film quality was proved to be high by X-Ray diffraction (XRD) characterization. Transmission electron microscopy was performed to give an evaluation of the stacking fault density while pole figures were conducted to detect microtwins. Good quality single crystal 3C-SiC films were finally grown on 6 inch off-axis (111)Si substrate. The generated stress on both 2 and 6 inch 3C-SiC wafers has been analyzed and discussed. ¬© (2009) Trans Tech Publications, Switzerland.

We have developed a high-quality growth process for 3C-SiC on on-axis (111)Si substrates with the ultimate goal to demonstrate high quality and yield electronic and MEMS devices. A single-side polished 50 mm (111)Si wafer was loaded into a hot-wall SiC CVD reactor for growth. The 3C-SiC process was performed in two stages: carbonization in propane and hydrogen at 1135¬?C and 400 Torr followed by growth at 1380¬?C and 100 Torr. X-ray diffraction rocking curve analysis of the 3C-SiC(222) peak indicates a FWHM value of 219 arcsec. This is a very interesting result given that the film thickness was only ,àº2 OEºm, thus indicating that the grown film is of very high quality compared with published literature values. X-ray polar figure mapping was performed and it was observed that the micro twin content was below the detection limit. Therefore TEM characterization was performed in plan view to allow assessment of the stacking fault density as well as confirmation of the very low micro twin concentration in this film. TEM analysis indicates a low concentration of stacking faults in the range of 10 4 cm -1. ¬© (2009) Trans Tech Publications, Switzerland.

The growth rate of 4H-SiC epi layers has been increased up to 100 OEºm/h by chlorine addition. The epitaxial layers grown with this process have been characterized by electrical, optical and structural characterization methods. Very thick (> 100 OEºm) epitaxial layer has been grown and the Schottky diodes realized on these layers have good yield (> 87%) with a low defect density (10/cm2). This process gives the opportunity to realize very high power devices with breakdown voltages in the range of 10 kV or X-Ray and particle detectors with a low cost epitaxy process. ¬© (2009) Trans Tech Publications, Switzerland.

High growth rate of 4H-SiC epitaxial layers can be reached with the introduction of HCl in the deposition chamber. The effect of the Cl/Si ratio on this epitaxial growth process has been studied by optical and electrical measurements. Optical microscopy shows an improvement of the surface morphology and luminescence measurements reveal a decrease of epitaxial layer defects with increasing the Cl/Si ratio in the range 0.05–2.0. The leakage current measured on the diodes realized on these wafers is reduced of an order of magnitude and DLTS measurements show a decrease of the EH6,7 level concentration in the same range of Cl/Si ratio. The value Cl/Si=2.0 allows to grow epitaxial layers with the lowest defect concentration.

A simplified deposition model, involving both the description of the deposition and of the film morphology was adopted to quantitatively understand the experimental trends encountered in the epitaxial silicon carbide deposition in an industrial hot wall reactor. The attention was focused on the system involving chlorinated species because its really superior performances with respect the traditional silane/hydrocarbons process. The evolution of the crystalline structure (i.e., from poly to single) and of the surface roughness can be understood by simply comparing two characteristic times, like those inherent the surface diffusion and the matter supply to the surface.

The growth rate of 4H-SiC epi layers has been increased by a factor 19 (up to 112 µm/h) with respect to the standard process with the introduction of HCl in the deposition chamber. The epitaxial layers grown with the addition of HCl have been characterized by electrical, optical and structural characterization methods. An optimized process without the addition of HCl is reported for comparison. The Schottky diodes, manufactured on the epitaxial layer grown with the addition of HCl at 1600 °C, have electrical characteristics comparable with the standard epitaxial process with the advantage of an epitaxial growth rate three times higher.

3C-SiC/Si heteroepitaxy is hampered by large mismatches in lattice parameters (19.7%) and thermal expansion coefficient (8%) leading to 3C-SiC films containing high defects density. To reduce the presence of defects, a multi-step growth process in a CVD reactor is used. The aim of the work is to study the effect of carbonization on differently oriented Si surfaces, experiencing a 200°C-wide temperature range in a CVD reactor, to improve the crystalline quality. TEM analysis are carried out to evaluate thickness, crystal orientations and defects of carbonized layers with respect to the time-dependence of the process and to the different orientations of the Si substrate. It will be shown that process-related defects are strictly correlated to the substrate orientation either for size, density, occupied area, shape or thickness. Uniform, flat and crystalline thin SiC films are obtained with a low defect density.

The introduction of hydrogen chloride (HCl) in the deposition chamber during the growth of 4H-SiC epitaxial layers allows very high growth rates to be achieved. The properties of the epilayers and the growth rate depend on many parameters such as the growth temperature and the C/Si, Cl/Si, and Si/H-2 ratios. We have used optical and electrical measurements to investigate the effect of the Cl/Si and Si/H-2 ratio and growth temperature on the epitaxial growth process. The growth rate increases with increasing Si/H-2 ratio and higher growth rates are obtained when HCl is added to the gas flow. Optical microscopy shows an improvement of the surface morphology, and luminescence measurements reveal a decrease in the concentration of complex defects with increasing Cl/Si ratio in the range of 0.05-2.0 and with increasing growth temperature from 1550 degrees C to 1650 degrees C. The electrical measurements on the diodes realized on these epitaxial layers show a decrease of the leakage current with increasing Cl/Si ratio and growth temperature over the same range. Deep level transient spectroscopy measurements indicate that the deep level EH6/7, which is one of the main levels responsible for the high value of leakage current measured in the Schottky diodes, is greatly reduced using HCl as a growth additive.

Problems of long processing time in the standard growth process silicon carbide(SiC) that produces high-blocking-voltage devices can be solved by adding hydrogen chloride(HCL) into the cell. The long growth times increase the processing costs and hamper the commercial development of high-voltage SiC devices. Scientists at the University of South Florida and researchers in Italy have developed an improved epitaxial process that overcomes the growth-rate problem. The improvements include the increasing of silane flow and introducing HCL gas in the deposition chamber. It is stated that the HCL gas can avoid the homogeneous nucleation of silicon in the gas phase that occurs during the standard deposition process and can also significantly increase concentration of silane.

The electrical characteristics of 4H-SiC Schottky diodes were performed in the temperature range 80-700 K, in order to determine the temperature dependence of the drift mobility. At room temperature, a value of 724 cm(2)/(V s) was found, which decreased to 48.6 cm(2)/ (V s) at 700 K. In the temperature range 200-700 K, a dependence of the mobility as T-3 was determined, that can be correlated to the presence of material defects.

This paper presents a new compliance substrate for heteroepitaxial growth of OE