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In 1959, Lawson and co-workers published the paper which triggered development of variable band gap Hg1-xCdxTe (HgCdTe) alloys providing an unprecedented degree of freedom in infrared detector design. HgCdTe ternary alloy has been used for realization of detectors operating under various modalities including: photoconductor, photodiode, and metal-insulator-semiconductor detector designs. Over the last five decades, this material system has successfully overcome the challenges from other material systems. It is important to notice that none of these competitors can compete in terms of fundamental properties. The competition may represent more mature technology but not higher performance or, with the exception of thermal detectors, higher operating temperatures (HOTs) for ultimate performance. In the last two decades, several new concepts for improvement of the performance of photodetectors have been proposed. These new concepts are particularly addressing the drive towards the so called HOT detectors aiming to increase detector operating temperatures. In this paper, new strategies in photodetector designs are reviewed, including barrier detectors, unipolar barrier photodiodes, multistage detectors and trapping detectors. Some of these new solutions have emerged as a real competitor to HgCdTe photodetectors. [ABSTRACT FROM AUTHOR]

We report the experimental demonstration of Fermi level depinning using nickel oxide (NiO) as the insulator material in metal-insulator-semiconductor (M-I-S) contacts. Using this contact, we show less than 0.1 eV barrier height for holes in platinum/NiO/silicon (Pt/NiO/p-Si) contact. Overall, the pinning factor was improved from 0.08 (metal/Si) to 0.26 (metal/NiO/Si). The experimental results show good agreement with that obtained from theoretical calculation. NiO offers high conduction band offset and low valence band offset with Si. By reducing Schottky barrier height, this contact can be used as a carrier selective contact allowing hole transport but blocking electron transport, which is important for high efficiency in photonic applications such as photovoltaics and optical detectors. [ABSTRACT FROM AUTHOR]

A diamond logic inverter is demonstrated using an enhancement-mode hydrogenated-diamond metal-insulator-semiconductor field effect transistor (MISFET) coupled with a load resistor. The gate insulator has a bilayer structure of a sputtering-deposited LaAlO3 layer and a thin atomiclayer-deposited Al2O3 buffer layer. The source-drain current maximum, extrinsic transconductance, and threshold voltage of the MISFET are measured to be --40.7 mA.mm-1, 13.2 ± 0.1 mS.mm-1, and --3.1 ± 0.1 V, respectively. The logic inverters show distinct inversion (NOT-gate) characteristics for input voltages ranging from 4.0 to --10.0 V. With increasing the load resistance, the gain of the logic inverter increases from 5.6 to as large as 19.4. The pulse response against the high and low input voltages shows the inversion response with the low and high output voltages. [ABSTRACT FROM AUTHOR]

Recent advances in Normal metal-insulator-superconductor (NIS) tunnel junctions (Clark et al. Appl Phys Lett 86: 173508, , Appl Phys Lett 84: 4, ) have proven these devices to be a viable technology for sub-Kelvin refrigeration. NIS junction coolers, coupled to a separate cold stage, provide a flexible platform for cooling a wide range of user-supplied payloads. Recently, a stage was cooled from 290 to 256 mK (Lowell et al. Appl Phys Lett 102: 082601 ), but further mechanical and electrical improvements are necessary for the stage to reach its full potential. We have designed and built a new Kevlar suspended cooling platform for NIS junction refrigeration that is both lightweight and well thermally isolated; the calculated parasitic loading is $$<\!\!300$$ pW from 300 to 100 mK. The platform is structurally rigid with a measured deflection of 25 $$\upmu $$ m under a 2.5 kg load and has an integrated mechanical heat switch driven by a superconducting stepper motor with thermal conductivity G $$ = 4.5 \times 10^{-7}$$ W/K at 300 mK. An integrated radiation shield limits thermal loading and a modular platform accommodates enough junctions to provide nanowatts of continuous cooling power. The compact stage size of 7.6 cm $$\times $$ 8.6 cm $$\times $$ 4.8 cm and overall radiation shield size of 8.9 cm $$\times $$ 10.0 cm $$\times $$ 7.0 cm along with minimal electrical power requirements allow easy integration into a range of cryostats. We present the design, construction, and performance of this cooling platform as well as projections for coupling to arrays of NIS junctions and other future applications. [ABSTRACT FROM AUTHOR]

Using an atmospheric metal-organic chemical vapor deposition system, we passivated GaAs with AlN prior to atomic layer deposition of Al2O3. This AlN passivation incorporated nitrogen at the Al2O3/GaAs interface, improving the capacitance-voltage (C-V) characteristics of the resultant metal-oxide-semiconductor capacitors (MOSCAPs). The C-V curves of these devices showed a remarkable reduction in the frequency dispersion of the accumulation capacitance. Using the conductance method at various temperatures, we extracted the interfacial density of states (Dit). The Dit was reduced over the entire GaAs band gap. In particular, these devices exhibited Dit around the midgap of less than 4 × 1012 cm-2eV-1, showing that AlN passivation effectively reduced interfacial traps in the MOS structure. [ABSTRACT FROM AUTHOR]

Cubic and hexagonal AlN films have been prepared by vacuum arc discharge technique at different deposition temperatures 100, 200 and 300°C. The depositions were carried out from pure aluminum targets under nitrogen gas on p-type Si substrates, with Al forming the gate in a metal–insulator–semiconductor configuration. Preferential orientations (111) and (002) of the cubic and hexagonal phases have been affirmed by X-ray diffraction analysis. The Fourier transform infrared spectra revealed the manifestation of the two phases as well. The effect of deposition temperature on the crystalline quality and texture of the films has been also investigated and the grain size of which, has been evaluated as a function of temperature. The best crystalline quality i.e., largest grain size was found to be at 200°C. The composition and stoichiometry of the films have been determined by the time-of-flight elastic recoil detection analysis (TOF-ERDA) and Rutherford backscattering techniques. The Al/N ratio was found to be around 1, while the O content was less than 1.8%. Scanning electron microscopy and TOF-ERDA measurements demonstrated films thickness of 260nm. Current density versus electric field and capacitance–voltage (C–V) measurements were also investigated to reveal the field emission and conduction mechanism of the Al/AlN/p-Si devices. Schottky, Pool–Frenkel and Fowler–Nordheim conduction have been found to contribute to the electron transport, and the best emission properties were manifested at 200°C with a highest current density 525μA/cm2 at a field 71V/μm. From C–V curves, the density of traps has been estimated to be 18×109 cm−2 eV−1 indicating a good quality of the deposited films. [ABSTRACT FROM AUTHOR]

The experiments of dose rate and bias effects on commercial-off-the-shelf array charge-coupled devices (CCDs) are presented. The dark signal (VD) is calculated with the output signal voltages measured at different integration times when no light is incident on the CCDs. The dark signal voltages (VD) versus the total dose at the dose rates of 0.01, 0.1, 1.0, 10.0, and 50 rad(Si)/s are compared. Annealing tests are performed to eliminate the time-dependent effects. Degradation levels were found to depend on the dose rates. The CCDs are divided into two groups—with one group biased and the other unbiased during ^60Co\gamma irradiation. The biased CCDs are shown to degrade more severely than the unbiased CCDs. [ABSTRACT FROM AUTHOR]

Al2O3 deposited by atomic layer deposition (ALD) was used as an insulator in metal–insulator–semiconductor (MIS) structures for GaN-based MIS-devices. As the oxygen precursors for the ALD process, water (H2O), ozone (O3), and both H2O and O3 were used. The chemical characteristics of the ALD-Al2O3 surfaces were investigated by x-ray photoelectron spectroscopy. After fabrication of MIS-diodes and MIS-high-electron-mobility transistors (MIS-HEMTs) with the ALD-Al2O3, their electrical properties were evaluated by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The threshold voltage of the C–V curves for MIS-diodes indicated that the fixed charge in the Al2O3 layer is decreased when using both H2O and O3 as the oxygen precursors. Furthermore, MIS-HEMTs with the H2O + O3-based Al2O3 showed good dc I–V characteristics without post-deposition annealing of the ALD-Al2O3, and the drain leakage current in the off-state region was suppressed by seven orders of magnitude. [ABSTRACT FROM AUTHOR]

We report the development of superconducting tantalum nitride (TaNx) normal metal-insulator-superconductor (NIS) tunnel junctions. For the insulating barrier, we used both AlOx and TaOx (Cu-AlOx-Al-TaNx and Cu-TaOx-TaNx), with both devices exhibiting temperature dependent current-voltage characteristics which follow the simple one-particle tunneling model. The superconducting gap follows a BCS type temperature dependence, rendering these devices suitable for sensitive thermometry and bolometry from the superconducting transition temperature TC of the TaNx film at ~5K down to ~0.5 K. Numerical simulations were also performed to predict how junction parameters should be tuned to achieve electronic cooling at temperatures above 1K. [ABSTRACT FROM AUTHOR]

Abstract: Physical effects arising due to change of configuration of a MIS system from planar to cylindrical, are theoretically analyzed. Attention is paid to the voltage partitioning and all the components of tunneling current. A simple simulation model is developed enabling prediction of the band diagram details and calculation of the currents. The trends expected with decreasing system radius are elucidated. Cylindrical geometry can be faced with when quantum wire is used as an electron emitter. Similar form may also be roughly attributed to an edge region of conventional MIS capacitors. [Copyright &y& Elsevier]

Abstract: The Au/Anthracene/n-Si/Al MIS device was fabricated on the basis of anthracene film covalently bonded to a Si substrate. The MIS device showed Schottky behavior with barrier heights of 0.85 eV and ideality factors of 1.88 at 300 K. The barrier height of the Au/n-Si has increased after deposition of the anthracene layer onto Si. Temperature dependent current–voltage (I–V) measurements were performed on the Au/Anthracene/n-Si/Al MIS diodes in the range 140–300 K. From the temperature dependence of forward bias I–V, the barrier height was observed to increase with temperature. However, the ideality factor decreased with increasing temperature. The values of activation energy (E a ) and Richardson constant (A*) were determined as 0.24 eV and 7.57 × 10−6 A cm−2 K−2 from the slope and the intercept at ordinate of the linear region of Richardson plot, respectively. The increase of the series resistance R s with the fall of temperature was attributed to lack of free carrier concentration at low temperatures. [Copyright &y& Elsevier]

ZnO:YAG-based metal-insulator-semiconductor (MIS) diodes with various insulators were synthesized on an indium tin oxide (ITO) glass by ultrasonic spray pyrolysis. SiO2 and MnZnO (MZO) were separately used as insulators. X-ray diffraction revealed the crystalline structure of the ZnO:YAG film. The photoluminescence (PL) properties of the ZnO:YAG film were studied and the color of photoluminescence was found to be almost white. The electrical properties of the diodes with different insulators and thicknesses were compared. The diode with the SiO2 insulator had a lower threshold voltage, smaller leakage current, and a higher series resistance than that with the MZO insulator layer. [ABSTRACT FROM AUTHOR]

Highlights: [•] We report the fabrication of crystalline high-k oxides MIM capacitors using anodization. [•] We propose a generalized model for the voltage nonlinearity coefficient of high-k MIM capacitors. [•] Our model predicts the origin of voltage dependent capacitance of MIM capacitors. [•] The model is verified with fabricated MIM capacitors with four different high-k materials. [•] We report the thickness scalability of high-k MIM capacitors to meet the ITRS recommendations. [ABSTRACT FROM AUTHOR]

Highlights: [•] Metal–insulator–metal capacitors with AlN as insulator were deposited by sputtering. [•] AlN as insulator in metal–insulator–semiconductor diodes were deposited by MBE. [•] Device performance was improved by post-deposition annealing at 200°C in N2 ambient. [•] The dielectric constant of AlN in MIM and MIS devices was between 9 and 12. [•] Ionic conduction in MIM and Frenkel–Poole emission in MIS devices were identified. [ABSTRACT FROM AUTHOR]

Advanced materials that combine novel functionality and ease of applicability are central to the development of light-emitting diodes (LEDs), which is of ever increasing commercial importance. Here a new metal-insulator-semiconductor (MIS) LED structure that combines economical fabrication with novel device properties is reported. The presented MIS-LED consists of a graphene electrode on p-GaN substrate separated by an insulating SiO2 layer. It is found that the MIS-LED possesses a unique tunability of the electroluminescence spectra depending on the bias conditions. Tunnel injection from graphene into the p-GaN can explain the difference in luminescence spectra under forward and reverse bias. The demonstrated MIS-LED expands the use of graphene and also possibly allows the direct integration of light emitters with other circuit elements. [ABSTRACT FROM AUTHOR]

Metal-insulator-semiconductor back contact has been employed for a perovskite organic lead iodide heterojunction solar cell, in which an ultrathin Al2O3 film as an insulating layer was deposited onto the CH3NH3PbI3 by atomic layer deposition technology. The light-to-electricity conversion efficiency of the devices is significantly enhanced from 3.30% to 5.07%. Further the impedance spectrum reveals that this insulating layer sustains part of the positive bias applied in the absorber region close to the back contact and decreases the carrier transport barrier, thus promoting transportation of carriers. [ABSTRACT FROM AUTHOR]

The longitudinal spin Seebeck effect (LSSE) and the anomalous Nernst effect (ANE) are investigated in various metal/insulator junction systems and a clear separation of the LSSE from the ANE induced by static magnetic proximity is demonstrated. This separation is realized by comparing transverse thermoelectric voltage in in-plane magnetized (IM) and perpendicularly magnetized (PM) configurations, where the LSSE appears only in the IM configuration while the ANE appears both in the IM and PM configurations. We show that, in Pt/Y3Fe5O12 samples, the LSSE voltage in the IM configuration is three orders of magnitude greater than the proximity-ANE contamination estimated from the data in the PM configuration. This quantitative voltage comparison between the IM and PM configurations is corroborated by systematic voltage measurements in Ni81Fe19/Gd3Ga5O12, Pt/Gd3Ga5O12, Au/Y3Fe5O12, and Au/Gd3Ga5O12 samples and by our phenomenological model calculation. The LSSE measurements in high magnetic field regions further confirm that the observed voltage in the Pt/Y3Fe5O12 and Au/Y3Fe5O12 samples is of magnon origin. We apply this voltage comparison method also to a Ni81Fe19/Y3Fe5O12 sample and show that both the LSSE and ANE exist in this sample. [ABSTRACT FROM AUTHOR]

Silicon nanowires offer unique properties like inherent small diameters, quasi‐one‐dimensional current transport and the flexibility to combine materials that cannot be combined in bulk or thin film structures. Based on these properties electron devices, sensors as well as solar cells and lithium batteries can be envisioned that significantly outperform their thin film or bulk counterparts. The possibility to form silicon nanowires in a top–down process using bulk silicon or silicon‐on‐insulator substrates, gives this technology the potential for a seamless integration into integrated electronic systems. This Review gives an overview of important device applications of silicon nanowires. Starting with nanowire fabrication, the different device concepts will be introduced and their most important features are reported. Illustration of silicon nanowire formation and application in a reconfigurable device. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim) Part of Focus Issue on “Semiconductor Nanowires” (Eds.: Chennupati Jagadish, Lutz Geelhaar, Silvija Gradecak) Based on their inherent small diameter, silicon nanowires offer unique properties that enable electron devices, sensors as well as solar cells and lithium batteries with the potential to significantly outperform their thin film or bulk counterparts. This article gives an overview of important device applications of silicon nanowires. Starting with nanowire fabrication, the different device concepts are introduced and their most important features reviewed. Special focus is put on different reconfigurable transistor concepts recently described in literature. [ABSTRACT FROM AUTHOR]

Abstract: This study reports the fabrication of GaN metal–insulator–semiconductor (MIS) ultraviolet (UV) sensors with an La2O3 insulating layer. With a 5V applied bias, the leakage current of the fabricated MIS sensors with La2O3 insulating layers may be low to 4.95×10−11 A. The dark current was substantially reduced, and the UV-to-visible contrast ratio was enhanced by inserting the La2O3 layer. Furthermore, the noise equivalent power was substantially reduced, and detectivity was enhanced by using La2O3 insulating layers. [Copyright &y& Elsevier]

We have employed technology computer-aided design – a Synopsys® tool to carry out a comparative study of the electrical behaviour of the metal–insulator–semiconductor Schottky diodes with different metal contacts (Ag, Au, Pt and Cr), on n-Si(100). We employed physics models to determine the Shockley–Read–Hall (SRH) and Auger recombination rates as a function of electric field profile in the depletion region. An insight was obtained as variation in the electric field at the metal–semiconductor interface due to work function variation affected the current mechanisms and recombination rates. The results were compared with the existing models. On the basis of analysis, merits and demerits of Schottky junctions formed due to these metals are discussed. The ideality factor of Au and Pt was found to be just around 2.0, while it was higher for Cr and Ag. However, the barrier height in the case of Cr was small, thus making it another possible metal layer for the Schottky contact. Similarly, SRH recombination rates were almost negligible for Au and Pt metal layer and became appreciable for Cr and much higher in Ag, making it not a good choice for the Schottky contact. [ABSTRACT FROM PUBLISHER]

In this paper, layered ZnO nanowall networks were directly grown on Al substrates using a hydrothermal method without predepositing seed layers. The individual ZnO nanowalls with a thickness of several nanometers and a size of several hundred nanometers were (002) surface dominated, in which the preferential growth direction of ZnO was suppressed. White electroluminescence devices were fabricated based on Au/polymethylmethacrylate/ZnOnanowall (metal-insulator-semiconductor) structures. The chromaticity coordinate of the electroluminescence spectrum for the optimal device was calculated as (0.27, 0.34), which is close to (0.33, 0.33) of standard white light. [ABSTRACT FROM AUTHOR]

To investigate and develop novel silicon-based electronic components, the electro-physical effects in a metal-insulator-semiconductor (MIS) structure with nanometer size parameters, gained by enhancement of the silicon doping level up to N ∼ 10 cm and reduction of the oxide thickness down to 0.4-4.0 nm, have been studied. As a result of such changes, the MIS nanostructure satisfies necessary and sufficient conditions for the electron resonant tunneling that can be observed at relatively low (some volts) reverse biases. Thereby a MIS capacitor can be transformed into a resonant-tunneling diode with substantial extension of its properties and functions. [ABSTRACT FROM AUTHOR]

The causes of changes that occur in a thin-film electroluminescent metal-insulator-semiconductor-insulator-metal waveguide structure based on ZnS:Cr (Cr concentration of ∼4 × 10 cm) upon lasing (λ ≈ 2.6 μm) and that induce lasing cessation are studied. It is established that lasing ceases because of light-scattering inhomogeneities formed in the structure and, hence, optical losses enhance. The origin of the inhomogeneities and the causes of their formation are clarified by studying the surface topology and the crystal structure of constituent layers of the samples before and after lasing. The studies are performed by means of atomic force microscopy and X-ray radiography. It is shown that a substantial increase in the sizes of grains on the surface of the structure is the manifestation of changes induced in the ZnS:Cr film by recrystallization. Recrystallization is initiated by local heating by absorbed laser radiation in existing Cr clusters and quickened by a strong electric field (>1 MV cm). The changes observed in the ZnS:Cr film are as follows: the textured growth of ZnS crystallites, an increase in the content of Cr clusters, and the appearance of some CrS and a rather high ZnO content. Some ways for improving the stability of lasing in the ZnS:Cr-based waveguide structures are proposed. [ABSTRACT FROM AUTHOR]

In this paper, we present the frequency and voltage dependence of the capacitance in metal–insulator–semiconductor (MIS) structures fabricated with polymethyl-methacrylate (PMMA), as dielectric and three semiconductor polymers: poly(3-hexylthiophene), poly [N-9”-hepta-decanyl-2, 7-carbazole-ALT-5, 5-(4^\prime 7^\prime di-2-thienyl-2^\prime~1^\prime 3^\prime benzothiadiazole)], and poly[(9, 9-dioctylfluorenyl-2, 7-diyl)-CO-bithiophene]. It is shown that the dielectric constant of PMMA varies in the frequency range <1~MHz. In addition, the effect of the not yet depleted semiconductor can become important even in relatively thin layers and the presence of series resistance at the contacts can significantly modify the behavior of the capacitance–voltage (CV) curves. The calculated CV curves, in which specific material and interface properties are taken into account, are compared with the measured ones to identify the effects that determine the behavior of the capacitance with voltage and frequency for each analyzed MIS structure. [ABSTRACT FROM AUTHOR]

Electrically pumped ultraviolet random lasing was achieved in metal-insulator-semiconductor (MIS) diodes based on ZnO films at room temperature. The ZnO films were grown by plasma assisted molecular beam epitaxy. Two different kinds of insulator layers, SiO (0< x≤2) and AlO (0< x≤1.5) were deposited by electron beam evaporation. X-ray diffraction experiments found these oxide layers were amorphous (or microcrystals), and X-ray photoelectron spectroscopy confirmed the Si and Al were fully oxidized. Compared with devices using SiO as the insulator layer, diodes with evaporated AlO layers showed a lower working threshold forward current (∼20 mA to ∼26 mA) and higher emission intensity. Periodic features indicating formation of closed-loop paths were deduced by the power Fourier transform of electroluminescence spectra. The cavity length of both devices increased as forward currents increased, while a larger cavity length was always obtained in the AlO-involved device under the same working current. The improved performance was attributed to larger hole amount in AlO layers. These results revealed that evaporated AlO can serve as good electron blocking and hole supplying layers for hetero-structures. [ABSTRACT FROM AUTHOR]

This paper presents the design, fabrication and characterization of a capacitive pressure sensor using a commercial 0.18 μm CMOS (complementary metal-oxide-semiconductor) process and postprocess. The pressure sensor is capacitive and the structure is formed by an Al top electrode enclosed in a suspended SiO2 membrane, which acts as a movable electrode against a bottom or stationary Al electrode fixed on the SiO2 substrate. Both the movable and fixed electrodes form a variable parallel plate capacitor, whose capacitance varies with the applied pressure on the surface. In order to release the membranes the CMOS layers need to be applied postprocess and this mainly consists of four steps: (1) deposition and patterning of PECVD (plasma-enhanced chemical vapor deposition) oxide to protect CMOS pads and to open the pressure sensor top surface, (2) etching of the sacrificial layer to release the suspended membrane, (3) deposition of PECVD oxide to seal the etching holes and creating vacuum inside the gap, and finally (4) etching of the passivation oxide to open the pads and allow electrical connections. This sensor design and fabrication is suitable to obey the design rules of a CMOS foundry and since it only uses low-temperature processes, it allows monolithic integration with other types of CMOS compatible sensors and IC (integrated circuit) interface on a single chip. Experimental results showed that the pressure sensor has a highly linear sensitivity of 0.14 fF kPa-1 in the pressure range of 0-300 kPa. [ABSTRACT FROM AUTHOR]

The algorithm is suggested for calculating the I- V characteristics of a voltage- or current-controlled metal-tunnel-thin insulator-semiconductor system. The basic underlying physical models are discussed. Applicability of the algorithm is confirmed by a comparison of the simulation results with the measurement data obtained by the authors and borrowed from the literature, for several different structures. The presented information is supposed to suffice for calculating the electrical characteristics of the investigated structures with the various combinations of materials: metal or polysilicon gate, single-layer or stacked insulator, and semiconductor with any doping type and level. [ABSTRACT FROM AUTHOR]

The current-voltage characteristics of MIS (metal-insulator-semiconductor) structures with insulators based on silicon oxide, fabricated by low-frequency (55 kHz) plasma-enhanced chemical vapor deposition are studied. A specific feature of the used insulators is that there are inclusions of particles of other materials with narrower band gaps present. It is found that such structures possess the property of bipolar conductivity switching. The MIS structures with a multilayer insulator containing additional nanoscale siliconnitride layers exhibit the best characteristics of the conductivity switching effect. [ABSTRACT FROM AUTHOR]

Electrical characterization of a Pd / TiO2 / Si MIS structure has been reported in this paper. The TiO2 layer has been deposited on n-Si substrate by spin coating sol-gel process using Titanium Tetraisopropoxide [Ti(OC3H7)4]. The current-voltage and capacitance-voltage characteristics were studied at room temperature (300 K) by applying the dc bias gate voltage swept from - 3 to 3 V for the frequency range of 50 kHz to 1 MHz. The study reveals that the capacitance in the accumulation region has frequency dispersion in high frequencies (> 10 kHz) which is attributed to leakage behavior of TiO2 insulating layer, interface states and oxide defects. Different models of current conduction mechanism have been applied to study the measured data. It is found that Schottky-Richardson (SR) emission model is applicable at low bias voltage, Frenkel-Poole (FP) emission model at moderate bias voltages while Fowler-Nordheim (FN) tunneling dominates at higher bias voltages. TiO2 based MIS devices having high dielectric constant and good interface quality with Si substrate are expected to play a major role in microelectronic applications. [ABSTRACT FROM AUTHOR]

Abstract: The admittance spectra and current–voltage (I–V) characteristics are reported of metal–insulator–metal (MIM) and metal–insulator–semiconductor (MIS) capacitors employing cross-linked poly(amide–imide) (c-PAI) as the insulator and poly(3-hexylthiophene) (P3HT) as the active semiconductor. The capacitance of the MIM devices are constant in the frequency range from 10Hz to 100kHz, with tan δ values as low as 7×10−3 over most of the range. Except at the lowest voltages, the I–V characteristics are well-described by the Schottky equation for thermal emission of electrons from the electrodes into the insulator. The admittance spectra of the MIS devices displayed a classic Maxwell–Wagner frequency response from which the transverse bulk hole mobility was estimated to be ∼2×10−5 cm2 V−1s−1 or ∼5×10−8 cm2 V−1s−1 depending on whether or not the surface of the insulator had been treated with hexamethyldisilazane (HMDS) prior to deposition of the P3HT. From the maximum loss observed in admittance-voltage plots, the interface trap density was estimated to be ∼5×1010 cm−2 eV−1 or ∼9×1010 cm−2 eV−1 again depending whether or not the insulator was treated with HMDS. We conclude, therefore, that HMDS plays a useful role in promoting order in the P3HT film as well as reducing the density of interface trap states. Although interposing the P3HT layer between the insulator and the gold electrode degrades the insulating properties of the c-PAI, nevertheless, they remain sufficiently good for use in organic electronic devices. [Copyright &y& Elsevier]

This study examines the praseodymium-oxide- (Pr2O3- passivated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) with high dielectric constant in which the AlGaN Schottky layers are treated with P2S5/(NH4)2SX + ultraviolet (UV) illumination. An electron-beam evaporated Pr2O3 insulator is used instead of traditional plasma-assisted chemical vapor deposition (PECVD), in order to prevent plasma-induced damage to the AlGaN. In this work, the HEMTs are pretreated with P2S5/(NH4)2SX solution and UV illumination before the gate insulator (Pr2O3) is deposited. Since stable sulfur that is bound to the Ga species can be obtained easily and surface oxygen atoms are reduced by the P2S5/(NH4)2SX pretreatment, the lowest leakage current is observed in MIS-HEMT. Additionally, a low flicker noise and a low surface roughness (0.38 nm) are also obtained using this novel process, which demonstrates its ability to reduce the surface states. Low gate leakage current Pr2O3 and high-k AlGaN/GaN MIS-HEMTs, with P2S5/(NH4)2SX + UV illumination treatment, are suited to low-noise applications, because of the electron-beam-evaporated insulator and the new chemical pretreatment. [ABSTRACT FROM AUTHOR]

Abstract: SiO2 nanocrystals embedded in Lu2O3 thin film were fabricated using pulsed-laser deposition method. Two dimensional finite element calculations clearly reveal that SiO2 nanocrystals certainly experienced great compressive stress in Lu2O3 thin film. This may lead to a great deal of stress-induced defects at the interface of SiO2 nanocrystals embedded in Lu2O3 thin film and thus induced the observed photoluminescence peak and charge storage properties. The findings presented here indicate that the matrix environment of the nanocrystals plays a significant role in determining their electrical and optical properties. [Copyright &y& Elsevier]

This letter demonstrates that GaN-based MIS-HEMTs submitted to stress with high-temperature, high drain bias, and constant source current (HTSC stress) may show degradation modes that are not detectable during standard high temperature reverse bias (HTRB) stress. Based on a number of stress/recovery experiments, we demonstrate the following novel results: 1) the combined presence of high drain bias and constant drain–source current (HTSC stress) can lead to a significant increase in ON-resistance ( R\mathrm{\scriptscriptstyle ON} ) that is not detected under conventional HTRB stress; 2) R\mathrm{\scriptscriptstyle ON} increases without changes in the threshold voltage, indicating that charge trapping takes place in the access regions, and not under the gate; 3) the R\mathrm{\scriptscriptstyle ON} increase has a monotonic dependence on the source current flowing during stress; and 4) for the same stress current level, the R\mathrm{\scriptscriptstyle ON} increase has a negative dependence on temperature. The strong correlation between R\mathrm{\scriptscriptstyle ON} increase and source current and the negative temperature coefficient strongly support the hypothesis that trapping originates from the injection of hot electrons toward the gate–drain access region. [ABSTRACT FROM PUBLISHER]

In this letter, an improved 4H–SiC step trench-gate power metal–oxide–semiconductor field-effect transistor (MOSFET) with a p-n junction in the trench is proposed. The step trench significantly reduces the ON-resistance of the device. And the p-n junction in the trench reduces the gate charge. Compared with the conventional p+ shielding trench MOSFET structure, simulation results show that the specific ON-resistance and gate charge of the proposed device are improved by 26.4% and 34.7%, respectively. A 43.4% improvement in the figure of merit (including the breakdown voltage and ON-resistance) is also observed. [ABSTRACT FROM PUBLISHER]

The effect of phosphorus implantation into a 4 H-SiC epitaxial layer immediately before the thermal growth of a gate insulator in an atmosphere of dry oxygen on the reliability of the gate insulator is studied. It is found that, together with passivating surface states, the introduction of phosphorus ions leads to insignificant weakening of the dielectric breakdown field and to a decrease in the height of the energy barrier between silicon carbide and the insulator, which is due to the presence of phosphorus atoms at the 4 H-SiC/SiO interface and in the bulk of silicon dioxide. [ABSTRACT FROM AUTHOR]

Abstract: Hysteresis behaviour in sandwich structure — zirconium oxide/chemical silicon oxide, annealed at temperature of 850 °C in oxygen ambient, was studied. Formation of thin ZrSi x O y layer due to the high temperature annealing was found. Metal–insulator–semiconductor (MIS) capacitors using ZrO2/ZrSi x O y /SiO x insulator were studied. High-frequency capacitance–voltage (HF C–V), current–voltage (I–V) and current–time (I–t) measurements were carried out on the Al/ZrO2/ZrSi x O y /SiO x /Si capacitors. Two leakage current components were identified — tunneling current component at high electric fields and transient current component at low fields. The transient leakage currents are due to charge trapping phenomena. The measured I–t characteristics are related with charging/discharging and dielectric relaxation phenomena. A counter-clockwise HF C–V hysteresis, larger than 2 V at thickness of the stack structure of about 50 nm was observed. Metal–insulator–semiconductor field effect transistors (MISFETs) using ZrO2/ZrSi x O y /SiO x -gate insulator were studied. P-channel MISFETs with aluminum gate electrode were fabricated on standard n-type silicon substrates. Due to charging/discharging phenomena in the gate dielectric the transistors can be switched between On- and Off-state with the polarity of applied stress voltage. [Copyright &y& Elsevier]

Abstract: In this work, we report on two properties of the oxidation of tantalum silicide (Ta2Si) on SiC substrates making this material of interest as insulator for many wide bandgap or compound semiconductors. The relatively high oxidation rate of tantalum silicide to form high-k insulator layers and its ability for being oxidized in diluted N2O ambient in a manner similar to the oxidation in O2 are investigated. Metal–insulator–semiconductor capacitors have been used to establish the actual applicability and constrain of the high-k insulator depending on the oxidation conditions. At 1050°C, the reduction of the oxidation time from 1h to 5min affects primordially the SiO x interfacial layer formed between the bulk insulator and the substrate. This interfacial layer strongly influences the metal–insulator–semiconductor performances of the oxidized Ta2Si layer. The bulk insulator basically remains unaffected although some structural differences arise when the oxidation is performed in N2O. [Copyright &y& Elsevier]

• Zinc sulfide (ZnS) thin-film was grown over HgCdTe substrate for passivation. • The thermal evaporation technique was used for the deposition of a thin film. • Excellent surface morphology and stoichiometry of ZnS film were achieved. • The electrical properties of the grown thin film were studied using MIS device. • ZnS was found as an effective passivation agent for HgCdTe-based IR detectors. Zinc sulfide (ZnS) thin films were developed on the mercury cadmium telluride (HgCdTe) substrate using the thermal evaporation technique and investigated with X-ray diffraction, energy dispersive analysis of X-rays, atomic force microscopy (AFM) and capacitance-voltage (C-V). The obtained results confirm that the films have a cubic zinc-blend structure with (111) preferred orientation and nearly stoichiometric composition. The AFM measurement reveals that the film is uniform, densely packed and has a smooth surface or very low roughness. The C-V measurement of a ZnS/HgCdTe based metal-insulator-semiconductor device provides the utility of ZnS thin film as a passivation layer for the HgCdTe substrate. The evaluated fixed-charge density, slow state density and fast state density of the device are 4.98 × 1010 cm−2, 4.22 × 1010 cm−2 and 5.32 × 1011 cm−2 eV−1, respectively. Thus, the grown ZnS thin film could be used as a suitable passivation agent in HgCdTe-based infrared detector fabrication. [ABSTRACT FROM AUTHOR]

This paper presents a rigorous field theoretical analysis of slow wave mode propagation in coplanar waveguide (CPW) metal-insulator-semiconductor (MIS) transmission lines with a laterally confined doping profile. Two types of transmission line structures are investigated-bulk silicon and semiconductor-on-insulator (SOI). In both cases a Gaussian profile of the doping depth is assumed. It was found that an optimum lateral width of the doping region exists for which both structures exhibit a much better slow wave factor at lower losses than traditional thin-film MIS transmission lines. The abrupt transition between MIS, CPW, and CPW on a normal insulating substrate was investigated as well. It was found that the reflection coefficient increases significantly with frequency and when the lateral width of the doping region is extended over the whole cross section of the CPW. The investigation was carried out using the frequency-domain transmission line modeling (TLM) (FDTLM) method. [ABSTRACT FROM AUTHOR]

Aluminum nitride is a promising insulator for the fabrication of 6H-silicon carbide (6H-SiC) metal-insulator-semiconductor (MIS) devices for high temperature and high power applications. Due to the fact that the electrical response of a Au/AlN/SiC MIS structure is sensitive to the quality of the insulator-semiconductor interface as well as the insulator itself, growth of AlN on 6H-SiC using different growth procedures will produce AlN/6H-SiC structures of different electrical characteristics. In this study, we compared the capacitance-voltage, dc current voltage and high electric field breakdown characteristics of various AlN/6H-SiC MIS structures grown by different low-pressure metalorganic chemical vapor deposition growth procedures. Our results demonstrated that depending on the growth procedure, Au/AlN/SiC MIS structures with low current leakage, low interface state density, good high temperature stability and high electric field breakdown voltage could be obtained. [ABSTRACT FROM AUTHOR]

4H silicon carbide (4H-SiC) metal–insulator–semiconductor field-effect transistors (MISFETs) with 4H aluminum nitride (4H-AlN) gate insulators have been demonstrated. The 4H-AlN layers are isopolytypically grown on 4H-SiC (11\bar20) by molecular-beam epitaxy. Gate controlled transistor operation was realized using the AlN/SiC MISFETs. The MISFETs exhibit a low gate leakage current (<10^-10~A) and normally on characteristics with a threshold voltage of approximately -10~V and a field-effect mobility of 0.5 cm^2V^-1s^-1. Capacitance–voltage measurements of AlN/SiC MIS capacitors reveal a large negative flat band shift of -10.9~V, which is consistent with the normally on characteristics. [ABSTRACT FROM AUTHOR]

Superior performance by annealed TiO 2 /In 2 O 3 nanowire (NW) metal-insulator-semiconductor device, synthesized using electron beam evaporation incorporating catalytic free glancing angle deposition technique. TiO 2 /In 2 O 3 NW annealed at 600 °C showed 15,000 times photosensitivity enhancement under wavelength 330 nm illumination at −5 V as compared to as-deposited TiO 2 /In 2 O 3 NW. TiO 2 /In 2 O 3 NW annealed at 600 °C exhibits high responsivity and quantum efficiency of 325 A/W and 1,20,000 respectively at 330 nm. Further, it exhibited low noise-equivalent power of 9.62 × 10−17 W and high detectivity of 2.91 × 1016 Jones with fast photoresponse speed of 0.2622 s and 0.1334 s rise and fall time respectively. This superlative performance of TiO 2 /In 2 O 3 NW heterostructure annealed at 600 °C gives the path for proficient optoelectronics UV photodetection applications. • Succesfully synthesized TiO 2 /In 2 O 3 nanowire (NW) device using e-beam evaporator with glancing angle deposition technique and annealed at various temperature. • 15,000 times enhanced photosensitivity by TiO 2 /In 2 O 3 NW annealed at 600 °C at 330 nm. • High responsivity and quantum efficiency of 325 A/W and 1,20,000 respectively at 330 nm by samples annealed at 600 °C. • Improved noise-equivalent power and detectivity by TiO 2 /In 2 O 3 nanowire annealed at 600 °C. [ABSTRACT FROM AUTHOR]

In this letter, 600-V normally-OFF SiNx/AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) is reported. Normally-OFF operation and low OFF-state gate leakage are obtained by using fluorine plasma ion implantation in conjunction with the adoption of a 17-nm SiNx thin film grown by plasma-enhanced chemical vapor deposition as the gate insulator. The normally-OFF MIS-HEMT exhibits a threshold voltage of +3.6~V, a drive current of 430 mA/mm at a gate bias of 14 V, a specific ON-resistance of 2.1 m\Omega\cdotcm^2 and an OFF-state breakdown voltage of 604 V at a drain leakage current of 1 \muA/mm with VGS=0~\rm V, and the substrate grounded. Effective current collapse suppression is obtained by AlN/SiNx passivation as proved by high-speed pulsed I\--V and low-speed high-voltage switching measurement results. [ABSTRACT FROM AUTHOR]

In this Letter, the device performance of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MISHEMTs) on silicon substrate using 10-nm-thick atomic-layer-deposited ZrO2 as gate dielectrics is reported. The ZrO2 AlGaN/GaN MISHEMTs showed improved maximum drain current density (Idmax) with high peak transconductance (gmmax) as comparison to Schottky-barrier-gate HEMTs (SB-HEMTs). Also compared to SB-HEMTs, reverse gate leakage current was four orders of magnitude lower and forward gate bias extended to +7.4 V. At energy from -0.29 eV to -0.36 eV, low interface trap state density evaluated by AC conductance and 'Hi-Lo frequency' methods indicates good quality of atomic-layer-deposited ZrO2 dielectric layer. [ABSTRACT FROM AUTHOR]

In metal-insulator-semiconductor (MIS) capacitors, there are several components that influence the channel capacitance. Charges accumulate or deplete from the Γ, X, and L valleys for electrons and light, heavy and split-off bands for holes. Additionally dopants can change occupancy as a result of band-bending. A simple numerical method for calculating these components is presented along with potential implications for MIS capacitor characterization. Calculations for In0.53Ga0.47As indicate capacitance due to changes in dopant impurity ionization becomes significant around ND=1×1017 cm-3. The results also suggest that more detailed transient models are needed to verify the assumptions used in interface state characterization. [ABSTRACT FROM AUTHOR]

Resistive switching materials are promising candidates for nonvolatile data storage and reconfiguration of electronic applications. Intensive studies have been carried out on sandwiched metal-insulator-metal structures to achieve high density on-chip circuitry and non-volatile memory storage. Here, we provide insight into the mechanisms that govern highly reproducible controlled resistive switching via a nanofilament by using an asymmetric metal-insulator-semiconductor structure. In-situ transmission electron microscopy is used to study in real-time the physical structure and analyze the chemical composition of the nanofilament dynamically during resistive switching. Electrical stressing using an external voltage was applied by a tungsten tip to the nanosized devices having hafnium oxide (HfO2) as the insulator layer. The formation and rupture of the nanofilaments result in up to three orders of magnitude change in the current flowing through the dielectric during the switching event. Oxygen vacancies and metal atoms from the anode constitute the chemistry of the nanofilament. [ABSTRACT FROM AUTHOR]

The short-circuit capability of power switching devices plays an important role in fault detection and the protection of power circuits. In this work, an experimental study on the short-circuit (SC) capability of commercial 600 V Gallium Nitride enhancement-mode high-electron-mobility transistors (E-HEMT) is presented. A different failure mechanism has been identified for commercial p-doped GaN gate (p-GaN) HEMT and metal-insulator-semiconductor (MIS) HEMT. In addition to the well known thermal breakdown, a premature breakdown is shown on both GaN HEMTs, triggered by hot electron trapping at the surface, which demonstrates that current commercial GaN HEMTs has requirements for improving their SC ruggedness. [ABSTRACT FROM AUTHOR]

An AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) on Si substrate was obtained with 18 nm silicon nitride (Si3N4) grown by low-pressure chemical vapour deposition (LPCVD) as the gate insulator. The D-mode MISHEMT shows a high Idss of 16.8 A at Vg = 3 V, a high breakdown voltage (BV) of 600 V and a low-specific on-resistance of 2.3 mΩ.cm2. The power device figure of merit (FOM = BV2/Ron,sp) is calculated as 157 MW.cm-2. The good insulation effects of LPCVD-Si3N4 were also demonstrated by the low gate leakage current of 154 nA at Vds = 600 V and Vgs = -14 V. Furthermore, an E-mode device was realised by a low-voltage silicon metal-oxidesemiconductor field-effect transistor in series; the Vth was determined to be 2.6 V. The high Idss, low-specific on-resistance, high BV and positive Vth show the potential and advantages of GaN MIS-HEMTs for power switching applications. [ABSTRACT FROM AUTHOR]