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51. Improved sidewall doping of extensions by AsH3 ion assisted deposition and doping (IADD) with small implant angle for scaled NMOS Si bulk FinFETs

54. Impact of through silicon via induced mechanical stress on fully depleted Bulk FinFET technology

55. Phosphorus doped SiC Source Drain and SiGe channel for scaled bulk FinFETs

56. RMG Tech. Integration in FinFET Devices

57. Device Architectures and Their Integration Challenges for 1x nm node: FinFETs with High Mobility Channel

60. Atom Probe Tomography for 3D-dopant analysis in FinFET devices

61. Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs

62. On the rseries extraction techniques for sub-22nm CMOS finfet and SiGe technologies

65. Superior NBTI reliability of SiGe channel pMOSFETs: Replacement gate, FinFETs, and impact of Body Bias

69. Ion-implantation-based low-cost Hk/MG process for CMOS low-power application

74. High-Performance 45nm node CMOS Transistors Featuring Flash Lamp Annealing (FLA)

75. Layout-Design Methodology of 0.246-¿m2-Embedded 6T-SRAM for 45-nm High-Performance System LSIs

76. A 45nm High Performance Bulk Logic Platform Technology (CMOS6) using Ultra High NA(1.07) Immersion Lithography with Hybrid Dual-Damascene Structure and Porous Low-k BEOL

77. Newly Found Anomalous Gate Leakage Current (AGLC) for 65 nm Node and Beyond, and Its Countermeasure Using Nitrogen Implanted Poly-Si

78. Nested polymerase chain reaction for assessing the clinical course of tuberculous meningitis

100. Correlation Between the Vth Adjustment of nMOSFETs With HfSiO Gate Oxide and the Energy Profile of the Bulk Trap Density.

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