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Compound semiconductors belong to the most important materials for optoelectronic applications. Many of them exhibit favorable optical properties, such as a direct energy band gap (in contrast to silicon) and high-absorption coefficients over a wide spectral range. Moreover, varying the composition of the compound or substituting some of its elements often allows for controlled band gap engineering and optimization for specific applications. Because many compound semiconductors enable efficient conversion of light into electricity and vice versa, they are commonly used materials for optoelectronic devices.

The superior transport properties of III-V materials make them attractive choices to enable improved performance at low power. This paper examines the integration challenges of III-V materials in advanced CMOS logic at or beyond the 11 nm technology node, and reports VLSI compatible junction, contact and gate stack process modules with Xj¬5x1019cm-3, ρc= 6 Ω.µm2 and Dit = 4 x 1012 eV-1.cm-2.

Deep acceptor doping of β-Ga2O3 with Mg and N was demonstrated by implantation of the impurity ions into n-type bulk substrates. Systematic physical and electrical characterizations were performed to demonstrate recovery of the implantation-damaged crystals and electrical activation of the dopant atoms by thermal annealing at 1000–1200 °C in an N2 atmosphere. N was found to exhibit much lower thermal diffusivity than Mg, thus enabling the use of higher annealing temperatures to maximize N activation efficiency without significantly altering the impurity profile. Consequently, an n-Ga2O3/Ga2O3:N/n-Ga2O3 structure was capable of sustaining a much larger voltage across its end terminals than its Mg-doped counterpart. The development of an ion implantation technology for acceptor doping of β-Ga2O3 creates unique opportunities for designing and engineering a variety of high-voltage β-Ga2O3 devices.

A vertical β-Ga2O3 metal–oxide–semiconductor field-effect transistor featuring a planar-gate architecture is presented. The device was fabricated by an all-ion-implanted process without requiring trench etching or epitaxial regrowth. A Mg-ion-implanted current blocking layer (CBL) provided electrical isolation between the source and the drain except at an aperture opening through which drain current was conducted. Successful transistor action was realized by gating a Si-ion-implanted channel above the CBL. Thermal diffusion of Mg induced a large source–drain leakage current through the CBL, which resulted in compromised off-state device characteristics as well as a reduced peak extrinsic transconductance compared with the results of simulations.

The effects of ionizing radiation on β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) were investigated. A gamma-ray tolerance as high as 1.6 MGy(SiO2) was demonstrated for the bulk Ga2O3 channel by virtue of weak radiation effects on the MOSFETs' output current and threshold voltage. The MOSFETs remained functional with insignificant hysteresis in their transfer characteristics after exposure to the maximum cumulative dose. Despite the intrinsic radiation hardness of Ga2O3, radiation-induced gate leakage and drain current dispersion ascribed respectively to dielectric damage and interface charge trapping were found to limit the overall radiation hardness of these devices.

We present a high-performance SiN/AlGaN (cap)/GaN (channel)/AlN (barrier)/GaN (buffer) metal-insulator-semiconductor high-electron-mobility transistor grown on the N-face, in which the 2-D electron gas (2DEG) is induced at the top GaN/AlN interface. The use of AlN eliminates alloy disorder scattering to the 2DEG and provides strong back-barrier confinement of the 2DEG under high electric fields for device scaling. Devices with 0.7-mum gate length showed a current-gain cutoff frequency (fT) of 17 GHz and a power-gain cutoff frequency (f max) of 37 GHz. A continuous-wave output power density of 7.1 W/mm was measured at 4 GHz, with 58% power-added efficiency and a large-signal gain of 15.3 dB at a drain bias of 35 V.

N-face AlGaN (cap)/GaN (channel)/AlGaN (barrier)/GaN (buffer) high electron mobility transistors (HEMTs) provide a simple solution for strong confinement of the two-dimensional electron gas (2DEG) from the back since carriers are induced on top of the AlGaN barrier. To reduce the adverse effects of random alloy scattering from the AlGaN barrier, an N-face GaN-spacer HEMT was designed with an epi-structure consisting of an AlGaN (cap)/GaN (channel)/AlN/GaN (spacer)/AlGaN (barrier)/GaN (buffer). The 2DEG is confined at the GaN (channel)/AlN interface, while the GaN-spacer layer separates the 2DEG from the AlGaN barrier. The large polarization-induced electric field of the AlN and its large conduction band discontinuity with GaN provide strong confinement for good pinch-off and low output conductance under high electric fields. Up to 20% improvement in electron mobility was measured in these devices. The devices showed a current gain cut-off frequency (f t ) of 24 GHz and power gain cut-off frequency (f max ) of 44 GHz for a nominal gate length of 0.7 μm. An output power density of 4.5 W/mm was measured at 4 GHz, with 34% power added efficiency and a gain of 10.3 dB at a drain bias of 40 V.

N-polar (000) and Ga-polar (0001) GaN templates were patterned with holographic lithography and etched to form nanopillars (NP) and nanostripes (NS) arrays, upon which InGaN and GaN was subsequently regrown by metal organic chemical vapor deposition (MOCVD). A wide range of growth conditions were explored to determine the structural impact of the growth conditions. The results were evaluated by scanning electron microscopy (SEM), and transmission electron microscopy (TEM). It was observed that the initial polarity of the GaN template used to form the pillar or stripe nanostructures had a significant impact upon the results of the regrowth. The Ga-polar NP exhibited (0001), {010}, and {011} facets, while the N-polar NP exhibited (000) and {010} facets. The NS samples also exhibited different facet formation depending upon the initial polarity. (© 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

N-polar (000-1) GaN templates were patterned using holographic lithography to create nanopillar (NP) and nanostripe (NS) arrays. InGaN and GaN was subsequently regrown on the patterned wafers by metalorganic chemical vapor deposition (MOCVD). The impact of changes in V/III ratio and growth temperature were investigated using scanning electron microscopy (SEM), transmission electron microscopy (TEM), and photoluminescence (PL). Highly selective growth of InGaN and GaN on planes close to the {10-10} m-planes was observed over a wide range of growth conditions as well as different facet formation compared to regrowth on Ga-polar (0001) NP and NS arrays.

Gallium oxide (Ga2O3) possesses excellent material properties especially for power device applications. It is also attractive from an industrial viewpoint since large-size, high-quality wafers can be manufactured by using simple methods. These two features have drawn much attention to Ga2O3 as a new wide bandgap semiconductor following SiC and GaN. In this report, we describe the recent progress in development on fundamental technologies for Ga2O3 devices, covering wafer production from melt-grown bulk single crystals, homoepitaxial thin-film growth by halide vapor phase epitaxy, as well as device processing and characterization of metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes.

High-electron-mobility transistor (HEMT) structures were regrown by molecular beam epitaxy on GaN-on-SiC templates and free-standing (FS) GaN substrates with very low threading dislocation density (TDD). To ensure a high buffer breakdown voltage, the thickness of the unintentionally doped (UID) GaN buffer layer, d UID, was reduced to 200 nm for the HEMTs regrown on FS GaN. A reduction in TDD entailed an increase in the three-terminal breakdown voltage for passivated HEMTs. With a low d UID, the proximity effects of the carbon-doped GaN buffer were evident. A power-added efficiency (PAE) of 37% and continuous-wave power output (P out) of 4.2 W/mm were measured at 4 GHz with a drain bias of 40 V for a HEMT on FS GaN without a back barrier. By including a 5 nm Al0.3Ga0.7N back barrier, PAE and P out improved to 50% and 6.7 W/mm, respectively, at a drain bias of 40 V.

ZnO nano-rods were grown on polycrystalline Zn foil by cathodic electrodeposition in an aqueous zinc chloride/calcium chloride solution at 80?C. Variations in the solution concentration and substrate surface preparation were explored to shed light on the nucleation of the nano-rods. It was found that the nano-rod diameter increased with increasing solution concentration. Rolling striations and native ZnO on the surface of the Zn appeared to enhance nucleation and allowed more highly aligned, dense structures to be grown. By using low solution concentrations (5.0 ? 10?4?M?ZnCl 2) and non-electropolished Zn substrates, well faceted, hexagonal nano-rod structures of dimension ~80?nm diameter and }1\ntilde \micmu {\mathrm {m}}$>>1??m length were obtained. X-ray studies showed the samples to be highly aligned but containing a Zn-oxychloride impurity phase. Annealing caused the impurity phase to disappear and resulted in the films having a sharp photoluminescence double peak at 380/396 nm.

Distinct trap levels in the drain access regions of an N-polar GaN MIS-HEMT are investigated before and after semi-on dc stressing by thermal and optical trap spectroscopies. The most prominent dc stress effect was an increase in concentration of a pre-existing electron trap with an activation energy of 0.54 eV, accompanied by a decrease in concentration of an electron trap with a 0.65-eV activation energy. These distinct states had similar concentrations before stressing, with the 0.54-eV trap concentration dominating (by 6×) after stress. Deeper states revealed via optical measurements showed a mild ~20% increase in total concentration after stressing.

A current aperture vertical electron transistor (CAVET) with a Mg-ion-implanted current blocking layer (CBL) and a channel regrown by plasma assisted molecular beam epitaxy (MBE), is successfully demonstrated on bulk GaN to work as a high voltage device. The fabrication of the device combined a drift region grown by metalorganic chemical vapor deposition (MOCVD), to hold the blocking voltage, with AlGaN/GaN layers regrown by plasma-MBE to conduct current. The device registered a maximum current of 4 kA· cm-2 under direct-current operation offering a specific on-state resistance Ron - A of 2.2 mΩ·cm2. With 80 μs pulses applied to the gate, the devices showed no dispersion. The increased aperture length Lap resulted in the decrease in specific Ron, as expected. The impact of the gate overlap to aperture Lgo on the leakage current was studied, where the leakage current was found to increase with a smaller overlap.

We report enhanced dc and small-signal RF performance of enhancement-mode (E-mode) metal-oxide-semiconductor heterojunction field-effect transistors (MOS-HFETs) in N-polar GaN technology with an ultrathin 5-nm GaN channel and graded AlGaN back-barrier structure with a record on-resistance (Ron) of 0.66 Ω·mm. The device has a maximum drain current (Id) of 1.15 A/mm, a peak transconductance (gm) of 510 mS/mm, and a peak current-gain cutoff frequency (ft) of 122 GHz, with a positive threshold voltage (Vth) of 1.6 V. The device shows improved saturation and pinchoff characteristics compared to the previously reported N-polar E-mode HFETs with a maximum Ion/Ioff ratio of 2.2 × 105.

Enhancement-mode β-Ga2O3 metal–oxide–semiconductor field-effect transistors with low series resistance were achieved by Si-ion implantation doping of the source/drain contacts and access regions. An unintentionally doped Ga2O3 channel with low background carrier concentration that was fully depleted at a gate bias of 0 V gave rise to a positive threshold voltage without additional constraints on the channel dimensions or device architecture. Transistors with a channel length of 4 µm delivered a maximum drain current density (I DS) of 1.4 mA/mm and an I DS on/off ratio near 106. Nonidealities associated with the Al2O3 gate dielectric as well as their impact on enhancement-mode device performance are discussed.

We report gate-first enhancement-mode (E-mode) N-polar GaN MISFET devices with self-aligned source/drain regions by molecular beam epitaxy regrowth and with a SiNx gate dielectric. E-mode operation at Vds = 4.0 V is demonstrated for devices with gate lengths >; 0.18 μm with a 20-nm GaN channel and a high-temperature SiNx gate dielectric. A high drain current of 0.74 A/mm was measured for an Lg = 0.62-μm device with a peak transconductance of 225 mS/mm and a positive threshold voltage of 1 V. The on resistance of the device was 2 Ω·mm. Devices show short-channel effect with decreasing gate lengths.

We present a deep-recessed nitrogen-polar AlGaN/GaN MIS-HEMT employing a V-gate structure recessed through a thick GaN cap to prevent dc-to-RF dispersion. A process for selectively dry etching N-polar GaN over AlGaN has been established to achieve repeatable etch depth for the gate recess. Devices with a drawn gate length of 0.7- μm showed a current-gain cutoff frequency (fT) of 15 GHz and a power-gain cutoff frequency (fmax) of 42 GHz. A continuous-wave output power density of 5.5 W/mm was measured at 4 GHz, with a record associated power-added efficiency of 74% and a large-signal gain of 14.5 dB at a drain bias of 24 V.

Depletion-mode Ga2O3 MOSFETs were fabricated on single-crystal β-Ga2O3 (010) substrates. We applied Si-ion implantation to the ohmic contacts for low contact resistance as well as to the channel layer for reliable doping. An Al2O3 gate dielectric film formed by atomic layer deposition passivated the device surface and significantly reduced gate leakage. The MOSFETs with a simple structure exhibited complete channel pinch-off with a breakdown voltage of 415 V and a drain current on/off ratio of ten orders of magnitude at room temperature. The devices also showed stable operation up to 250°C.

A high-performance N-face GaN metal-insulator-semiconductor high-electron-mobility transistor was fabricated. A dual-AlN back-barrier scheme was developed using polarization engineering to provide a large total dipole moment, which allowed enhanced modulation doping for a higher 2-D electron gas density without parallel conduction. Devices with 0.6-mum gate length showed an fT and f max of 17 and 58 GHz, respectively. A highest power-added efficiency (PAE) of 71% at 4 GHz was measured in these devices with 20-V drain bias. At 28 V, an output power density of 6.4 W/mm with 67% PAE was achieved.

We present a systematic study of the impact of CF4 plasma treatment on GaN. It was found that CF4 plasma etches GaN at a slow rate and yields a smooth etched surface. The effect of CF4 plasma on electrical characteristics of GaN metal-semiconductor field-effect-transistor structures shows that the CF4 plasma introduces acceptors into the near surface region of the GaN, which depletes mobile electrons. It was further demonstrated that leakage current of AlGaN/GaN (or GaN) Schottky diodes can be significantly suppressed by proper CF4 plasma treatment. These unique properties of CF4 plasma can be utilized for the advanced processing of GaN transistors.

Recently, we have invested a great deal of effort to construct molecular building blocks from unusual DNA motifs. DNA is an extremely favorable construction medium. The sticky-ended association of DNA molecules occurs with high specificity, and it results in the formation of B-DNA, whose structure is well known. The use of stable-branched DNA molecules permits one to make stick-figures. We have used this strategy to construct a covalently closed DNA molecule whose helix axes have the connectivity of a cube, and a second molecule, whose helix axes have the connectivity of a truncated octahedron. In addition to branching topology, DNA also yields control of linking topology, because double helical half-turns of B-DNA or Z-DNA can be equated, respectively, with negative or positive crossings in topological objects. Consequently, we have been able to use DNA to make trefoil knots of both signs and figure of 8 knots. By making RNA knots, we have discovered the existence of an RNA topoisomerase. DNA-based topological control has also led to the construction of Borromean rings, which could be used in DNA-based computing applications. The key feature previously lacking in DNA construction has been a rigid molecule. We have discovered that DNA double crossover molecules can provide this capability. We have incorporated these components in DNA assemblies that use this rigidity to achieve control on the geometrical level, as well as on the topological level. Some of these involve double crossover molecules, and others involve double crossovers associated with geometrical figures, such as triangles and deltahedra.

We have been proposing a new oxide compound semiconductor, gallium oxide (Ga2O3), as a promising candidate for power device applications because of its excellent material properties and suitability for mass production. The 4.8-eV bandgap and the Baliga's figure of merit of Ga2O3 are much larger than those of SiC and GaN, which will enable Ga2O3 power devices with higher breakdown voltage and efficiency than SiC and GaN devices. The other important advantage of Ga2O3 is that a single-crystal bulk can be grown by using the same melt growth method as is used for sapphire. Therefore, Ga2O3 power devices have the obvious potential to surpass SiC and GaN in not only device performance but also cost effectiveness. In this work, we fabricated and demonstrated depletion-mode Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs).

Recently, III-V tunneling field effect transistors (TFET) for low voltage logic applications ( 0.53 Ga 0.47 As, (iii) InAs, (iv) InAs 0.9 Sb 0.1 /Al 0.4 Ga 0.6 Sb, and (v) InAs/GaSb as a function of doping and effective tunnel barrier height. These results confirm that heterojunctions (bandgap engineering) and doping will enhance peak (J P ) and Zener current densities beyond homojunction TDs [3], to a record 2.2MA/cm2 (J P ) and 11 MA/cm2 (@ −0.3 V), laying the fundamental groundwork for a III-V TFET at the 7 nm technology node.

This paper reports Extremely-Thin-Body (ETB) InAs quantum-well (QW) MOSFETs with improved electrostatics down to L g = 50 nm (S =103 mV/dec, DIBL = 73 mV/V). These excellent metrics are achieved by using extremely thin body (1/3/1 nm InGaAs/InAs/InGaAs) quantum well structure with optimized layer design and a high mobility InAs channel. The ETB channel does not significantly degrade transport properties as evidenced by g m >1.5 mS/μm and v in j = 2.4 × 10 cm/s.

The electron mobility in depletion-mode lateral β-Ga2O3(010) metal–oxide–semiconductor field-effect transistors (MOSFETs) with an n-channel formed by Si-ion (Si+) implantation doping was extracted using low-field electrical measurements on FET structures. An undoped Ga2O3 buffer layer protected the channel against charge compensation by suppressing outdiffusion of deep Fe acceptors from the semi-insulating substrate. The molecular beam epitaxy growth temperature was identified as a key process parameter for eliminating parasitic conduction at the buffer/substrate growth interface. Devices with a resistive buffer showed room temperature channel mobilities of 90–100 cm2 V−1 s−1 at carrier concentrations of low- to mid-1017 cm−3, with small in-plane mobility anisotropy of 10–15% ascribable to anisotropic carrier scattering.

The superior transport properties of III–V materials are promising candidates to achieve improved performance at low power. This paper examines the module challenges of III–V materials in advanced CMOS at or beyond the 10 nm technology node, and reports VLSI compatible epi, junction, contact and gate stack process modules with Xj

DC stressing of molecular beam epitaxy (MBE)-grown high electron mobility transistors (HEMTs) is found to degrade device performance primarily due to increased defect/trap formation. Using constant drain-current deep level optical/transient spectroscopy (CID-DLOS/DLTS) methods, a specific virtual-gate related electron trap with energy E C -0.45 eV was observed to increase in concentration following DC stressing. The enhanced formation of this defect correlates quantitatively with a stress-induced knee-walkout (performance-degradation) of the HEMT that manifests itself in the pulsed I–V measurements.

Degradation mechanisms in AlGaN/GaN high electron mobility transistors have been studied under pinch-off conditions. Sites of localized emission of electroluminescence (EL) in the form of hotspots, known to be related to gate leakage currents, are shown to be the result of the generation of non-radiative recombination centers in the AlGaN device layer during device stress. EL from the hotspot site contains both hot-carrier emission from the acceleration of charge carriers in the device channel and defect-related transitions. Gate leakage through the generated centers is the most likely mechanism for the observation of EL hotspots. Degradation mechanisms in AlGaN/GaN high electron mobility transistors (HEMTs) have been studied under pinch-off conditions. Sites of localized emission of electroluminescence (EL) in the form of hotspots, known to be related to gate leakage currents, are shown to be the result of the generation of non-radiative recombination centers in the AlGaN device layer during device stress. EL from the hotspot site contains both hot-carrier emission from the acceleration of charge carriers in the device channel, and defect-related transitions. Gate leakage through the generated centers is the most likely mechanism for the observation of EL hotspots.

We propose that the anomalous output conductance in N-polar GaN MIS-HEMTs was caused by ionization of donor-like traps from a net negative polarization interface. It is a low-frequency phenomenon that changes the V T of the device with V D , while no evidence of increased output conductance or related device performance degradation was found under RF conditions. Appropriate back-barrier designs are needed to mitigate the DC-G DS in N-polar GaN MIS-HEMTs.

E-mode GaN FETs fabricated on N-polar GaN have several unique scaling advantages such as vertical scaling of channel with back barrier for better electron confinement and regrowth of the n+ source/drain regions for reduced access resistance. They can also be integrated with recently demonstrated high performance N-polar D-mode [1] devices enabling novel circuit functionalities. Ga-polar E-mode devices with good performance have been demonstrated [2]; however in these devices source/drain contacts are invariably made to wideband gap Al x Ga 1−x N barriers leading to higher contact resistances which considerably limit the aggressive scaling of the device. Here we report E-mode N-polar GaN FETs fabricated with a scalable gate first process with self-aligned regrown source/drain regions and non-alloyed ohmic contacts for low access resistances. These devices show a peak drive current (I d ) of 0.74 A/mm and peak transconductance (g m ) of 250 mS/mm at L g = 0.55 µm with a threshold voltage (V th ) of 0.8 V.

GaN-based power transistors are rapidly developing as a contender for application in next generation high efficiency power electronics. They are either lateral devices like HEMTs or vertical devices of the form of the Current Aperture Vertical Electron Transistor (CAVET) [1, 2]. A CAVET (Fig.1) is a vertical device with source and gate on top and a current aperture that allows current to flow vertically down from the source to the drain. It has a current blocking layer (CBL) to block current flowing vertically through any other path but the aperture. The process flow for fabricating a CAVET is illustrated in figure 2. One way to achieve the current blocking layer is by implanting the layer with [Mg]-ion. However the difficulty in using a Mg-implanted barrier layer was the unintentional diffusion of the Mg into the overlying channel region (see Fig.3). This caused a significant threshold voltage shift in devices and in many cases the electrons in the channel were trapped or completely depleted by diffusing Mg acceptors. In this paper we report on successfully addressing this critical problem by using MBE to re-grow the channel containing the 2DEG on top of the n drift region that is grown by MOCVD resulting in devices free of dispersion (80µs pulse width) and R on less than 2.5 mΩ-cm2. Here the advantages of MBE, that of a low growth temperature and hence suppressed Mg diffusion, is combined with the advantages of MOCVD, that of a high growth rate of high purity material necessary for the thick drift region to support high voltage required in power electronics.

Recently, N-face GaN high electron mobility transistors (HEMTs) grown by plasma-assisted molecular beam epitaxy (PA-MBE) have been successfully demonstrated [1–3]. The reversed polarization in N-face (000 1) GaN compared to the Ga-face (0001) offers design advantages for the scaling of GaN HEMTs. Fig. 1 shows an illustrative N-face HEMT consisting of Al 0.1 Ga 0.9 N (cap)/GaN (channel)/AlN (barrier)/GaN (buffer) [2]. The large dipole moment in the strained AlN (ΔE P ) enables the accumulation of a two-dimensional electron gas (2DEG) and positive charges (hole traps [4]) at its top and bottom interfaces with GaN, respectively, pinning the Fermi level (E F ) at the conduction and valence band edges. The Si δ-doping supplies charges to the 2DEG and prevents dc-RF dispersion caused by the modulation of the hole traps close to the valence band edge (E V ) of the bottom AlN/GaN interface [1,4] — effectively, the ionized Si donors deplete the positive trapped charges via the field-effect. The GaN-spacer reduces remote ionized impurity scattering to the 2DEG due to the Si. With its large polarization field, the AlN provides an inherent strong back-barrier to the 2DEG for reducing short channel effects. Moreover, it is easy to engineer N-face HEMTs for low Ohmic contact resistances since the layer with narrower bandgap is exposed to the surface [5]. The polarization field in the Al 0.1 Ga 0.9 N cap reduces gate leakage with minimal 2DEG depletion.

In summary, an N-face HEMT with good DC and RF properties was demonstrated. The use of AlN for electron confinement eliminates alloy scattering and offers a strong back barrier to mitigate short channel effects for highly scaled submicron devices. N-face devices are therefore expected to deliver excellent power density and efficiency with low leakage at microwave and mm-wave frequencies.

In this paper, we discuss recent developments in our work on N-polar GaN heterostructure transistors. While most work in GaN devices has been on Ga-polar films, the opposite direction of polarization provides advantages that could be useful for different device applications. We will first discuss implications of the reversed polarization on transistor design.

We describe the development of N-polar GaN-based high electron mobility transistors grown by N2 plasma-assisted molecular beam epitaxy on C-face SiC substrates. High mobility AlGaN∕GaN modulation-doped two-dimensional electron gas channels were grown, and transistors with excellent dc and small-signal performance were fabricated on these wafers. Large-signal dispersion was observed, and the trap states responsible for this were identified, and layer designs to remove the dispersive effects of these traps were demonstrated. Finally, an AlGaN-cap layer was used to reduce gate leakage in these devices, and a low-dispersion high breakdown voltage device was achieved. This detailed study of dispersion and leakage in N-polar GaN-based transistors establishes a technological base for further development of field effect devices based on N-polar III-nitrides.

The thermal behavior of Fe as a compensating acceptor impurity in β-Ga2O3 (010) was studied in view of growing interests in semi-insulating Fe-doped Ga2O3 substrates for the realization of high-performance Ga2O3 field-effect transistors (FETs). An anomalous redistribution of Fe beyond the extent of intrinsic thermal diffusion was revealed by secondary ion mass spectroscopy in device-relevant structures where Ga2O3 grown homoepitaxially on Fe-doped substrates was doped by Si ion (Si+) implantation and annealed at high temperatures. The enhanced Fe diffusion was attributed to an athermal process involving intrinsic defects from the region of implantation damage. An undoped Ga2O3 buffer between the Si+-implanted layer and the Fe-doped substrate effectively suppressed Fe outdiffusion by protecting the substrate against unintentional ion damage or defects from a remote source, thereby preserving the electrical integrity of the Si-doped material. Temperature-dependent current-voltage measurements indicated that the undoped Ga2O3 buffer was highly resistive with inter-device leakage attributable to surface conduction via a variable-range hopping mechanism. The buffer scheme, together with dielectric passivation to eliminate surface leakage, was proposed to constitute an integral process module for future lateral Ga2O3 FET devices.

The paper reports on the characteristics of N-face AlGaN/GaN/AlGaN HEMTs. Ohmic contact optmization experiments based on the Ti/Al/Ni/Au metallization scheme commonly used for Ga-face AlGaN/GaN HEMTs were carried out and a low contact resistance of 1.3 Ohm/mm was achieved. The devices were then characterized before and after SiN passivation. Before passivation, large current dispersion was observed in 80mus pulsed I-V measurements compare to the DC I-V curves. The adoption of a SiN passivation layer improved the I-V pulsed characteristics at 80mus but current dispersion was still severe when using shorter (200ns) pulse widths

The process of charge injection plays an important role in organic semiconductor devices. We review various experimental techniques that allow injection to be separated from other competing processes, and quantify the injection efficiency of a contact. We discuss the dependence of the injection efficiency on parameters such as the energy barrier at the interface, the carrier mobility of the organic semiconductor, its carrier density (doping level), the presence of mobile ions, and the sample geometry. Based on these findings, we outline guidelines for forming ohmic contacts and present examples of contact engineering in organic semiconductor devices.

We report on the temporal evolution of the current, radiance and efficiency of electroluminescent devices based on films of [Ru(bpy)3]2+(PF6−)2 (bpy is 2,2′-bipyridyl) with various electrodes. Under forward bias (with the bottom electrode wired as the anode) the device characteristics were independent of the electrodes used. The situation was different under reverse bias, where differences were observed in the steady-state as well as in the transient characteristics of devices with different electrodes. The origin of this asymmetry is discussed.

We report an unusual transition in the conductivity of an organic semiconductor upon doping: For low doping levels, the conductivity of ${N,N,N}^{\ensuremath{'}}{,N}^{\ensuremath{'}}$-tetra-p-tolyl-4-${4}^{\ensuremath{'}}$-biphenyldiamine dispersed polycarbonate increases with doping in a nearly linear fashion, and shows an activation energy of 0.2 eV. At high doping levels, a superlinear increase of conductivity with doping is observed, and the activation energy decreases, reaching a low of 0.12 eV. This behavior is understood in terms of broadening of the transport manifold due to enhanced disorder coming from the dopants.

The band alignment of Al2O3/n-Ga2O3 was investigated by x-ray photoelectron spectroscopy (XPS). With a band gap of 6.8 ± 0.2 eV measured for Al2O3, the conduction and valence band offsets at the interface were estimated to be 1.5 ± 0.2 eV and 0.7 ± 0.2 eV, respectively. The conduction band offset was also obtained from tunneling current in Al2O3/n-Ga2O3 (2¯01) metal-oxide-semiconductor (MOS) diodes using the Fowler-Nordheim model. The electrically extracted value was in good agreement with the XPS data. Furthermore, the MOS diodes exhibited small capacitance-voltage hysteresis loops, indicating the successful engineering of a high-quality Al2O3/Ga2O3 interface.

The authors report on the integration of an Au-free contact module intended for AlGaN/GaN high-electron-mobility transistors fabricated in a 200 mm Si complementary metal–oxide–semiconductor facility. Contacts are characterized via transfer line method structures, tunneling electron microscopy, and energy-dispersive x-ray spectroscopy. Factors leading to incorrect extraction of contact resistance are discussed. The authors find that reoptimization of chemical vapor deposited silicon nitride on AlGaN/GaN substrates is required to ensure reliable determination of contact resistance, gate-to-source spacing, and gate-to-drain spacing. Additional process development is required to enable parallel processing of Si and GaN devices.