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51. Dynamic-ron control via proton irradiation in AlGaN/GaN transistors

56. 1GigaRad TID impact on 28nm HEP analog circuits

57. Total Ionizing Dose effects on a 28 nm Hi-K metal-gate CMOS technology up to 1 Grad

59. Design of analog front-ends for the RD53 demonstrator chip

62. Upsets in Erased Floating Gate Cells With High-Energy Protons

63. Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

64. Investigation of hot carrier stress and constant voltage stress in high-κ Si-based TFETs

65. Facility for fast neutron irradiation tests of electronics at the ISIS spallation neutron source

66. A new hardware/software platform and a new 1/E neutron source for soft error studies: Testing FPGAs at the ISIS facility

67. 65nm technology for HEP: status et perspective

70. Muon-induced soft errors in 16-nm NAND flash memories

76. CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments

88. Proton induced trapping effect on space compatible GaN HEMTs

92. Developments on DC/DC converters for the LHC experiment upgrades

93. Neutron and alpha SER in advanced NAND Flash memories

95. Neutron-Induced Upsets in NAND Floating Gate Memories

96. Temperature dependence of neutron-induced soft errors in SRAMs

97. Scaling trends of neutron effects in MLC NAND Flash memories

98. Facility for fast neutron irradiation tests of electronics at the ISIS spallation neutron source

99. Factors impacting the temperature dependence of soft errors in commercial SRAMs

100. Neutron-induced soft errors in advanced flash memories

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