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Metallization, plasma, and thermal annealing used in magneto-resistive random access memory integration differs significantly from traditional interconnection processes, usually resulting in the device performance deterioration of metal-oxide-silicon field-effect transistors. Commonly used methods, such as hydrogen postalloying, may not be effective to recover performance when magneto-resistive random access memory is integrated. The study focused on the interplay between hydrogen content in the dielectric films, wafer configuration induced by film stress, and thermal annealing during the chip fabrication process. Post-thermal annealing can enhance the release of hydrogen from the dielectric films, which can repair the silicon–hydrogen bond breakage resulting from magneto-resistive random access memory integration. However, this process can also worsen wafer bowing in an undesired direction which is detrimental to the performance of metal-oxide-silicon field-effect transistors. Consequently, utilizing silicon nitride with specific hydrogen content, in conjunction with post-thermal annealing, can improve effectively both p-type and n-type metal-oxide-silicon field-effect transistors. This approach holds significant potential for application in more advanced technological nodes since it is compatible with traditional process and does not require more advanced fabrication equipment. Additionally, the resulting embedded magneto-resistive random access memory chips maintain competitive magnetic tunneling junction reliability in term of endurance and reflow resistivity. [ABSTRACT FROM AUTHOR]

Defects in the free layer are considered to be the main cause of the balloon effect, but there is little insight into the synthetic antiferromagnetic (SAF) layer. To address this shortcoming, in this work, an optimized SAF layer was introduced in the perpendicular magnetic tunneling junction (pMTJ) stack to eliminate the low-probability bifurcated-switching phenomenon. The results indicated that the Hf field in the film stack improved significantly from ~5700 Oe to ~7500 Oe. A magnetoresistive random access memory (MRAM) test chip was also fabricated with a 300 mm process, resulting in a significantly improved ballooning effect. The results also indicated that the switching voltage decreased by 18.6% and the writing energy decreased by 33.7%. In addition, the low-probability stray field along the x-axis was thought to be the main cause of the ballooning effect, and was experimentally optimized for the first time by enhancing the SAF layer. This work provides a new perspective on spin-flipping dynamics, facilitating a deeper comprehension of the internal mechanism and helping to secure improvements in MRAM performance. [ABSTRACT FROM AUTHOR]

Field-free magnetization switching via the interplay of spin orbit torque (SOT), exchange bias field (H E X ), and voltage controlled magnetic anisotropy (VCMA) is crucial for the development of scalable, high speed, and energy-efficient spintronic memories. This has been experimentally demonstrated by the rapid evolution of the voltage gated-spin orbit torque-magnetic random access memory (VG-SOT-MRAM) cell, in which perpendicular spin current is fed along with the in-plane H E X and VCMA assistance for cell programming. Here, we have examined the writing properties of a three terminal voltage gated-spin orbit torque-perpendicularly magnetized magnetic tunnel junction (VG-SOT-pMTJ) device structure (IrMn/CoFeB/MgO/CoFeB) in-depth through simulation. We observed that SOT critical switching current (I _ S O T) decreases either by increasing the VCMA voltage or FL thickness. Even SOT field-like torque can accelerate the switching process and modulate the critical switching current. As the VCMA voltage rises, I _ S O T falls by nearly 60%. In our experimental setup, VCMA/SOT optimal pulse width and amplitude for better write delay are 1 ns and 0.3 V, respectively. Furthermore, the impacts of free layer thickness, pMTJ radius, H E X , and noise are analyzed. Finally, we demonstrate the dependency of material parameters on temperature and VCMA voltage. [ABSTRACT FROM AUTHOR]

The ubiquitous presence of electronic devices demands robust hardware security mechanisms to safeguard sensitive information from threats. This paper presents a physical unclonable function (PUF) circuit based on magnetoresistive random access memory (MRAM). The circuit utilizes inherent characteristics arising from fabrication variations, specifically magnetic tunnel junction (MTJ) cell resistance, to produce corresponding outputs for applied challenges. In contrast to Arbiter PUF, the proposed effectively satisfies the strict avalanche criterion (SAC). Additionally, the grid-like structure of the proposed circuit preserves its resistance against machine learning-based modeling attacks. Various machine learning (ML) attacks employing multilayer perceptron (MLP), linear regression (LR), and support vector machine (SVM) networks are simulated for two-array and four-array architectures. The MLP-attack prediction accuracy was 53.61% for a two-array circuit and 49.87% for a four-array circuit, showcasing robust performance even under the worst-case process variations. In addition, deep learning-based modeling attacks in considerable high dimensions utilizing multiple networks such as convolutional neural network (CNN), recurrent neural network (RNN), MLP, and Larq are used with the accuracy of 50.31%, 50.25%, 50.31%, and 50.31%, respectively. The efficiency of the proposed circuit at the layout level is also investigated for simplified two-array architecture. The simulation results indicate that the proposed circuit offers intra and inter-hamming distance (HD) with a mean of 0.98% and 49.96%, respectively, and a mean diffuseness of 49.09%. [ABSTRACT FROM AUTHOR]

With the advancement of technology nodes, the challenging space radiation environment poses a significant threat to memory reliability. Spin transfer torque magnetic random access memory (STT-MRAM) is a formidable candidate for non-volatile memory for space applications due to its advantages of non-volatility, durability, speed and compatibility with CMOS technology. Although the STT-MRAM memory unit magnetic tunnel junction (MTJ) is naturally immune to radiation effects, the single event upset (SEU) affects the peripheral circuitry. A radiation-hardened circuit is proposed, which theoretically does not have ‘0' upset nodes and automatically recovers from ‘1' upset. Moreover, the circuit's radiation-hardened performance was corroborated through hybrid simulation utilizing 40-nm technology. The findings of this investigation hold significance for the use of space radiation-hardened STT-MRAM. [ABSTRACT FROM AUTHOR]

With the outstanding growth of Internet of Things (IoT) devices, security and power efficiency of integrated circuits can no longer be overlooked. Current approved standards for cryptographic algorithms are not suitable for constrained environments. In this context, the National Institute of Standards and Technology (NIST) started a lightweight cryptography (LWC) competition to develop new algorithm standards that can be fit into small devices. In 2023, NIST has decided to standardize the Ascon family for LWC. This algorithm has been designed to be more resilient to side-channel and fault-based analysis. Nonetheless, hardware implementations of Ascon have been broken by multiple statistical fault analysis and power analysis. These attacks have underlined the necessity to develop adapted countermeasures to side-channel and perturbation-based attacks. However, existing countermeasures are power and area consuming. In this article, we propose a new countermeasure for the Ascon cipher that does not significantly increase the area and power consumption. Our architecture relies on the nonvolatile feature of the Magnetic Tunnel Junction (MTJ) that is the single element of the emerging Magnetic Random Access Memories (MRAM). The proposed circuit removes the bias exploited by statistical attacks. In addition, we have duplicated and complemented the permutation of Ascon to enhance the power analysis robustness of the circuit. Besides the security aspect, our circuit can save current manipulated data, ensuring energy saving from 11% to 32.5% in case of power failure. The area overhead, compared to an unprotected circuit, is × 2.43 . [ABSTRACT FROM AUTHOR]

We report systematic investigations of the effect of ultrathin capping layer insertion on the magnetic, magnetotransport, and voltage-controlled magnetic anisotropy (VCMA) properties in magnetic tunnel junctions (MTJs) with top free layer structure. Various kinds of ultrathin capping materials (Ir, Mo, TaB, Mg, Cr, Ti, and Ta) were introduced into the top free layer structure, which is comprised of MgO/CoFeB/X/MgO, where X is the inserted capping material. On insertion of an ultrathin Ir capping layer thinner than 0.3 nm, both the perpendicular magnetic anisotropy and the VCMA efficiency were improved by approximately a factor of two compared to the case without inserting an ultrathin metal capping layer. Mo insertion was also seen to be effective in improving the annealing tolerance. The developed structure can provide a novel approach for the development of high-performance voltage-driven MTJs, which can be applied, for example, for voltage-controlled magnetoresistive random access memory. [ABSTRACT FROM AUTHOR]

Measuring thermal stability in magnetic random access memory devices is non-trivial. Recently, there has been much discussion on the appropriate model to use: single domain or domain wall nucleation. Of particular challenge is assessing the maximum size at which the single domain model can be assumed. Typically, this is estimated to be in the range of 20–30 nm based on a value of the exchange stiffness (A e x ) that is assumed, estimated using indirect measurements or derived from significantly thicker films. In this work, it is proposed that this maximum size can be measured directly via the "activation volume" (V a c t ) or the "activation diameter" (D a c t ), which originates from the concept of magnetic viscosity. This is conducted by measuring, using the time dependence of magnetization at different applied fields, D a c t in perpendicular magnetic tunnel junction pillars of varying effective anisotropy constant (K e f f ) and diameter. It is shown that the trend in D a c t follows 1 / K e f f dependence, in good agreement with the analytic model for the critical diameter of coherent switching. Critically, it is also found that the smallest size for which a single domain, with coherent reversal, occurs is 20 nm. Thus, in devices with technologically relevant values of K e f f , the macrospin model may only be used in 20 nm, or smaller, devices. [ABSTRACT FROM AUTHOR]

We investigated the effect of interfacial nitrogen (N) defects on tunnel magnetoresistance (TMR) in Fe/MgO/Fe magnetic tunnel junctions (MTJs) which are the basic building block of magnetoresistive random access memory. The N atoms are predicted to originate from the SiN covering for antioxidation. It was found from first-principles quantum-transport calculations that the N defects significantly worsen the TMR. This is particularly evident in the MTJ models with an additional N atom at the MgO/Fe interface, because a conduction channel appears in the antiparallel magnetization configuration due to the N defects. The TMR is directly related to the read error rate of data and the scaling of the memory cell. Therefore, the prevention of nitrogen contamination during the manufacturing processes is a prerequisite for maintaining high performance. [ABSTRACT FROM AUTHOR]

Spin-transfer torque magnetic random access memory (MRAM) devices have considerable potential for high-performance computing applications; however, progress in this field has been hindered by difficulties in etching the magnetic tunnel junction (MTJ). One notable issue is electrical shorting caused by the accumulation of etching by-products on MTJ surfaces. Attempts to resolve these issues led to the development of step-MTJs, in which etching does not proceed beyond the MgO barrier; however, the resulting devices suffer from poor scalability and unpredictable shunting paths due to asymmetric electrode structures. This paper outlines the fabrication of pillar-shaped MTJs via a four-step etching process involving reactive-ion etching, ion-beam etching, oxygen exposure, and ion-trimming. The respective steps can be cross-tuned to optimize the shape of the pillars, prevent sidewall redeposition, and remove undesired shunting paths in order to enhance MTJ performance. In experiments, the proposed pillar-MTJs outperformed step-MTJs in key metrics, including tunneling magnetoresistance, coercivity, and switching efficiency. The proposed pillar-MTJs also enable the fabrication of MRAM cells with smaller cell sizes than spin–orbit torque devices and require no external field differing from voltage-controlled magnetic anisotropy devices. [ABSTRACT FROM AUTHOR]

Magnetic tunnel junctions (MTJs), a key component of spin transfer torque magnetic random access memory, are typically fabricated using two main processes: plasma etching and in situ protective cap layer deposition. It has been found that while the etching process predominantly affects MTJ performance, the cap layer process can further enhance electrical and magnetic properties. In this study, we achieved performance improvements in MTJs by optimizing the cap layer deposition process through various experimental methods, such as modifying the gas mixtures used in the deposition process and incorporating a novel post-plasma treatment. During the deposition of the silicon nitride (SiNx) cap layer, N-rich dissociated compounds can induce passivation of the MTJ layer, leading to additional loss of tunneling magnetoresistance (TMR) and coercive field (Hc). To circumvent this challenge, we prioritized modifying the gas ratio in the SiNx deposition process. Additionally, hydrogen introduced during SiNx deposition can penetrate the MTJ pillars and degrade their properties. To mitigate this, we developed a novel post-nitrogen plasma treatment in a plasma-enhanced chemical vapor deposition chamber, which effectively desorbed the excess hydrogen from the MTJ film stack. As a result of these optimized processes, the TMR loss, compared to a blanket wafer, was reduced from 25% to 8%, and Hc increased by up to 33% for the same stack, achieving significant performance enhancements. [ABSTRACT FROM AUTHOR]

In traditional von Neumann computing architecture, the efficiency of the system is often hindered by the data transmission bottleneck between the processor and memory. A prevalent approach to mitigate this limitation is the use of non-volatile memory for in-memory computing, with spin–orbit torque (SOT) magnetic random-access memory (MRAM) being a leading area of research. In this study, we numerically demonstrate that a precise combination of damping-like and field-like spin–orbit torques can facilitate precessional magnetization switching. This mechanism enables the binary memristivity of magnetic tunnel junctions (MTJs) through the modulation of the amplitude and width of input current pulses. Building on this foundation, we have developed a scheme for a reconfigurable spintronic logic gate capable of directly implementing Boolean functions such as AND, OR, and XOR. This work is anticipated to leverage the sub-nanosecond dynamics of SOT-MRAM cells, potentially catalyzing further experimental developments in spintronic devices for in-memory computing. [ABSTRACT FROM AUTHOR]

Nonlinear activation functions play a crucial role in artificial neural networks. However, digital implementations of sigmoidal functions, the commonly used activation functions, are facing challenges related to energy consumption and area requirements. To address these issues, we develop a proof-of-concept computing system that utilizes magnetic tunnel junctions as the key element for implementing sigmoidal activation functions. Using this system, we train a neural network for speech separation. When compared to state-of-the-art digital implementations, our scalable circuit has the potential to consume up to 383 times less energy and occupy 7354 times smaller area. These results pave the way for more efficient computing systems in the future. [ABSTRACT FROM AUTHOR]

Spintronics, utilizing both the charge and spin of electrons, benefits from the nonvolatility, low switching energy, and collective behavior of magnetization. These properties allow the development of magnetoresistive random access memories, with magnetic tunnel junctions (MTJs) playing a central role. Various spin logic concepts are also extensively explored. Among these, spin logic devices based on the motion of magnetic domain walls (DWs) enable the implementation of compact and energy-efficient logic circuits. In these devices, DW motion within a magnetic track enables spin information processing, while MTJs at the input and output serve as electrical writing and reading elements. DW logic holds promise for simplifying logic circuit complexity by performing multiple functions within a single device. Nevertheless, the demonstration of DW logic circuits with electrical writing and reading at the nanoscale is still needed to unveil their practical application potential. In this review, we discuss material advancements for high-speed DW motion, progress in DW logic devices, groundbreaking demonstrations of current-driven DW logic, and its potential for practical applications. Additionally, we discuss alternative approaches for current-free information propagation, along with challenges and prospects for the development of DW logic. [ABSTRACT FROM AUTHOR]

Magnetic tunnel junctions based on FeCoB as a magnetic electrode and MgO as a tunneling barrier gained much attention because of their applications in random access memories and magnetic sensors in disk drives. In this work, the structural and magnetic properties of the MgO/FeCoB/MgO trilayer have been studied precisely under x-ray standing wave (XSW) conditions, where XSW is generated through a high-density (Pt) waveguide structure. The combined x-ray scattering and fluorescence data obtained under XSW conditions revealed the formation of a high-density FeCoB layer at the MgO/FeCoB interface (FeCoB-on-MgO) in the as-deposited trilayer. Diffusion of B from the FeCoB layer into MgO is attributed to the formation of Fe- and Co-rich high-density layer (B-deficient FeCoB layer) at the interface. Angular-dependent magnetism of the trilayer structure revealed the presence of in-plane magnetic anisotropy (IMA), which disappeared with thermal annealing at a temperature of 450 °C. Stress in B-deficient FeCoB layer at the interface is attributed to the origin of IMA through magneto-elastic anisotropy energy minimization. The disappearance of anisotropy after annealing is mainly due to the removal of long-range stress and the formation of crystalline bcc-FeCo phase. [ABSTRACT FROM AUTHOR]

Enhancing the performance of magnetic random access memories (MRAMs) is crucial, considering speed, energy efficiency, and endurance. Spin-orbit torque-based MRAMs offer ultrafast operation and enhanced reliability. Still, the energy efficiency and external magnetic field requirement for deterministic switching of nanomagnets with perpendicular magnetic anisotropy (PMA) are a significant hurdle. To address these issues, one of the proposed solutions employs a conically magnetized free layer magnetic tunnel junction device featuring second-order PMA. This approach can minimize the required switching current density by leveraging the interplay between first- and second-order PMA energies. Additionally, coupling with exchange bias from the antiferromagnet can eliminate the need for an external field entirely. Our analysis investigates the impact of current density (magnitude and rise/fall time), first- and second-order PMA fields, exchange bias, and field-like torque on the device's switching performance. By optimizing the perpendicular magnetic anisotropies, we report improvement in the write error rate from 10 − 4 to 10 − 7 . Our findings hold promise for magnetic memory applications. [ABSTRACT FROM AUTHOR]

Magnetic tunnel junctions (MTJs), as the core storage unit of magneto resistive random-access memory, plays important role in the cutting-edge spintronics. In the MTJ devices, there are multiple internal magnetic/nonmagnetic heterojunction structures. The heterojunction always consists of magnetic metals and magnetic insulators or nonmagnetic metals. The interface of the heterojunction has certain physical effects that can affect the performance of MTJ devices. In the review, combined with the existing research results, the physical mechanism of magnetic/non-magnetic heterojunction interface coupling is discussed. The influence of the interface effect of the heterojunction on the performance of MTJ devices is studied. The optimization method is proposed specifically. This work systematically summarizes the interface effect of magnetic/non-magnetic heterojunction, which could be the critical aspect for the device's yield and reliability. [ABSTRACT FROM AUTHOR]

The spin Hall effect enables fast and reliable writing operations for next‐generation spin‐orbit‐torque magnetoresistive random‐access memories (SOT‐MRAMs). To develop SOT‐MRAMs; however, the spin Hall material should have a sufficiently low writing energy and high annealing stability for the semiconductor integration process. Thus far, none of the crystalline‐based spin Hall materials are able to satisfy these requirements. Here, a promising solution for SOT‐MRAMs is provided using amorphous W─Ta─B alloys. Even without a long‐range crystal order, W─Ta─B alloys exhibit both large effective spin Hall angles up to 40% derived from a Ta substitutional doping and superior annealing stability (up to 400 °C) due to the addition of B, enabling them to satisfy both requirements. Nanoscale three‐terminal SOT‐MRAM cells are fabricated, and these are demonstrated to have high magnetoresistance ratios (up to 130%) and extremely low intrinsic switching current densities (down to 4 × 106 A cm−2). These results show that amorphous spin Hall materials can provide the key for realizing high‐performance SOT‐MRAMs. [ABSTRACT FROM AUTHOR]

Inevitable process variations (PVT) brought by both the magnetic tunneling junction (MTJ) and MOSFET based on the complementary metal-oxide semiconductor (CMOS) technology become a major obstacle for the mass production of spin transfer torque magnetic random access memory (STT-MRAM). The detriment of the process variations leads to a serious degradation in the fundamental yield with the shrinkage of the technology nodes. However, the conventional data-cell-variation-tolerant (DCVT) sense scheme cannot get the target read yield due to the limited sense margin (SM). To resolve this problem, a DCVT triple sampling non-destructive self-reference sensing scheme (TSNS) is proposed in the paper, which doubles the SM, with lower power consumption and better SM compared with the conventional DCVT sense scheme. Monte Carlo simulation with industry-compatible 65-nm model parameters results show that the proposed sensing scheme shows over 2.5 times higher SM and less power consumption compared to the previous self-reference circuit. The proposed sensing scheme can get the target read yield with lower power consumption. [ABSTRACT FROM AUTHOR]

A bidirectional logic gate has been designed based on the backhopping phenomenon observed in magnetic tunnel junctions (MTJ) at high bias. The magnetization dynamics of each magnetic layer of the MTJ—having materials and geometry of a standard spin-transfer torque magnetic random access memory device—is calculated using the coupled Landau–Lifshitz–Gilbert equation-based theoretical framework. A circuit design interconnecting the MTJs has been proposed to simulate a two-input NAND gate. The results in both forward and reverse directions agree well with those found from the Boltzmann distribution, thereby demonstrating the equiprobability of all valid states. [ABSTRACT FROM AUTHOR]

The precise extraction of magnetic tunnel junction parameters at device level is important for understanding the weak point and its root cause in the stack design, which allows for future developments. The related variability is also vital for a reliable memory technology. Current test methods, however, are limited either to the material level or low efficiency. In this work, a device-in-series structure is proposed that directly monitors the statistical properties of the devices. This allows for a massively parallel measurement and, in this way, permits an accurate, high-efficiency testing with the device-to-device variability embedded intrinsically. Based on this method, we studied the temperature dependence of spin-transfer torque magnetoresistive random access memory's retention from 12 to 300 K, using a statistical domain wall switching model. The synthetic antiferromagnetic layers are more immune to the temperature change, compared with the free layer. The magnetoresistance is found to be a convex function of the temperature below 100 K, which contrasts the single-device measurements. The results show that as the temperature decreases, the domain wall shrinks and the zero-field energy barrier still increases. [ABSTRACT FROM AUTHOR]

Ferrimagnet (FiM), (FeCo)1−xGdx, attracts research attention due to its ultrafast magnetic dynamics and finite net magnetization. Incorporating FiM into the magnetic tunnel junction will be beneficial to further improve the writing speed of magnetic random access memory. It is commonly assumed that the FeCo and Gd atoms are switched together due to the strong exchange coupling, which remains valid even if one performs the two-sublattice macrospin simulation. Interestingly, using the atomistic model developed by our group, it is clearly seen that different atoms are not switched together. In addition, our study reveals that the nature of switching is spatially nonuniform even in the small sample with the dimension of 20 × 20 nm2. Furthermore, the characteristics of nonuniformity are completely different for samples with different Gd compositions (x). When x is close to the magnetization compensation point, successful switching cannot be obtained, but is accompanied by the stable oscillation. The atom type that dominates the oscillation is different from that predicted by the two-sublattice macrospin model. In addition, the size of a singular region is a non-monotonic function of current density. All these results can only be understood by considering the spatial nonuniform magnetization dynamics. [ABSTRACT FROM AUTHOR]

We investigated the influence of the buffer material and a cryogenic temperature deposition process on the voltage-controlled magnetic anisotropy (VCMA) effect for an ultrathin CoFeB layer in bottom-free type MgO-based magnetic tunnel junctions prepared by a mass production sputtering process. We used Ta and TaB buffers and compared the differences between them. The TaB buffer enabled us to form a flat and less-contaminated CoFeB/MgO interface by suppressing the diffusion of Ta with maintaining a stable amorphous phase. Furthermore, the introduction of cryogenic temperature deposition for the ultrathin CoFeB layer on the TaB buffer improved the efficiency of the VCMA effect and its annealing tolerance. Combining this with interface engineering employing an Ir layer for doping and a CoFe termination layer, a large VCMA coefficient of −138 ± 3 fJ/Vm was achieved. The developed techniques for the growth of ultrathin ferromagnet and oxide thin films using cryogenic temperature deposition will contribute to the development of high-performance spintronic devices, such as voltage-controlled magnetoresistive random access memories. [ABSTRACT FROM AUTHOR]

Utilizing the electronic analogs of optical phenomena such as anti-reflection coating and resonance for spintronic devices, we propose and theoretically analyze the design of a spin transfer torque-magnetoresistive random access memory (STT-MRAM) device. The proposed device consists of a superlattice heterostructure terminated with the anti-reflective regions sandwiched between the fixed and free ferromagnetic layers. Employing Green's function spin-transport formalism coupled self-consistently with the stochastic Landau–Lifshitz–Gilbert–Slonczewski equation, we design an STT-MRAM based on the anti-reflective superlattice magnetic tunnel junction (AR-SLMTJ) device having an ultrahigh tunnel magnetoresistance (≈ 3.5 × 10 4 %) and large spin current. We demonstrate that the STT-MRAM based on the AR-SLMTJ structure owing to the physics of bandpass spin filtering is nearly 1100% more energy efficient than trilayer magnetic tunnel junction (MTJ) based STT-MRAM. We also present detailed probabilistic switching and energy analysis to find out the optimal point of operation of a trilayer MTJ and AR-SLMTJ based STT-MRAM. Our predictions serve as a template to consider the heterostructures for next-generation spintronic device applications. [ABSTRACT FROM AUTHOR]

A series of half-metallic XYZ half-Heusler alloys is combined with MgO to create Heusler–MgO junctions. The electronic and magnetic properties of these junctions are investigated. The strong oxidation between metal and oxygen atoms causes the systems with pure YY interfaces to be the most stable cases. We conclude that uniaxial anisotropy can be induced in Heusler layers adjacent to MgO. The type of interface layers determines the half-metallicity and anisotropy (in-plane or perpendicular) in the Heusler–MgO junctions. The capacity to retain both half-metallicity and perpendicular magnetic anisotropy in NiMnSb/MgO and CoTiSn/MgO junctions with a MnMn interface layer makes these structures potential candidates as electrode layers in spin transfer torque random access memory devices. [ABSTRACT FROM AUTHOR]

The balance between low power consumption and high efficiency in memory devices is a major limiting factor in the development of new technologies. Magnetic random access memories (MRAMs) based on CoFeB/MgO magnetic tunnel junctions (MTJs) have been proposed as candidates to replace the current technology due to their non-volatility, high thermal stability, and efficient operational performance. Understanding the size and temperature dependence of the energy barrier and the nature of the transition mechanism across the barrier between stable configurations is a key issue in the development of MRAM. Here, we use an atomistic spin model to study the energy barrier to reversal in CoFeB/MgO nanodots to determine the effects of size, temperature, and external field. We find that for practical device sizes in the 10-50 nm range, the energy barrier has a complex behavior characteristic of a transition from a coherent to domain wall driven reversal process. Such a transition region is not accessible to simple analytical estimates of the energy barrier preventing a unique theoretical calculation of the thermal stability. The atomistic simulations of the energy barrier give good agreement with experimental measurements for similar systems, which are at the state of the art and can provide guidance to experiments identifying suitable materials and MTJ stacks with the desired thermal stability. [ABSTRACT FROM AUTHOR]

The article discusses the potential of spin-based magnetic random-access memory (MRAM) for high-performance computing. MRAMs, such as spin-transfer torque (STT) and spin-orbit torque (SOT) MRAMs, offer advantages such as fast speed, non-volatility, and compatibility with CMOS technology. They could potentially replace current memories in computer architectures and enable new types of computing, including in-memory computing, neuromorphic computing, and probabilistic computing. However, there are challenges to overcome, such as improving the read margin and addressing issues related to down-scaling. The research was supported by various organizations and funding sources. [Extracted from the article]

True random number generators (TRNGs) play a pivotal role in solving NP-hard problems, neural network computing, and hardware accelerators for algorithms, such as the simulated annealing. In this work, we focus on TRNG based on high-barrier magnetic tunnel junctions (HB-MTJs) with identical stack structure and cell geometry, but employing different spin–orbit torque (SOT) switching schemes. We conducted a comparative study of their switching probability as a function of pulse amplitude and width of the applied voltage. Through experimental and theoretical investigations, we have observed that the Y-type SOT-MTJs exhibit the gentlest dependence of the switching probability on the external voltage. This characteristic indicates superior tunability in randomness and enhanced robustness against external disturbances when Y-type SOT-MTJs are employed as TRNGs. Furthermore, the random numbers generated by these Y-type SOT-MTJs, following XOR pretreatment, have passed the National Institute of Standards and Technology SP800-22 test. This comprehensive study demonstrates the high performance and immense potential of Y-type SOT-MTJs for the TRNG implementations. [ABSTRACT FROM AUTHOR]

Spiking Neural Networks (SNNs) that require synapse weight initialization using random numbers have been widely used in the neural morphological system. However, the random numbers generated by traditional digital circuits have certain repeatability, and the entire computing architecture has issues such as high resource consumption and low integration. In this letter, a hardware system for true random number generation is realized through integrating a magnetic tunnel junction, a memory cell of MRAM (magnetic random access memory) chips, with an interface circuit and using the same mechanism as writing data in spin transfer torque MRAM. The generated true random numbers are evaluated using NIST SP800-22 standard and are used for synapse weight initialization in an SNN system. The recognition rate of the system initialized by the generated true random numbers is about 84% for an MNIST handwritten digit dataset, which is 2%–3% higher than that using a traditional linear feedback shift register. The reported work provides a new approach for better SNN performance. [ABSTRACT FROM AUTHOR]

This article discusses the current state of development, open research opportunities, and application perspectives of electric‐field‐controlled magnetic tunnel junctions that use the voltage‐controlled magnetic anisotropy effect to control their magnetization. The integration of embedded magnetic random‐access memory (MRAM) into mainstream semiconductor foundry manufacturing opens new possibilities for the development of energy‐efficient, high‐performance, and intelligent computing systems. The current generation of MRAM, which uses the current‐controlled spin‐transfer torque (STT) effect to write information, has gained traction due to its nonvolatile data retention and lower integration cost compared to embedded Flash. However, scaling MRAM to high bit densities will likely require a transition from current‐controlled to voltage‐controlled operation. In this perspective, an overview of voltage‐controlled magnetic anisotropy (VCMA) as a promising beyond‐STT write mechanism for MRAM devices is provided and recent advancements in developing VCMA‐MRAM devices with perpendicular magnetization are highlighted. Starting from the fundamental mechanisms, the key remaining challenges of VCMA‐MRAM, such as increasing the VCMA coefficient, controlling the write error rate, and achieving field‐free VCMA switching are discussed. Then potential solutions are discussed and open research questions are highlighted. Lastly, prospective applications of voltage‐controlled magnetic tunnel junctions (VC‐MTJs) in security applications, extending beyond their traditional role as memory devices are explored. [ABSTRACT FROM AUTHOR]

We employ a fully three-dimensional model coupling magnetization, charge, spin, and temperature dynamics to study temperature effects in spin-orbit torque (SOT) magnetoresistive random access memory (MRAM). SOTs are included by considering spin currents generated through the spin Hall effect. We scale the magnetization parameters with the temperature. Numerical experiments show several time scales for temperature dynamics. The relatively slow temperature increase, after a rapid initial temperature rise, introduces an incubation time to the switching. Such a behavior cannot be reproduced with a constant temperature model. Furthermore, the critical SOT switching voltage is significantly reduced by the increased temperature. We demonstrate this phenomenon for switching of field-free SOT-MRAM. In addition, with an external-field-assisted switching, the critical SOT voltage shows a parabolic decrease with respect to the voltage applied across the magnetic tunnel junction (MTJ) of the SOT-MRAM cell, in agreement with recent experimental data. [ABSTRACT FROM AUTHOR]

With the development of modern computer storage technology, the spin-transfer torque magnetic random-access memory (STT-MRAM) has become one of the most promising candidates to replace the static random-access memory and dynamic random-access memory. However, its large power consumption and long relaxation time before the magnetic moments switch are important factors restricting its commercial application. In this work, gradient-current pulses are proposed to replace the conventional constant-current pulses in the injection method. A 70-nm classical CoFeB/MgO/CoFeB magnetic tunnel junction (MTJ) with perpendicular magnetic anisotropy was simulated and measured at pulse widths of 20, 30, and 40 ns using the proposed and conventional injection pulses. The comparison results show that adopting gradient pulses can significantly reduce the relaxation time and switching power consumption of the MTJ. A power consumption reduction of 8%–40% is obtained at different pulse amplitudes and widths. Our method paves an avenue for overcoming the issues affecting the STT-MRAM and could help to promote its commercial applications. [ABSTRACT FROM AUTHOR]

In order to etch CoFeB and MgO constituting the magnetic tunnel junction (MTJ) layer of magnetic random access memory, rf-biased reactive ion beam etching (RIBE) with a H2:NH3 gas mixture was introduced and the etching characteristics were investigated. The H2:NH3 gas mixture of 8:1 was used for rf-biased RIBE because the etch selectivity is increased with H2 percentage in the H2:NH3 gas mixture while the etch rates of MTJ materials are the highest between 2:1 and 1:1 ratio of H2:NH3 due to the synergy effect of H2 and NH3 in the etching of MTJ materials. When a high rf power was applied to the substrate (high rf-biasing) during RIBE, even though etch rates of MTJ materials were increased, the etch selectivities of MTJ materials over hard mask materials were decreased possibly due to the high physical sputtering effect. However, when small rf-biasing was added to the substrate during RIBE, improved etch characteristics such as higher etch selectivity of MTJ over the top electrode (TE) material, improved etch anisotropy of the MTJ pattern masked with TE, and a thinner sidewall residue on the MTJ pattern could be observed. The improvement in etch characteristics by the addition of small rf-biasing during RIBE is believed to be related to the increased chemical etching effect through H2/NH3 gas dissociation and the increased H/NH ratio in the plasma generated just above the substrate without increasing the physical sputtering effect. Specifically, for the substrate located on the insulating substrate holder, the charging of the substrate could be removed without using an electron emitting neutralizer by supplying electrons from the plasma generated by rf-biasing during RIBE. [ABSTRACT FROM AUTHOR]

Recent research on CoPd alloys with perpendicular magnetic anisotropy has suggested that they might be useful as the pinning layer in CoFeB/MgO-based perpendicular magnetic tunnel junctions for various spintronic applications such as spin-torque transfer random access memory. We have previously studied the effect of seed layer and composition on the structure (by XRD, SEM, AFM, and TEM) and the performance (coercivity) of these CoPd films. These films do not switch coherently, so the coercivity is determined by the details of the switching mechanism, which was not studied in our previous paper. In the present paper, we show that information can be obtained about the switching mechanism from magnetic force microscopy (MFM) together with first order reversal curves, despite the fact that MFM can only be used at the zero field. We find that these films switch by a mechanism of domain nucleation and dendritic growth into a labyrinthine structure, after which the unreversed domains gradually shrink to small dots and then disappear. [ABSTRACT FROM AUTHOR]

Perpendicular magnetic anisotropy (PMA) is important for MgO based magnetic tunnel junction and magnetic random access memory to be integrated on a large scale due to high thermal stability and low critical switching current. Here, we applied the density functional theory to study the effect of HfO 2 inserting layers on PMA of Fe | MgO | Fe tunnel junction. It was found that the magnetocrystalline anisotropy (MCA) of the junction for 5 layers Fe electrode was up to 1.95 mJ/m 2 with one unit cell HfO 2 interlayer, while it was 1.72 mJ/m 2 without the interlayer. More importantly, analyzed by the layer and orbital-resolved MCA based on the second-order perturbation theory, MCA characters and the underlying mechanism of PMA become very different after inserting HfO 2. The remarkable difference is the MCA contribution of the second interfacial Fe layers, which is about 0.4 mJ/m 2 for Fe | MgO | Fe junctions, while it was larger than 0.7 mJ/m 2 for Fe | HfO 2 | MgO | HfO 2 | Fe junctions. Furthermore, Fe-d z 2 and O-p z hybridization plays a crucial role in MCA contribution from the first interfacial Fe layers since the interfacial Fe–O bond length reduces from 2.20 Å to 1.77 Å with inserting HfO 2 layers. Besides, the reduction in Fe–O bond length can redistribute the orbital-resolved electrons of the second and third closest Fe layer to the interface to enhance their absolute values of MCA contributions, which results in the strong dependence of MCA on Fe thickness. [ABSTRACT FROM AUTHOR]

Serial connection of multiple memory cells using perpendicular magnetic tunnel junctions (pMTJs) is proposed as a way to increase magnetic random access memory (MRAM) storage density. A multibit storage element is designed using pMTJs fabricated on a single wafer stack, with serial connections realized using top-to-bottom vias. The tunneling magnetoresistance effect above 130%, current induced magnetization switching in zero external magnetic field, and stability diagram analysis of single, two-bit, and three-bit cells are presented together with thermal stability. The proposed design is easy to manufacture and can lead to an increased capacity of future MRAM devices. [ABSTRACT FROM AUTHOR]

Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) is a memory which has bit cells made of magnetic tunnel junctions (MTJs), which comprise a storage switchable magnetic layer ("free layer") and, typically, one thin insulating barrier and one stable magnetic layer providing reference spin polarization for read and write operations ("reference layer"). STT-MRAM may compete with conventional dynamic and static RAM on technological nodes below 22 nm, if its switching current is reduced. This goal may be achieved for MTJ, which has two insulating barriers and reference layers. Building such a double-barrier MTJ, however, faces tremendous material challenges. In this work, a new double-barrier MTJ design with a switchable reference layer is introduced. We show that its efficiency is similar to its counterpart with stable reference layers, but it is much easier to be built. [ABSTRACT FROM AUTHOR]

Bio-inspired neuromorphic computing has aroused great interest due to its potential to realize on-chip learning with bio-plausibility and energy efficiency. Realizing spike-timing-dependent plasticity (STDP) in synaptic electronics is critical toward bio-inspired neuromorphic computing systems. Here, we report on stochastic artificial synapses based on nanoscale magnetic tunnel junctions that can implement STDP harnessing stochastic magnetization switching. We further demonstrate that both the magnitude and the temporal requirements for STDP can be modulated via engineering the pre- and post-synaptic voltage pulses. Moreover, based on arrays of binary magnetic synapses, unsupervised learning can be realized for neuromorphic computing tasks such as pattern recognition with great computing accuracy and efficiency. Our study suggests a potential route toward on-chip neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

Computing the connected component (CC) of a graph is a basic graph computing problem, which has numerous applications like graph partitioning and pattern recognition. Existing methods for computing CC suffer from memory wall problems because of the frequent data transmission between CPU and memory. To overcome this challenge, in this article, we propose to accelerate CC computation with the emerging processing-in-memory (PIM) architecture through an algorithm–architecture co-design manner. The innovation lies in computing CC with bitwise logical operations (such as AND and OR), and the customized data flow management methods to accelerate computation and reduce energy consumption. As a proof of concept, experimental results with computational spin-transfer torque magnetic RAM (STT-MRAM) arrays demonstrate on average $19.8\times $ and $12.4\times $ speedups compared with the CPU and GPU implementations, and a $35.4 \times $ energy efficiency improvement over the CPU implementation. Moreover, we investigate the potential associations between graph computing and bitwise Boolean logic, which could help design more general in-memory graph computing accelerators in the future. [ABSTRACT FROM AUTHOR]

Magnetic Tunnel Junction (MTJ) is an important device to store the non-volatile. This MTJ device overcomes the disadvantages of CMOS technology by reducing the leakage power. Also, it stores the data in magnet domain. Non Volatile combinational circuits are nonvolatile memory elements, which distributes over a logic-circuit plane and expected to realize both the ultra-low-power and reduced interconnection delay. The existing Spin Orbit Torque- Magnetic Tunnel Junction method is used to store data with higher density, cost benefits, endurance and Non-Volatility. But it has some limitations, such as high current density needed for writing can infrequently damage the MTJ barrier, achieving reliable reading without making a difference remains a challenge. More constraints limit the designer to attain higher speed with reliable MRAM architectures, because the operations of writing and reading share the same path (via the junction). To overcome these limitations, an innovative nonvolatile combinational circuit depending on Spin Transfer Torque (STT) with perpendicular Magnetic Tunnel Junction (STT-PMTJ) is proposed in this manuscript for fast data storage in real time applications. Here, the nonvolatile combinational circuits are Spin Transfer Torque and Spin Orbit Torque. The proposed method gives higher reliability and the lower resistive writing path acts high-speed with energy-efficient WRITE operation with the help of Read and Write Parallel Switching (RWPS). The RWPS circuit is designed using Spin Orbit Torque (SOT) logic. The RWPS-PMTJ device used to maximize the robustness of entire structure and the noise is apparently reduced. The performance of the proposed method is compared with other existing methods, such as STT-MTJ, SOT-MRAM. The experimental results shows that the proposed RWPS-PMTJ method is efficiently reduced write delay by 64% compared to the STT switching, it also exhibits 61% faster read access with full swing eventually eliminating the setup time requirement. It enables the design of a new era of In-memory computing circuits to meet the challenges in the design of memory-based computation logic circuits. The AND logic gate and Full Adder (FA) circuits are implemented using Cadence virtuoso 45 nm technology. [ABSTRACT FROM AUTHOR]

Hierarchical high-radix router microarchitecture consisting of small SRAM-based intermediate buffers has been used in large-scale supercomputers interconnection networks. While hierarchical organization enables efficient scaling to higher switch port count, it requires intermediate buffers which can cause performance bottleneck. Shallow intermediate buffers can cause head-of-line blocking to create backpressure towards input buffers and reduce overall performance. Increasing intermediate buffer size overcomes this problem but becomes infeasible due to the large overhead. In this work, we propose to organise decentralized intermediate buffers as a centralized buffer and leverage alternate memory technology to increase its capacity. In particular, we exploit the high-density nature of Spin-Torque Transfer Magnetic RAM (STT-MRAM) to increase intermediate buffer depth while also providing near-zero leakage power. STT-MRAM has disadvantages such as higher write latency and higher write energy. To overcome these disadvantages, we propose DeepHiR, a novel deep hybrid buffer organization (STT-MRAM and SRAM) combined with a centralized buffer organization to provide high performance with minimal cost. Although the deep intermediate buffer provided by DeepHiR can effectively improve router performance, a large amount of input buffer will still cause a lot of hardware overhead. At the same time, deeper intermediate buffers also makes it take longer for the backpressure to propagate to the source node, thereby reducing the performance of DeepHiR. Therefore, we further propose ElasHiR, which leverages elastic input buffer design in the centralized row buffer to allow a part of the centralized row buffer to act as input buffer. ElasHiR adopts reduced input buffers and automatically determines the length of input buffer in the centralized row buffer. This design minimizes the buffer resource while achieving excellent efficiency. Evaluation results show that DeepHiR can achieve 56.7 percent performance improvement in packet latency under synthetic traffic, and the cost of energy and area is moderate. ElasHiR can reduce the input buffer by 93.8 percent with performance comparable to DeepHiR. [ABSTRACT FROM AUTHOR]

The popularity of perpendicular magnetic tunnel junction (pMTJ)-based spin-transfer torque magnetic random access memories (STT-MRAMs) is growing very fast. The performance of such memories is very sensitive to magnetic fields, including both internal and external ones. This article presents a magnetic-field-aware compact model of pMTJ, named the MFA-magnetic tunnel junction (MTJ) model, for magnetic/electrical co-simulation of MTJ/CMOS circuits. Magnetic measurement data of MTJ devices, with diameters ranging from 35 to 175 nm, are used to calibrate an in-house magnetic coupling model. This model is subsequently integrated into our developed compact pMTJ model, which is implemented in Verilog-A. The superiority of the proposed MFA-MTJ model for device/circuit co-design of STT-MRAM is demonstrated by simulating a single pMTJ as well as STT-MRAM full circuits. The design space is explored under PVT variations and various configurations of magnetic fields. [ABSTRACT FROM AUTHOR]

The popularity gained by magnetic tunnel junction (MTJ) devices in recent years has made the analysis of various effects on MTJs necessary. This paper describes a comparative analysis of the addition of high-K dielectrics (HfO2 or ZrO2 or TiO2 or h-BN or Ta2O5) along with the MgO dielectric layer as MgO–HfO2/ZrO2/TiO2/h-BN/Ta2O5–MgO to form a composite dielectric layer (CDL). Utilizing these CDL, we have presented a double-barrier penta-layer MTJ device by introducing CDL between CoFeB ferromagnetic layers and Fe ferromagnetic layers. First, the crystallographic analysis of the materials has been performed using the first-principles computation in density functional theory for predicting material behavior. Furthermore, the simulations were executed using a non-equilibrium Green's function (NEGF)-based simulator. This NEGF-based quantum transport simulator has been used for calculating the various critical transport characteristics of an MTJ such as tunneling magnetoresistance (TMR), differential tunneling magnetoresistance, and spin-transfer torque (STT, both in-plane and out-of-plane) along with other properties such as resistance and differential resistance ∂ V ∂ I for both parallel and antiparallel states by giving material parameters and geometric dimensions of an MTJ as inputs. When compared to the traditional tri-layer MTJ devices (CoFeB–MgO–CoFeB and Fe–MgO–Fe), CoFeB–CDL–CoFeB, and Fe–CDL–Fe are found to be superior in terms of both high TMR ratio and low switching current. We have also included the temperature-related analysis for all the MTJ devices. Among all the MTJ models investigated, the highest TMR ratio found at 13 K is for Ta2O5 and TiO2-based CDL MTJ for Fe-based MTJ models, with 1218% and 1246%, respectively. [ABSTRACT FROM AUTHOR]

We have demonstrated modeling of phonon and defect-induced spin relaxation length (L S ) in Fe 3 O 4 and organic semiconductor (OSC) Alq 3 . L S of Alq 3 decreases with enhanced disorder and film thickness at a low film width regime. Exponential change of L S at low width regime is found for Alq 3 which is, however, absent for Fe 3 O 4 indicating comparable spin-dependent scattering and L S in Fe 3 O 4 . L S also decreases with spin-flip probability both for Alq 3 and Fe 3 O 4 . Voltage-dependent tunnel magnetoresistance (TMR) response in Fe 3 O 4 /Alq 3 /Co and La 0.7 Sr 0.3 MnO 3 (LSMO)/Alq 3 /Co hybrid magnetic tunnel junction (MTJ) devices has been attributed to modified spin filter effect across magnetic/OSC junction at high bias regime. TMR reduction with Alq 3 thickness for Fe 3 O 4 device has been attributed to spin relaxation at the organic spacer layer. A low bias peak from differential TMR indicates spin-polarized injection for both MTJ devices. Enhanced in-plane spin transfer torque for both MTJ is associated with modified spin filtering at magnetic/OSC junctions. Lower TMR signal for LSMO device indicates reduced tunneling and enhanced carrier injection across the OSC, which is also supported by the band structure profile. The TMR response observed from simulation results matches well with previously reported experimental results. Higher TMR response for Fe 3 O 4 device indicates the possibility of device employment in room temperature magnetic recording applications. [ABSTRACT FROM AUTHOR]

Today's technology demands compact, portable, fast, and energy-efficient devices. One approach to making energy-efficient devices is an in-memory computation that addresses the memory bottleneck issues of the present computing system by utilizing a spintronic device viz. magnetic tunnel junction (MTJ). Further, area and energy can be reduced through approximate computation. We present a circuit design based on the logic-in-memory computing paradigm on voltage-controlled magnetic anisotropy magnetoresistive random access memory (VCMA-MRAM). During the computation, multiple bit cells within the memory array are selected that are in parallel by activating multiple word lines. The designed circuit performs all logic operations-Read/NOT, AND/NAND, OR/NOR, and arithmetic SUM operation (1-bit approximate adder with 75% accuracy for SUM and accurate carry out) by slight modification using control signals. All the simulations have been performed at a 45 nm CMOS technology node with VCMA-MTJ compact model by using the HSPICE simulator. Simulation results show that the proposed circuit's approximate adder consumes about 300% less energy and 2.3 times faster than its counterpart exact adder. [ABSTRACT FROM AUTHOR]

A first principle analysis of Fe/MgO/Fe magnetic tunnel junction (MTJ) having gate voltage over insulated barrier region (MgO) is presented. Because of different work functions of gate and barrier materials, transfer of density of states (DOS) in forbidden energy gap of MgO is found above Fermi energy due to Schottky effect. It is reported that diffused DOS allows high tunneling of majority channel current because of less interference of ${\Delta _{{1}}}$ symmetry of Bloch states with evanescent states in barrier. It shows high spin injection efficiency 0.9928, 0.9959, and 0.9871 with tunnel magneto resistance (TMR) ratios 1743.30%, 1450.06%, and 572.62% at gate voltages 1–3 V, respectively, with left and right electrodes at 0.5 V. Present work gives a basis for using MTJs as three terminal devices in magnetic random access memory (MRAM) applications. [ABSTRACT FROM AUTHOR]

Emerging hybrid spin-Hall-effect-assisted+spin transfer torque-magnetic tunnel junction (SHE+STT-MTJ)/CMOS logic-in-memory (LIM) architecture is considered as the promising next-generation candidate for the future digital integrated circuits. It overcomes the limitations of von Neumann architecture such as memory wall and also rises in the standby mode energy consumption. There are several full adder (FA) circuits based on the LIM architecture, which are either fully nonvolatile (NV) or partially NV. As the main disadvantage, these circuits suffer from wastage of write energy during the MTJ writing process. Furthermore, the existing fully NVFA can be used only for approximate computing. Hence, in this article, we have proposed fully NVFA for exact computation with self-write-termination read-write (SWTRW) circuitry. In SWTRW circuitry, wastage of write energy is eliminated due to a continuous monitoring (CM) and self-write-termination (SWT) process which saves a significant amount of energy of 95.88%. With the adaption of an improved sense amplifier, the NVFA developed in this article saves energy of 88.1% during computation/reading compared with its conventional counterpart. To add on, writing and reading the energy delay product (EDP) are also reduced by 90.56% and 78.76%, respectively. [ABSTRACT FROM AUTHOR]

Although multiple-level-cell (MLC) STT-RAM increases data density, it suffers from the two-step transition (TT) issue. It is because hard domain and soft domain of an MLC STT-RAM cell cannot be flipped to the opposite magnetization direction at the same time. Thus, the soft domain has to be flipped twice to the opposite magnetization direction of the hard domain. The TT problem hurts the lifetime of MLC STT-RAM due to additional flips on soft domains. To mitigate the TT problem of MLC STT-RAM, we propose an alternative encoding scheme (AES) to reduce the occurrence of TTs. AES utilizes the encoding method to eliminate most TTs and distributes unavoidable TTs among cells evenly to improve the lifetime of MLC STT-RAM cache. The experimental results showed that the proposed scheme achieved a great lifetime improvement than the related work. [ABSTRACT FROM AUTHOR]

Spin-transfer-torque magnetic random access memory (STT-MRAM) based on magnetic tunnel junction (MTJ) device has attracted significant attention from academics and industries. Nevertheless, the thermal effect under bias operation affects the overall performance and stability of a device. To evaluate the thermal phenomenon in MTJ devices accurately, the non-equilibrium effect between the electron and the phonon near the electrode-barrier interface cannot be ignored. The existence of the interface leads to additional thermal resistance hindering the heat conduction of tunnel junction. Therefore, an effective equivalent model concerning the interface effect is necessary to represent the heat transportation of the device. In this article, a nanoscale thermal transport model of the MTJ device is proposed. The influence of the thermal conductivity of the nano-oxide layer on the temperature distribution is discussed. The interface energy balance transport model is used to clarify the non-equilibrium relationship between the phonon and the electron at the CoFeB/MgO/CoFeB interfaces. A parameterization study is conducted to illustrate the temperature distribution in the nanoscale thermal transport model. Furthermore, the phonon-electron coupling distance ($\delta$) based on the thermal conductivity of the phonon ($\kappa _{p}$) and the electron ($\kappa _{e}$) of the device is implemented to construct the effective equivalent model using finite element modeling (FEM), which could realistically reflect the thermal transport under working conditions. The established equivalent model has a guiding role in exploring the thermal transportation in the nanoscale MTJ device. [ABSTRACT FROM AUTHOR]

The voltage-controlled magnetic anisotropy (VCMA) effect has been proposed as an energy efficient approach for controlling the direction of magnetization. To demonstrate the scalability of a voltage-controlled magnetoresistive random access memory, we need to optimize the perpendicular magnetic anisotropy (PMA), tunnel magnetoresistance (TMR), and VCMA properties. Here, we performed a systematic investigation of the effects of inserting a post-oxidized MgAl layer on PMA, TMR, and VCMA in epitaxial magnetic tunnel junctions (MTJs). PMA and TMR have substantial dependences on the thickness of the MgAl layer, and their maximum values occurred when the MgAl layer was 0.20 nm thick, resulting in threefold and twofold increases in the PMA energy and TMR ratio, respectively, compared with the case without a MgAl layer. On the other hand, the VCMA coefficient increased as the MgAl layer thickness decreased and had a maximum value of −350 fJ/Vm when the MgAl layer was 0.16 nm thick, suggesting that the weakly oxidized interface provides a larger VCMA effect. Interface engineering using a post-oxidized ultrathin MgAl layer provides us with a valuable technique for precisely controlling the PMA, TMR, and VCMA properties of voltage-controlled MTJs. [ABSTRACT FROM AUTHOR]