Co-optimizing of H-curing, stress, and thermal annealing—A more effective way for realizing FEOL-BEOL compatible eMRAM chip.

Metallization, plasma, and thermal annealing used in magneto-resistive random access memory integration differs significantly from traditional interconnection processes, usually resulting in the device performance deterioration of metal-oxide-silicon field-effect transistors. Commonly used methods, such as hydrogen postalloying, may not be effective to recover performance when magneto-resistive random access memory is integrated. The study focused on the interplay between hydrogen content in the dielectric films, wafer configuration induced by film stress, and thermal annealing during the chip fabrication process. Post-thermal annealing can enhance the release of hydrogen from the dielectric films, which can repair the silicon–hydrogen bond breakage resulting from magneto-resistive random access memory integration. However, this process can also worsen wafer bowing in an undesired direction which is detrimental to the performance of metal-oxide-silicon field-effect transistors. Consequently, utilizing silicon nitride with specific hydrogen content, in conjunction with post-thermal annealing, can improve effectively both p-type and n-type metal-oxide-silicon field-effect transistors. This approach holds significant potential for application in more advanced technological nodes since it is compatible with traditional process and does not require more advanced fabrication equipment. Additionally, the resulting embedded magneto-resistive random access memory chips maintain competitive magnetic tunneling junction reliability in term of endurance and reflow resistivity. [ABSTRACT FROM AUTHOR]