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Flexible thermoelectric (TE) products that convert temperature difference into electrical energy can be used as textile materials to harvest human body heat into electrical power for portable, low-power microelectronic products. To this end, this study investigated a newly developed electrospinning process for producing flexible TE films. After electrospinning, thermoelectric properties of the test samples were extracted through a self-developed measurement apparatus for simple, accurate, and direct thermoelectric measurements. We then compared the results with the literature. According to the test data, potentials and challenges of electrospinning on flexible TE devices were finally discussed in this study.

This paper presents the realization of a flexible thermoelectric (TE) generator as a textile fabric that converts human body heat into electrical energy for portable, low-power microelectronic products. In this study, an organic non-toxic conductive coating was used to dip rayon wipes into conductive TE fabrics so that the textile took advantage of the TE currents which were parallel to the temperature gradient. To this end, a dyed conductive cloth was first sewn into a TE unit. The TE unit was then sewn into an array to create a temperature difference between the human body and the environment for TE power harvesting. The prototype of the TE fabric consisted of 48 TE units connected by conductive wire over an area of 275 &times, 205 mm2, and the TE units were sewn on a T-shirt at the chest area. After fabrication and property tests, a Seebeck coefficient of approximately 20 &mu, V/K was measured from the TE unit, and 0.979 mV voltage was obtained from the T-shirt with TE textile fabric. Since the voltage was generated at a low temperature gradient environment, the proposed energy solution in actual fabric applications is suitable for future portable microelectronic power devices.

Because of the coefficient of thermal expansion and the hygroscopic swelling mismatches on plastic packaging materials, stress and reliability issues on microelectronic packaging structures are extremely important for the packaging industry. Through the self-design test chips with the piezoresistive microstress sensors, this paper presents the experimental methodologies for stress and reliability monitoring on typical plastic ball-grid-array packaging. To this end, coefficients of the sensors are first calibrated, and stress monitoring is next performed with simultaneously thermal and hygroscopic loadings under steady-state and cyclic environments, respectively. The Weibull reliability model is next applied based on the experimental data and the parameters of the model are extracted. After real-time monitoring on stress variations during the reliability test, about 0.8 MPa of stress decrease is measured on each reliability cycle.

Three-dimensional (3D) structure with through silicon via (TSV) technology is emerging as a key issue in microelectronic packaging industry, and electrical reliability has become one of the main technical subjects for the TSV designs. However, criteria used for TSV reliability tests have not been consistent in the literature, so that the criterion itself becomes a technical argument. To this end, this paper first performed several different reliability tests on the testing packaging with TSV chains, then statistically analyzed the experimental data with different failure criteria on resistance increasing, and finally constructed the Weibull failure curves with parameter extractions. After comparing the results, it is suggested that using different criteria may lead to the same failure mode on Weibull analyses, and 65% of failed devices are recommended as a suitable termination for reliability tests.

Moisture is one of the major contributing factors in fracture and reliability issues for microelectronic packaging. To characterize the moisture-induced stress distribution inside the packaging structure, an in situ, quantitative, and nondestructive experimental methodology is needed. This paper proposes the use of piezoresistive sensors to measure moisture-induced stress in a plastic low profile, fine pitch, ball grid array (LFBGA) packaging. The measurements include hygroscopic swelling stress extractions and real-time stress monitoring of the popcorn phenomenon, and the results associated with gravimetric analyses are reported. Postreflow scanning acoustic microscope (SAM) inspection results and cross section observations are used as experimental verification. Comparing with thermal stresses previously measured on the same package, it is found that the hygroscopic mismatch stress is significant and important for package engineers. In addition, piezoresistive sensors were proven useful in this work for recording popcorn occurrence and monitoring the stress drops at the popcorn initiation.

This paper develops a multifunctional test chip for property extractions on packaging design. Components on this test chip include the diodes as the temperature sensors; the polysilicon units as the heaters; the piezoresistors as the stress sensors; and the pads as well as the related metal connector designs for the electrical parameter extractions. To save the sensor numbers and the connecting wires, sensors on the test chip surface were put according to structure symmetry. Since each packaging design has its individual size, components on the test chip surface were laid based on assembly of small unit cells, so that flexible test chip size can be obtained to fit the requirements from different packaging dimensions. The inductance and capacitance for the packaging leads were also extracted under microwave frequency operations, and a testing fixture was built to cooperate the Quad Flat Package (QFP) samples with the RF-RLC meter. The availability of the new measurement system designs was demonstrated from...

Stress measurements in microelectronic packaging through piezoresistive sensors take the advantage of both in-situ and nondestructive. In this study, test chips with both p-type and n-type piezoresistive stress sensors, as well as a heat source, were first designed, then manufactured by a commercialized foundry so that the uniformity of the test chips was expected. Both temperature and stress calibrations were next performed through a special designed MQFP (Metal Quad Flat Package) and four-point bending (4PB) structure, respectively. Measurements of stresses which are produced due to both manufacturing process and thermal effects on the test chips were finally executed, and approximately linear relationships were observed between stress and temperature as well as stress and input power. It is concluded that n-type piezoresistive stress sensors are able to extract stress in microelectronic packaging with good accuracy.

Due to the carrier mobility changes with the mechanical loading and its small size, the MOSFET (metal-oxide-semiconductor field-effective-transistor) has the potential to be a suitable chip stress monitoring tool for microelectronic packaging. In this work, a complete and accurate approach to calibrate the coefficients for both types of MOSFET stress sensors under thermal and mechanical loadings was investigated quantitatively. Through data from different measurement modes on different types of MOSFET, the optimal experimental methodology was next proposed for the sensor applications on packaging stress extraction. The thermomechanical coupling coefficients for the selected experimental mode were finally extracted so that packaging stress measurements with MOSFET under elevated temperature can be performed more accurately.

The MOSFET (Metal-Oxide-Semiconductor Field-Effective-Transistor) has the potential to be a suitable chip stress monitoring tool for microelectronic packaging because the measurements are nondestructive, in-situ, real-time, and the sensor is relatively small. To this end, this paper studies the stress behaviors of both types of the MOSFET micro stress sensors. In this work, a self-developed four-point bending (4PB) measurement methodology is employed and the stress coefficient calibrations on the MOSFET sensors were next performed. After measurements, stress coefficients for both types of the MOSFET were successfully extracted with discussions. After comparing with the previous extracted temperature coefficients on the same devices, it is also concluded that the temperature effect is extremely important for the MOSFET sensor applications.

Piezoresistive sensors have been demonstrated to be an accurate and efficient tool for stress measurements on chip surfaces inside microelectronic packaging. In this work, test chips with piezoresistive stress sensors, diode temperature sensors as well as heaters were first designed, fabricated, and calibrated. We next packaged the test chips into low profile, fine pitch ball grid array (LFBGA) packaging with 196 balls and measured the stresses on chip surfaces inside the packaging. After measuring the packaging induced stress as well as the stress under stable environmental temperature rises, it was found that compressive stresses were obtained at room temperature, and the stresses were relaxed as temperature went up at a rate between 0.45 MPa/°C and 0.60 MPa/°C. For thermo-stress experiments, the temperatures on chip surfaces at different power levels were measured, and compressive chip stresses were first extracted. As the chip power increased, the compressive stresses became tensions. Since the LFBGA structure is thinner with higher packaging efficiency, different results from our earlier plastic quad flat package stress measurements were observed and discussed. In addition, the final comparisons between the experimental data and the finite element simulations show good consistency.

Stress measurements in microelectronic packaging through the MOSFET devices have attracted great attentions because the measurement is in-situ and nondestructive. In this study, a new assembled methodology was designed and applied so that the calibration procedures on MOSFET stress sensors can be simpler and more accurate. Under mechanical, thermal, and thermo-mechanical coupling effects, parameters of the MOSFET devices were extracted based on linear relationships between drain current variation and the mechanical and/or thermal effects, and the results suggested that the MOSFET devices is a useful in-situ stress sensorsin electronic packaging. It is concluded that the newly experimental design and the extracted parameters are useful for MOSFET stress sensor's design and applications.

In this paper, we developed a multifunctional test chip for property extractions on packaging design. Components in this test chip include diodes as the temperature sensor; polysilicon units as the heater; piezoresistors as the stress sensor; and pads as well as the related metal connector designs for electrical parameter extractions. To save sensor numbers and connecting wires, sensors on the test chip surface were put according to structure symmetry. Since different microelectronic packaging has individual size, components on test chip surface were laid based on assembly of small unit cells so that the flexible test chip size can be employed to fit requirements from different packaging dimensions. Besides, we considered the inductance/capacitance extractions of packages for high frequency condition. A test structure was finally designed to cooperate the QFP packages for the RLC measurement, and the availability of the designed was demonstrated from testing data.

Piezoresistive sensor has been demonstrated to be an accurate and efficient tool for stress measurements on chip surfaces inside microelectronic packaging. In this work, square test chips with four piezoresistive stress sensors and the accompanied diode temperature sensors have been first designed, fabricated and calibrated. A heater was also laid at the chip center. We next packaged test chips into 196-ball LFBGA (Low profile, Fine pitch BGA) packaging and measured stresses on chip surfaces inside the packaging. After measuring the packaging-induced stresses as well as stresses under constant environment temperatures, it was found that compressive stresses were obtained at room temperature, and the compressive stresses are relaxed as temperature increases. It was also found in the same experiments that the average slopes of the temperature-stress curves are between 0.45 Mpa//spl deg/C/spl sim/0.65 Mpa//spl deg/C, and localized stress distributions are observed. For thermal stress experiments, temperatures on chip surfaces at different power levels were first derived. Compressive chip stresses were next measured and the stresses then become tension as the chip power increased. Since all of the measured stresses are much less than the yielding stress, it is concluded that chips inside 196-ball LFBGA packaging will not failure due to thermomechanical effects during regular operations.

In this work, a simple assembled structure was designed and fabricated so that the calibration procedures on piezoresisitve stress sensors for microelectronic packaging can be simpler, more accurate, and more efficient. After comparing with the previous work results, validity of the aforementioned new structure was next demonstrated through experimental data. Since many accessory experimental facilities employed in traditional calibration procedure become unnecessary, the new methodology takes great advantage on piezoresisitve coefficient calibrations, especially for calibration at temperature other than room temperature.