Search

We have measured the hot-electron luminescence of GaAs HEMT devices over a broad spectral range in the infrared (0.4-1.4 eV). The emission intensity has spectral features suggesting that k-conserving, interconduction-band transitions dominate the emission process. The interpretation of emission spectra in terms of a hot-carrier distribution requires consideration of band-structure effects. In general this tends to reduce values of electron temperature Tel determined by the exponential fit to the experiment.

Subthreshold conduction in submicron MODFETs has been measured and can be well described by a model which includes the shifts of both the ideality factor and the threshold voltage with the drain voltage. A method for extracting the model parameters from measured data is described. Experimental results turn out that it is essential to introduce the shift of the ideality factor with the drain voltage to properly describe the subthreshold characteristics observed in submicron MODFETs. The model with all extracted parameters, incorporating gate junction leakage, is in good agreement with the experimental data for 0.25/0.3 μm AlGaAs/GaAs MODFETs.

The authors measure the spectrum of radiative emission from a high quality HEMT device and relate this to the energy distribution of the channel electrons. The discussion focuses on the intraband and interband contributions to the spectrum. The intraband, bremsstrahlung component gives evidence for very energetic electrons (Tel approximately=6000 K). The radiative recombination of carriers, however, is characterized by a very much lower temperature.

It is shown that strained isoelectronically doped buffer layers grown on GaAs and InP substrates allow one to reduce the dislocation density as well as the deep level concentration. Photoluminescence measurements show an improved near gap luminescence and a reduced deep level emission. This has been also confirmed by DLTS measurements. The higher material quality is also reflected in the device performance. GaAs Schottky diodes (n ˜0.5 · 1016Cm-3) exhibit a leakage current of 100 pA up to 50 V reverse bias at room temperature even with large Schottky contact area of 125 μm × 60 μm. This technique allows the quality of electronic and optoelectronic devices to be improved.

This paper describes results of a study on the monolithic integration of AlGaAs light-emitting diodes with GaAs field-effect transistors on a conductive p-GaAs substrate. Using a selective growth technique, a horizontal configuration is fabricated that allows separate optimization of the two types of devices and provides a quasi-planar surface. This approach is compatible with the standard GaAs integrated-circuit technology. By inserting an undoped layer and a p-n junction between the active layer of the FET and the substrate leakage currents below 500 µA for bias voltage up to 9 V are obtained for these insulation structures. The emitted light intensity of the LED, connected in series with the FET, exhibits a nearly linear dependence on the driving gate potential. Temperature or optical crosstalk effects were not observed. Fall and rise times around 20 ns were measured from the pulse response characteristics. This switching time is limited by the LED whereas the FET and isolation layers were found not to affect the switching behavior of the circuit in this time frame.

Si/SiGe heterostructure bipolar transistors (HBTs) were fabricated and compared to Si homojunction transistors with similar doping levels. Low-temperature Si-MBE (molecular-beam epitaxy) was used to form the heterojunction and the homojunction layer sequences. A wet chemical selective etching technique was used to contact the thin (80 nm) base layer of the heterojunction transistor. A peak current gain of 200 to 400 was measured for the heterostructure devices, compared to a gain of two for the homojunction structure. The current gain collector current dependence of the heterostructure device could be due to surface recombination effects. >

GaAs/GaAlAs heterojunction bipolar transistors have been made and integrated to a seven-stage I2L-ring oscillator. The five layer sequence has been grown by MBE. The transistor operating upside down (inverted, collector on the top) exhibits a current gain up to 50 for one collector. A groove isolation technique has been used to isolate the gates from each other. The structure was planarized by polyimide, incorporated Ta thin-film resistors for the injectors as well as implanted resistors. A delay time of 3.0 ns at 60-µW power consumption has been achieved in the low power region which corresponds to a power delay product of 0,18 pJ and a minimum delay time of 700 ps has been obtained at 1 mW.

Lateral pnp bipolar transistors have been fabricated using Be implantation to define the emitter and collector areas. The base area (1 - 2 µm wide) has been protected against Be ions during implantation by SiO 2 and photoresist. The lateral straggling and diffusion during the anneling process reduces the base width, which can be adjusted with the annealing temperature and time. Between the active n-GaAs layer and substrate, a n-Ga 0.7 Al 0.3 As layer is deposited. The Be ions penetrating the GaAs/GaAlAs interface form a pn junction in the GaAlAs layer below the emitter and collector area. This reduces the current by several orders of magnitude through the parasitic emitter-substrate (base) diode compared to a GaAs pn junction, due to the higher band gap. For these devices with an effective base width of 0.5 µm, a current gain of 10 in common emitter configuration has been obtained.

It is shown that by MOCVD growth of a single strained GaAs:In layer, the quality of epitaxial GaAs material can be remarkably enhanced. This is demonstrated with respect to lifetimes and diffusion lengths of minority carriers. This technique permits an improvement of the quality of electronic and optoelectronic bipolar devices.

The Double-Schottky-Interdigitated (DSI) photodetector has been shown to be a very-high-speed optical detector for λ < 0.9 µm. Its major drawback, a high dark current (1 µA at 10 V), has been overcome by quasi-ternary growth of the GaAs epitaxial layer, reducing the dark current by three orders of magnitude.

GaAs/GaAlAs double heterojunction I2L inverters with a vertical pnp current source were fabricated by ion implantation and Zn-diffusion into LPE structures. The current gain of the upside-down-operated double heterojunction npn transistor has been improved by a factor of two compared to the gain of the npn transistor of the otherwise similar structure. In addition, the wide-gap junction pnp transistor gives a solution to the critical switch-on problem which can occur when a wide-gap emitter transistor is used for the switching transistor.

A lateral pnp bipolar transistor structure has been realised in n-GaAs material using ion implantation. Be ions have been implanted to form the emitter and collector. Proton implantation has been used to reduce the area of the parasitic emitter-substrate diode. First results of a transistor with a current gain of 0.5 are shown.

High-quality GaAs Schottky diodes have been fabricated using a strained layer to improve the material quality. The epitaxial layer has been isoelectronically doped with In with a concentration of 4×1019 cm‾3. The diodes fabricated on these layers show a reverse current of 100 pA-200 pA up to 50 V reverse-bias voltage at room temperature. The Schottky contact area was 7500 μm2 and the doping concentration 1×1016 cm‾3. An excellent, reproducible ideality factor of 1.02 has been obtained over seven decades of forward current. Results of Schottky diodes fabricated on isoelectronically doped layers in comparison to conventionally fabricated devices are reported.

An integrated injection logic inverter has been realised in GaAs/GaAlAs material using ion implantation and Zn diffusion. Si ions have been implanted to merge the current source with the switching transistor, whereas the Be implantation provides the base contact. The shallow p+-emitter of the pnp current source has been fabricated by Zn diffusion. Instead of a lateral pnp transistor, which is typical in I2L technology, a vertical arrangement has been used. This type of transistor shows a better current efficiency and can be fabricated with a better uniformity in terms of base width. First results of an I2L inverter with a vertical pnp transistor are shown.